diff options
author | Thierry Reding <treding@nvidia.com> | 2017-02-23 12:30:48 -0500 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2017-03-10 11:37:32 -0500 |
commit | 02df3f03a8db3e64348b8fce3d8ce2449ada3fa6 (patch) | |
tree | c52620915cf75916216efccddc0a02d468cf042c | |
parent | 24975b8c218ad7206f98062c97c9380c2163f6e2 (diff) |
arm64: tegra: Add initial power tree for P3310
Enable the Maxim MAX77620 PMIC found on P3310 and add some fixed
regulators to model the power tree.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 220 |
1 files changed, 220 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index ffbb4be5122e..9eba6daac1a4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | |||
@@ -1,5 +1,7 @@ | |||
1 | #include "tegra186.dtsi" | 1 | #include "tegra186.dtsi" |
2 | 2 | ||
3 | #include <dt-bindings/mfd/max77620.h> | ||
4 | |||
3 | / { | 5 | / { |
4 | model = "NVIDIA Tegra186 P3310 Processor Module"; | 6 | model = "NVIDIA Tegra186 P3310 Processor Module"; |
5 | compatible = "nvidia,p3310", "nvidia,tegra186"; | 7 | compatible = "nvidia,p3310", "nvidia,tegra186"; |
@@ -115,6 +117,189 @@ | |||
115 | bpmp { | 117 | bpmp { |
116 | i2c { | 118 | i2c { |
117 | status = "okay"; | 119 | status = "okay"; |
120 | |||
121 | pmic: pmic@3c { | ||
122 | compatible = "maxim,max77620"; | ||
123 | reg = <0x3c>; | ||
124 | |||
125 | interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; | ||
126 | #interrupt-cells = <2>; | ||
127 | interrupt-controller; | ||
128 | |||
129 | #gpio-cells = <2>; | ||
130 | gpio-controller; | ||
131 | |||
132 | pinctrl-names = "default"; | ||
133 | pinctrl-0 = <&max77620_default>; | ||
134 | |||
135 | max77620_default: pinmux { | ||
136 | gpio0 { | ||
137 | pins = "gpio0"; | ||
138 | function = "gpio"; | ||
139 | }; | ||
140 | |||
141 | gpio1 { | ||
142 | pins = "gpio1"; | ||
143 | function = "fps-out"; | ||
144 | maxim,active-fps-source = <MAX77620_FPS_SRC_0>; | ||
145 | }; | ||
146 | |||
147 | gpio2 { | ||
148 | pins = "gpio2"; | ||
149 | function = "fps-out"; | ||
150 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | ||
151 | }; | ||
152 | |||
153 | gpio3 { | ||
154 | pins = "gpio3"; | ||
155 | function = "fps-out"; | ||
156 | maxim,active-fps-source = <MAX77620_FPS_SRC_1>; | ||
157 | }; | ||
158 | |||
159 | gpio4 { | ||
160 | pins = "gpio4"; | ||
161 | function = "32k-out1"; | ||
162 | drive-push-pull = <1>; | ||
163 | }; | ||
164 | |||
165 | gpio5 { | ||
166 | pins = "gpio5"; | ||
167 | function = "gpio"; | ||
168 | drive-push-pull = <0>; | ||
169 | }; | ||
170 | |||
171 | gpio6 { | ||
172 | pins = "gpio6"; | ||
173 | function = "gpio"; | ||
174 | drive-push-pull = <1>; | ||
175 | }; | ||
176 | |||
177 | gpio7 { | ||
178 | pins = "gpio7"; | ||
179 | function = "gpio"; | ||
180 | drive-push-pull = <0>; | ||
181 | }; | ||
182 | }; | ||
183 | |||
184 | fps { | ||
185 | fps0 { | ||
186 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; | ||
187 | maxim,shutdown-fps-time-period-us = <640>; | ||
188 | }; | ||
189 | |||
190 | fps1 { | ||
191 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; | ||
192 | maxim,shutdown-fps-time-period-us = <640>; | ||
193 | }; | ||
194 | |||
195 | fps2 { | ||
196 | maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; | ||
197 | maxim,shutdown-fps-time-period-us = <640>; | ||
198 | }; | ||
199 | }; | ||
200 | |||
201 | regulators { | ||
202 | in-sd0-supply = <&vdd_5v0_sys>; | ||
203 | in-sd1-supply = <&vdd_5v0_sys>; | ||
204 | in-sd2-supply = <&vdd_5v0_sys>; | ||
205 | in-sd3-supply = <&vdd_5v0_sys>; | ||
206 | |||
207 | in-ldo0-1-supply = <&vdd_5v0_sys>; | ||
208 | in-ldo2-supply = <&vdd_5v0_sys>; | ||
209 | in-ldo3-5-supply = <&vdd_5v0_sys>; | ||
210 | in-ldo4-6-supply = <&vdd_1v8>; | ||
211 | in-ldo7-8-supply = <&avdd_dsi_csi>; | ||
212 | |||
213 | sd0 { | ||
214 | regulator-name = "VDD_DDR_1V1_PMIC"; | ||
215 | regulator-min-microvolt = <1100000>; | ||
216 | regulator-max-microvolt = <1100000>; | ||
217 | regulator-always-on; | ||
218 | regulator-boot-on; | ||
219 | }; | ||
220 | |||
221 | avdd_dsi_csi: sd1 { | ||
222 | regulator-name = "AVDD_DSI_CSI_1V2"; | ||
223 | regulator-min-microvolt = <1200000>; | ||
224 | regulator-max-microvolt = <1200000>; | ||
225 | /* XXX */ | ||
226 | regulator-always-on; | ||
227 | regulator-boot-on; | ||
228 | }; | ||
229 | |||
230 | vdd_1v8: sd2 { | ||
231 | regulator-name = "VDD_1V8"; | ||
232 | regulator-min-microvolt = <1800000>; | ||
233 | regulator-max-microvolt = <1800000>; | ||
234 | /* XXX */ | ||
235 | regulator-always-on; | ||
236 | regulator-boot-on; | ||
237 | }; | ||
238 | |||
239 | vdd_3v3_sys: sd3 { | ||
240 | regulator-name = "VDD_3V3_SYS"; | ||
241 | regulator-min-microvolt = <3300000>; | ||
242 | regulator-max-microvolt = <3300000>; | ||
243 | /* XXX */ | ||
244 | regulator-always-on; | ||
245 | regulator-boot-on; | ||
246 | }; | ||
247 | |||
248 | ldo0 { | ||
249 | regulator-name = "VDD_1V8_AP_PLL"; | ||
250 | regulator-min-microvolt = <1800000>; | ||
251 | regulator-max-microvolt = <1800000>; | ||
252 | /* XXX */ | ||
253 | regulator-always-on; | ||
254 | regulator-boot-on; | ||
255 | }; | ||
256 | |||
257 | ldo2 { | ||
258 | regulator-name = "VDDIO_3V3_AOHV"; | ||
259 | regulator-min-microvolt = <3300000>; | ||
260 | regulator-max-microvolt = <3300000>; | ||
261 | /* XXX */ | ||
262 | regulator-always-on; | ||
263 | regulator-boot-on; | ||
264 | }; | ||
265 | |||
266 | vddio_sdmmc1: ldo3 { | ||
267 | regulator-name = "VDDIO_SDMMC1_AP"; | ||
268 | regulator-min-microvolt = <1800000>; | ||
269 | regulator-max-microvolt = <3300000>; | ||
270 | }; | ||
271 | |||
272 | ldo4 { | ||
273 | regulator-name = "VDD_RTC"; | ||
274 | regulator-min-microvolt = <1000000>; | ||
275 | regulator-max-microvolt = <1000000>; | ||
276 | }; | ||
277 | |||
278 | vddio_sdmmc3: ldo5 { | ||
279 | regulator-name = "VDDIO_SDMMC3_AP"; | ||
280 | regulator-min-microvolt = <2800000>; | ||
281 | regulator-max-microvolt = <2800000>; | ||
282 | }; | ||
283 | |||
284 | avdd_1v05: ldo7 { | ||
285 | regulator-name = "VDD_HDMI_1V05"; | ||
286 | regulator-min-microvolt = <1050000>; | ||
287 | regulator-max-microvolt = <1050000>; | ||
288 | /* XXX */ | ||
289 | regulator-always-on; | ||
290 | regulator-boot-on; | ||
291 | }; | ||
292 | |||
293 | vdd_pex: ldo8 { | ||
294 | regulator-name = "VDD_PEX_1V05"; | ||
295 | regulator-min-microvolt = <1050000>; | ||
296 | regulator-max-microvolt = <1050000>; | ||
297 | /* XXX */ | ||
298 | regulator-always-on; | ||
299 | regulator-boot-on; | ||
300 | }; | ||
301 | }; | ||
302 | }; | ||
118 | }; | 303 | }; |
119 | }; | 304 | }; |
120 | 305 | ||
@@ -123,4 +308,39 @@ | |||
123 | status = "okay"; | 308 | status = "okay"; |
124 | method = "smc"; | 309 | method = "smc"; |
125 | }; | 310 | }; |
311 | |||
312 | regulators { | ||
313 | compatible = "simple-bus"; | ||
314 | #address-cells = <1>; | ||
315 | #size-cells = <0>; | ||
316 | |||
317 | vdd_5v0_sys: regulator@0 { | ||
318 | compatible = "regulator-fixed"; | ||
319 | reg = <0>; | ||
320 | |||
321 | regulator-name = "VDD_5V0_SYS"; | ||
322 | regulator-min-microvolt = <5000000>; | ||
323 | regulator-max-microvolt = <5000000>; | ||
324 | regulator-always-on; | ||
325 | regulator-boot-on; | ||
326 | }; | ||
327 | |||
328 | vdd_1v8_ap: regulator@1 { | ||
329 | compatible = "regulator-fixed"; | ||
330 | reg = <1>; | ||
331 | |||
332 | regulator-name = "VDD_1V8_AP"; | ||
333 | regulator-min-microvolt = <1800000>; | ||
334 | regulator-max-microvolt = <1800000>; | ||
335 | |||
336 | /* XXX */ | ||
337 | regulator-always-on; | ||
338 | regulator-boot-on; | ||
339 | |||
340 | gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; | ||
341 | enable-active-high; | ||
342 | |||
343 | vin-supply = <&vdd_1v8>; | ||
344 | }; | ||
345 | }; | ||
126 | }; | 346 | }; |