diff options
author | Rob Herring <robh@kernel.org> | 2015-01-09 21:34:50 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-01-30 17:14:44 -0500 |
commit | 029e2151fc4a5760b4ab963d7613f8603084232a (patch) | |
tree | 7c871d1b562b5f7e433276e38238d5a3a74aaf45 | |
parent | 350f8be5bb402a1d6804adeba0031926ad246bf1 (diff) |
PCI: xilinx: Convert to use generic config accessors
Convert the Xilinx host PCI driver to use the generic config access
functions.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
CC: linux-arm-kernel@lists.infradead.org
-rw-r--r-- | drivers/pci/host/pcie-xilinx.c | 88 |
1 files changed, 9 insertions, 79 deletions
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index ef3ebaf9a738..f67d0363e3c9 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c | |||
@@ -189,7 +189,7 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) | |||
189 | } | 189 | } |
190 | 190 | ||
191 | /** | 191 | /** |
192 | * xilinx_pcie_config_base - Get configuration base | 192 | * xilinx_pcie_map_bus - Get configuration base |
193 | * @bus: PCI Bus structure | 193 | * @bus: PCI Bus structure |
194 | * @devfn: Device/function | 194 | * @devfn: Device/function |
195 | * @where: Offset from base | 195 | * @where: Offset from base |
@@ -197,96 +197,26 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) | |||
197 | * Return: Base address of the configuration space needed to be | 197 | * Return: Base address of the configuration space needed to be |
198 | * accessed. | 198 | * accessed. |
199 | */ | 199 | */ |
200 | static void __iomem *xilinx_pcie_config_base(struct pci_bus *bus, | 200 | static void __iomem *xilinx_pcie_map_bus(struct pci_bus *bus, |
201 | unsigned int devfn, int where) | 201 | unsigned int devfn, int where) |
202 | { | 202 | { |
203 | struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata); | 203 | struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata); |
204 | int relbus; | 204 | int relbus; |
205 | 205 | ||
206 | if (!xilinx_pcie_valid_device(bus, devfn)) | ||
207 | return NULL; | ||
208 | |||
206 | relbus = (bus->number << ECAM_BUS_NUM_SHIFT) | | 209 | relbus = (bus->number << ECAM_BUS_NUM_SHIFT) | |
207 | (devfn << ECAM_DEV_NUM_SHIFT); | 210 | (devfn << ECAM_DEV_NUM_SHIFT); |
208 | 211 | ||
209 | return port->reg_base + relbus + where; | 212 | return port->reg_base + relbus + where; |
210 | } | 213 | } |
211 | 214 | ||
212 | /** | ||
213 | * xilinx_pcie_read_config - Read configuration space | ||
214 | * @bus: PCI Bus structure | ||
215 | * @devfn: Device/function | ||
216 | * @where: Offset from base | ||
217 | * @size: Byte/word/dword | ||
218 | * @val: Value to be read | ||
219 | * | ||
220 | * Return: PCIBIOS_SUCCESSFUL on success | ||
221 | * PCIBIOS_DEVICE_NOT_FOUND on failure | ||
222 | */ | ||
223 | static int xilinx_pcie_read_config(struct pci_bus *bus, unsigned int devfn, | ||
224 | int where, int size, u32 *val) | ||
225 | { | ||
226 | void __iomem *addr; | ||
227 | |||
228 | if (!xilinx_pcie_valid_device(bus, devfn)) { | ||
229 | *val = 0xFFFFFFFF; | ||
230 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
231 | } | ||
232 | |||
233 | addr = xilinx_pcie_config_base(bus, devfn, where); | ||
234 | |||
235 | switch (size) { | ||
236 | case 1: | ||
237 | *val = readb(addr); | ||
238 | break; | ||
239 | case 2: | ||
240 | *val = readw(addr); | ||
241 | break; | ||
242 | default: | ||
243 | *val = readl(addr); | ||
244 | break; | ||
245 | } | ||
246 | |||
247 | return PCIBIOS_SUCCESSFUL; | ||
248 | } | ||
249 | |||
250 | /** | ||
251 | * xilinx_pcie_write_config - Write configuration space | ||
252 | * @bus: PCI Bus structure | ||
253 | * @devfn: Device/function | ||
254 | * @where: Offset from base | ||
255 | * @size: Byte/word/dword | ||
256 | * @val: Value to be written to device | ||
257 | * | ||
258 | * Return: PCIBIOS_SUCCESSFUL on success | ||
259 | * PCIBIOS_DEVICE_NOT_FOUND on failure | ||
260 | */ | ||
261 | static int xilinx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, | ||
262 | int where, int size, u32 val) | ||
263 | { | ||
264 | void __iomem *addr; | ||
265 | |||
266 | if (!xilinx_pcie_valid_device(bus, devfn)) | ||
267 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
268 | |||
269 | addr = xilinx_pcie_config_base(bus, devfn, where); | ||
270 | |||
271 | switch (size) { | ||
272 | case 1: | ||
273 | writeb(val, addr); | ||
274 | break; | ||
275 | case 2: | ||
276 | writew(val, addr); | ||
277 | break; | ||
278 | default: | ||
279 | writel(val, addr); | ||
280 | break; | ||
281 | } | ||
282 | |||
283 | return PCIBIOS_SUCCESSFUL; | ||
284 | } | ||
285 | |||
286 | /* PCIe operations */ | 215 | /* PCIe operations */ |
287 | static struct pci_ops xilinx_pcie_ops = { | 216 | static struct pci_ops xilinx_pcie_ops = { |
288 | .read = xilinx_pcie_read_config, | 217 | .map_bus = xilinx_pcie_map_bus, |
289 | .write = xilinx_pcie_write_config, | 218 | .read = pci_generic_config_read, |
219 | .write = pci_generic_config_write, | ||
290 | }; | 220 | }; |
291 | 221 | ||
292 | /* MSI functions */ | 222 | /* MSI functions */ |