diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2018-05-10 14:31:44 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-17 11:09:19 -0400 |
commit | 0270be3e34efb05a88bc4c422572ece038ef3608 (patch) | |
tree | 6cde6ccb097a4c516f2d58d3583943a16b449ecd | |
parent | 11fb0683493b2da112cd64c9dada221b52463bf7 (diff) |
x86/speculation: Rework speculative_store_bypass_update()
The upcoming support for the virtual SPEC_CTRL MSR on AMD needs to reuse
speculative_store_bypass_update() to avoid code duplication. Add an
argument for supplying a thread info (TIF) value and create a wrapper
speculative_store_bypass_update_current() which is used at the existing
call site.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-rw-r--r-- | arch/x86/include/asm/spec-ctrl.h | 7 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/bugs.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/process.c | 4 |
3 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h index 6e2874049afd..82b6c5a0d61e 100644 --- a/arch/x86/include/asm/spec-ctrl.h +++ b/arch/x86/include/asm/spec-ctrl.h | |||
@@ -42,6 +42,11 @@ extern void speculative_store_bypass_ht_init(void); | |||
42 | static inline void speculative_store_bypass_ht_init(void) { } | 42 | static inline void speculative_store_bypass_ht_init(void) { } |
43 | #endif | 43 | #endif |
44 | 44 | ||
45 | extern void speculative_store_bypass_update(void); | 45 | extern void speculative_store_bypass_update(unsigned long tif); |
46 | |||
47 | static inline void speculative_store_bypass_update_current(void) | ||
48 | { | ||
49 | speculative_store_bypass_update(current_thread_info()->flags); | ||
50 | } | ||
46 | 51 | ||
47 | #endif | 52 | #endif |
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 82422a04b506..f2f0c1b3bf50 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c | |||
@@ -598,7 +598,7 @@ static int ssb_prctl_set(struct task_struct *task, unsigned long ctrl) | |||
598 | * mitigation until it is next scheduled. | 598 | * mitigation until it is next scheduled. |
599 | */ | 599 | */ |
600 | if (task == current && update) | 600 | if (task == current && update) |
601 | speculative_store_bypass_update(); | 601 | speculative_store_bypass_update_current(); |
602 | 602 | ||
603 | return 0; | 603 | return 0; |
604 | } | 604 | } |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 91c3398286d8..30ca2d1a9231 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -414,10 +414,10 @@ static __always_inline void __speculative_store_bypass_update(unsigned long tifn | |||
414 | intel_set_ssb_state(tifn); | 414 | intel_set_ssb_state(tifn); |
415 | } | 415 | } |
416 | 416 | ||
417 | void speculative_store_bypass_update(void) | 417 | void speculative_store_bypass_update(unsigned long tif) |
418 | { | 418 | { |
419 | preempt_disable(); | 419 | preempt_disable(); |
420 | __speculative_store_bypass_update(current_thread_info()->flags); | 420 | __speculative_store_bypass_update(tif); |
421 | preempt_enable(); | 421 | preempt_enable(); |
422 | } | 422 | } |
423 | 423 | ||