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authorBard Liao <bardliao@realtek.com>2014-12-15 02:42:34 -0500
committerMark Brown <broonie@kernel.org>2014-12-22 13:44:14 -0500
commit026e73683ad5665a45b01ca1a221fa87e0e8e6fb (patch)
tree2ba7cb72330c6be77f901db510b27a7d393d7d01
parentf2ecf2ef59b57bd495c40d8a3e9d03e80f66afa4 (diff)
ASoC: rt5670: Keep sysclk on if JD func is used
System clock is necessary for rt5670 JD function. We assume system clock source will be set in machine driver. So there are two things left we should do in codec driver. 1. Set sysclk to codec internal clock in probe since machine driver may not do that before JD function is registered. 2. Power up PLL once sysclk source is switched to PLL. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/rt5670.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index 78d85de8af6f..0a027bc94399 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -2190,6 +2190,13 @@ static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2190 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src) 2190 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
2191 return 0; 2191 return 0;
2192 2192
2193 if (rt5670->pdata.jd_mode) {
2194 if (clk_id == RT5670_SCLK_S_PLL1)
2195 snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
2196 else
2197 snd_soc_dapm_disable_pin(&codec->dapm, "PLL1");
2198 snd_soc_dapm_sync(&codec->dapm);
2199 }
2193 switch (clk_id) { 2200 switch (clk_id) {
2194 case RT5670_SCLK_S_MCLK: 2201 case RT5670_SCLK_S_MCLK:
2195 reg_val |= RT5670_SCLK_SRC_MCLK; 2202 reg_val |= RT5670_SCLK_SRC_MCLK;
@@ -2628,6 +2635,10 @@ static int rt5670_i2c_probe(struct i2c_client *i2c,
2628 } 2635 }
2629 2636
2630 if (rt5670->pdata.jd_mode) { 2637 if (rt5670->pdata.jd_mode) {
2638 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
2639 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
2640 rt5670->sysclk = 0;
2641 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
2631 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2642 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2632 RT5670_PWR_MB, RT5670_PWR_MB); 2643 RT5670_PWR_MB, RT5670_PWR_MB);
2633 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 2644 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,