diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2017-10-31 13:56:19 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2017-11-01 23:32:31 -0400 |
commit | 01f349fcad68d80939db53d9110135e6341b786d (patch) | |
tree | 42a30519e26ecb3185c7c4cd98c44cd07e9228cf | |
parent | 8c967c554818a0f98f8cad86cc561ab43bbbf1e7 (diff) |
drm/nouveau/fifo/gf100-: use new interfaces for vmm operations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
8 files changed, 28 insertions, 36 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h index f4400b33c00d..fc1142af02cf 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h | |||
@@ -13,7 +13,7 @@ struct gf100_fifo_chan { | |||
13 | 13 | ||
14 | struct { | 14 | struct { |
15 | struct nvkm_gpuobj *inst; | 15 | struct nvkm_gpuobj *inst; |
16 | struct nvkm_vma vma; | 16 | struct nvkm_vma *vma; |
17 | } engn[NVKM_SUBDEV_NR]; | 17 | } engn[NVKM_SUBDEV_NR]; |
18 | }; | 18 | }; |
19 | 19 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h index 1259fb2337be..5beb5c628473 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h | |||
@@ -14,7 +14,7 @@ struct gk104_fifo_chan { | |||
14 | 14 | ||
15 | struct { | 15 | struct { |
16 | struct nvkm_gpuobj *inst; | 16 | struct nvkm_gpuobj *inst; |
17 | struct nvkm_vma vma; | 17 | struct nvkm_vma *vma; |
18 | } engn[NVKM_SUBDEV_NR]; | 18 | } engn[NVKM_SUBDEV_NR]; |
19 | }; | 19 | }; |
20 | 20 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c index 24a4c28b32c5..f69576868164 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <core/enum.h> | 28 | #include <core/enum.h> |
29 | #include <core/gpuobj.h> | 29 | #include <core/gpuobj.h> |
30 | #include <subdev/bar.h> | 30 | #include <subdev/bar.h> |
31 | #include <subdev/fb.h> | ||
32 | #include <engine/sw.h> | 31 | #include <engine/sw.h> |
33 | 32 | ||
34 | #include <nvif/class.h> | 33 | #include <nvif/class.h> |
@@ -586,12 +585,12 @@ gf100_fifo_oneinit(struct nvkm_fifo *base) | |||
586 | if (ret) | 585 | if (ret) |
587 | return ret; | 586 | return ret; |
588 | 587 | ||
589 | ret = nvkm_vm_get(bar, nvkm_memory_size(fifo->user.mem), 12, | 588 | ret = nvkm_vmm_get(bar, 12, nvkm_memory_size(fifo->user.mem), |
590 | NV_MEM_ACCESS_RW, &fifo->user.bar); | 589 | &fifo->user.bar); |
591 | if (ret) | 590 | if (ret) |
592 | return ret; | 591 | return ret; |
593 | 592 | ||
594 | return nvkm_memory_map(fifo->user.mem, 0, bar, &fifo->user.bar, NULL, 0); | 593 | return nvkm_memory_map(fifo->user.mem, 0, bar, fifo->user.bar, NULL, 0); |
595 | } | 594 | } |
596 | 595 | ||
597 | static void | 596 | static void |
@@ -630,7 +629,7 @@ gf100_fifo_init(struct nvkm_fifo *base) | |||
630 | } | 629 | } |
631 | 630 | ||
632 | nvkm_mask(device, 0x002200, 0x00000001, 0x00000001); | 631 | nvkm_mask(device, 0x002200, 0x00000001, 0x00000001); |
633 | nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar.offset >> 12); | 632 | nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12); |
634 | 633 | ||
635 | nvkm_wr32(device, 0x002100, 0xffffffff); | 634 | nvkm_wr32(device, 0x002100, 0xffffffff); |
636 | nvkm_wr32(device, 0x002140, 0x7fffffff); | 635 | nvkm_wr32(device, 0x002140, 0x7fffffff); |
@@ -641,7 +640,8 @@ static void * | |||
641 | gf100_fifo_dtor(struct nvkm_fifo *base) | 640 | gf100_fifo_dtor(struct nvkm_fifo *base) |
642 | { | 641 | { |
643 | struct gf100_fifo *fifo = gf100_fifo(base); | 642 | struct gf100_fifo *fifo = gf100_fifo(base); |
644 | nvkm_vm_put(&fifo->user.bar); | 643 | struct nvkm_device *device = fifo->base.engine.subdev.device; |
644 | nvkm_vmm_put(nvkm_bar_bar1_vmm(device), &fifo->user.bar); | ||
645 | nvkm_memory_unref(&fifo->user.mem); | 645 | nvkm_memory_unref(&fifo->user.mem); |
646 | nvkm_memory_unref(&fifo->runlist.mem[0]); | 646 | nvkm_memory_unref(&fifo->runlist.mem[0]); |
647 | nvkm_memory_unref(&fifo->runlist.mem[1]); | 647 | nvkm_memory_unref(&fifo->runlist.mem[1]); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h index 70db58eab9c3..b81a2ad48aa4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h | |||
@@ -26,7 +26,7 @@ struct gf100_fifo { | |||
26 | 26 | ||
27 | struct { | 27 | struct { |
28 | struct nvkm_memory *mem; | 28 | struct nvkm_memory *mem; |
29 | struct nvkm_vma bar; | 29 | struct nvkm_vma *bar; |
30 | } user; | 30 | } user; |
31 | }; | 31 | }; |
32 | 32 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index eddf9f12e9ee..84bd703dd897 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <core/client.h> | 27 | #include <core/client.h> |
28 | #include <core/gpuobj.h> | 28 | #include <core/gpuobj.h> |
29 | #include <subdev/bar.h> | 29 | #include <subdev/bar.h> |
30 | #include <subdev/fb.h> | ||
31 | #include <subdev/timer.h> | 30 | #include <subdev/timer.h> |
32 | #include <subdev/top.h> | 31 | #include <subdev/top.h> |
33 | #include <engine/sw.h> | 32 | #include <engine/sw.h> |
@@ -836,12 +835,12 @@ gk104_fifo_oneinit(struct nvkm_fifo *base) | |||
836 | if (ret) | 835 | if (ret) |
837 | return ret; | 836 | return ret; |
838 | 837 | ||
839 | ret = nvkm_vm_get(bar, nvkm_memory_size(fifo->user.mem), 12, | 838 | ret = nvkm_vmm_get(bar, 12, nvkm_memory_size(fifo->user.mem), |
840 | NV_MEM_ACCESS_RW, &fifo->user.bar); | 839 | &fifo->user.bar); |
841 | if (ret) | 840 | if (ret) |
842 | return ret; | 841 | return ret; |
843 | 842 | ||
844 | return nvkm_memory_map(fifo->user.mem, 0, bar, &fifo->user.bar, NULL, 0); | 843 | return nvkm_memory_map(fifo->user.mem, 0, bar, fifo->user.bar, NULL, 0); |
845 | } | 844 | } |
846 | 845 | ||
847 | static void | 846 | static void |
@@ -867,7 +866,7 @@ gk104_fifo_init(struct nvkm_fifo *base) | |||
867 | nvkm_wr32(device, 0x04014c + (i * 0x2000), 0xffffffff); /* INTREN */ | 866 | nvkm_wr32(device, 0x04014c + (i * 0x2000), 0xffffffff); /* INTREN */ |
868 | } | 867 | } |
869 | 868 | ||
870 | nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar.offset >> 12); | 869 | nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar->addr >> 12); |
871 | 870 | ||
872 | nvkm_wr32(device, 0x002100, 0xffffffff); | 871 | nvkm_wr32(device, 0x002100, 0xffffffff); |
873 | nvkm_wr32(device, 0x002140, 0x7fffffff); | 872 | nvkm_wr32(device, 0x002140, 0x7fffffff); |
@@ -877,9 +876,10 @@ static void * | |||
877 | gk104_fifo_dtor(struct nvkm_fifo *base) | 876 | gk104_fifo_dtor(struct nvkm_fifo *base) |
878 | { | 877 | { |
879 | struct gk104_fifo *fifo = gk104_fifo(base); | 878 | struct gk104_fifo *fifo = gk104_fifo(base); |
879 | struct nvkm_device *device = fifo->base.engine.subdev.device; | ||
880 | int i; | 880 | int i; |
881 | 881 | ||
882 | nvkm_vm_put(&fifo->user.bar); | 882 | nvkm_vmm_put(nvkm_bar_bar1_vmm(device), &fifo->user.bar); |
883 | nvkm_memory_unref(&fifo->user.mem); | 883 | nvkm_memory_unref(&fifo->user.mem); |
884 | 884 | ||
885 | for (i = 0; i < fifo->runlist_nr; i++) { | 885 | for (i = 0; i < fifo->runlist_nr; i++) { |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h index 44bff98d6725..466f1051f91a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h | |||
@@ -37,7 +37,7 @@ struct gk104_fifo { | |||
37 | 37 | ||
38 | struct { | 38 | struct { |
39 | struct nvkm_memory *mem; | 39 | struct nvkm_memory *mem; |
40 | struct nvkm_vma bar; | 40 | struct nvkm_vma *bar; |
41 | } user; | 41 | } user; |
42 | }; | 42 | }; |
43 | 43 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c index 3e2b1a82e640..78114068c6dd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c | |||
@@ -111,7 +111,7 @@ gf100_fifo_gpfifo_engine_init(struct nvkm_fifo_chan *base, | |||
111 | struct nvkm_gpuobj *inst = chan->base.inst; | 111 | struct nvkm_gpuobj *inst = chan->base.inst; |
112 | 112 | ||
113 | if (offset) { | 113 | if (offset) { |
114 | u64 addr = chan->engn[engine->subdev.index].vma.offset; | 114 | u64 addr = chan->engn[engine->subdev.index].vma->addr; |
115 | nvkm_kmap(inst); | 115 | nvkm_kmap(inst); |
116 | nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4); | 116 | nvkm_wo32(inst, offset + 0x00, lower_32_bits(addr) | 4); |
117 | nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr)); | 117 | nvkm_wo32(inst, offset + 0x04, upper_32_bits(addr)); |
@@ -126,11 +126,7 @@ gf100_fifo_gpfifo_engine_dtor(struct nvkm_fifo_chan *base, | |||
126 | struct nvkm_engine *engine) | 126 | struct nvkm_engine *engine) |
127 | { | 127 | { |
128 | struct gf100_fifo_chan *chan = gf100_fifo_chan(base); | 128 | struct gf100_fifo_chan *chan = gf100_fifo_chan(base); |
129 | struct nvkm_vma *vma = &chan->engn[engine->subdev.index].vma; | 129 | nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma); |
130 | if (vma->vm) { | ||
131 | nvkm_vm_unmap(vma); | ||
132 | nvkm_vm_put(vma); | ||
133 | } | ||
134 | nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); | 130 | nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); |
135 | } | 131 | } |
136 | 132 | ||
@@ -150,13 +146,13 @@ gf100_fifo_gpfifo_engine_ctor(struct nvkm_fifo_chan *base, | |||
150 | if (ret) | 146 | if (ret) |
151 | return ret; | 147 | return ret; |
152 | 148 | ||
153 | ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12, | 149 | ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size, |
154 | NV_MEM_ACCESS_RW, &chan->engn[engn].vma); | 150 | &chan->engn[engn].vma); |
155 | if (ret) | 151 | if (ret) |
156 | return ret; | 152 | return ret; |
157 | 153 | ||
158 | return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm, | 154 | return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm, |
159 | &chan->engn[engn].vma, NULL, 0); | 155 | chan->engn[engn].vma, NULL, 0); |
160 | } | 156 | } |
161 | 157 | ||
162 | static void | 158 | static void |
@@ -252,7 +248,7 @@ gf100_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, | |||
252 | (1ULL << NVKM_ENGINE_MSPPP) | | 248 | (1ULL << NVKM_ENGINE_MSPPP) | |
253 | (1ULL << NVKM_ENGINE_MSVLD) | | 249 | (1ULL << NVKM_ENGINE_MSVLD) | |
254 | (1ULL << NVKM_ENGINE_SW), | 250 | (1ULL << NVKM_ENGINE_SW), |
255 | 1, fifo->user.bar.offset, 0x1000, | 251 | 1, fifo->user.bar->addr, 0x1000, |
256 | oclass, &chan->base); | 252 | oclass, &chan->base); |
257 | if (ret) | 253 | if (ret) |
258 | return ret; | 254 | return ret; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c index 1c3ee4410287..368f5f5138a3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c | |||
@@ -117,7 +117,7 @@ gk104_fifo_gpfifo_engine_init(struct nvkm_fifo_chan *base, | |||
117 | u32 offset = gk104_fifo_gpfifo_engine_addr(engine); | 117 | u32 offset = gk104_fifo_gpfifo_engine_addr(engine); |
118 | 118 | ||
119 | if (offset) { | 119 | if (offset) { |
120 | u64 addr = chan->engn[engine->subdev.index].vma.offset; | 120 | u64 addr = chan->engn[engine->subdev.index].vma->addr; |
121 | u32 datalo = lower_32_bits(addr) | 0x00000004; | 121 | u32 datalo = lower_32_bits(addr) | 0x00000004; |
122 | u32 datahi = upper_32_bits(addr); | 122 | u32 datahi = upper_32_bits(addr); |
123 | nvkm_kmap(inst); | 123 | nvkm_kmap(inst); |
@@ -138,11 +138,7 @@ gk104_fifo_gpfifo_engine_dtor(struct nvkm_fifo_chan *base, | |||
138 | struct nvkm_engine *engine) | 138 | struct nvkm_engine *engine) |
139 | { | 139 | { |
140 | struct gk104_fifo_chan *chan = gk104_fifo_chan(base); | 140 | struct gk104_fifo_chan *chan = gk104_fifo_chan(base); |
141 | struct nvkm_vma *vma = &chan->engn[engine->subdev.index].vma; | 141 | nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma); |
142 | if (vma->vm) { | ||
143 | nvkm_vm_unmap(vma); | ||
144 | nvkm_vm_put(vma); | ||
145 | } | ||
146 | nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); | 142 | nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); |
147 | } | 143 | } |
148 | 144 | ||
@@ -162,13 +158,13 @@ gk104_fifo_gpfifo_engine_ctor(struct nvkm_fifo_chan *base, | |||
162 | if (ret) | 158 | if (ret) |
163 | return ret; | 159 | return ret; |
164 | 160 | ||
165 | ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12, | 161 | ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size, |
166 | NV_MEM_ACCESS_RW, &chan->engn[engn].vma); | 162 | &chan->engn[engn].vma); |
167 | if (ret) | 163 | if (ret) |
168 | return ret; | 164 | return ret; |
169 | 165 | ||
170 | return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm, | 166 | return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm, |
171 | &chan->engn[engn].vma, NULL, 0); | 167 | chan->engn[engn].vma, NULL, 0); |
172 | } | 168 | } |
173 | 169 | ||
174 | static void | 170 | static void |
@@ -291,7 +287,7 @@ gk104_fifo_gpfifo_new_(const struct gk104_fifo_chan_func *func, | |||
291 | 287 | ||
292 | ret = nvkm_fifo_chan_ctor(&gk104_fifo_gpfifo_func, &fifo->base, | 288 | ret = nvkm_fifo_chan_ctor(&gk104_fifo_gpfifo_func, &fifo->base, |
293 | 0x1000, 0x1000, true, vm, 0, subdevs, | 289 | 0x1000, 0x1000, true, vm, 0, subdevs, |
294 | 1, fifo->user.bar.offset, 0x200, | 290 | 1, fifo->user.bar->addr, 0x200, |
295 | oclass, &chan->base); | 291 | oclass, &chan->base); |
296 | if (ret) | 292 | if (ret) |
297 | return ret; | 293 | return ret; |