diff options
author | Tony Lindgren <tony@atomide.com> | 2017-06-12 03:07:44 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2017-06-12 03:07:44 -0400 |
commit | 018b732458ac39c4858d9840c0e32310bc0930dd (patch) | |
tree | 84f178b1fe40e67eeb8dc523686f73a02dc5cb00 | |
parent | c76e4d2e50068ddd82fe18f86d05a33733877059 (diff) | |
parent | 0e78b1218df37f1a1834dff853d967444e332bab (diff) |
Merge branch 'omap-for-v4.13/legacy-v2' into omap-for-v4.13/soc-v3
-rw-r--r-- | arch/arm/mach-omap2/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-n8x0.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 175 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 59 | ||||
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 70 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_device.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 23 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/opp.c | 104 | ||||
-rw-r--r-- | arch/arm/mach-omap2/opp3xxx_data.c | 86 | ||||
-rw-r--r-- | arch/arm/mach-omap2/opp4xxx_data.c | 79 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pmu.c | 97 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm3xxx.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 59 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm_common.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer.c | 169 | ||||
-rw-r--r-- | arch/arm/mach-omap2/wd_timer.c | 28 |
17 files changed, 61 insertions, 940 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index c89757abb0ae..779fb1f680b3 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -69,7 +69,6 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o | |||
69 | 69 | ||
70 | # OPP table initialization | 70 | # OPP table initialization |
71 | ifeq ($(CONFIG_PM_OPP),y) | 71 | ifeq ($(CONFIG_PM_OPP),y) |
72 | obj-y += opp.o | ||
73 | obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o | 72 | obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o |
74 | obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o | 73 | obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o |
75 | endif | 74 | endif |
@@ -220,9 +219,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o | |||
220 | obj-$(CONFIG_SOC_OMAP5) += omap_hwmod_54xx_data.o | 219 | obj-$(CONFIG_SOC_OMAP5) += omap_hwmod_54xx_data.o |
221 | obj-$(CONFIG_SOC_DRA7XX) += omap_hwmod_7xx_data.o | 220 | obj-$(CONFIG_SOC_DRA7XX) += omap_hwmod_7xx_data.o |
222 | 221 | ||
223 | # EMU peripherals | ||
224 | obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o | ||
225 | |||
226 | # OMAP2420 MSDI controller integration support ("MMC") | 222 | # OMAP2420 MSDI controller integration support ("MMC") |
227 | obj-$(CONFIG_SOC_OMAP2420) += msdi.o | 223 | obj-$(CONFIG_SOC_OMAP2420) += msdi.o |
228 | 224 | ||
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 91272db09fa3..20f25539d572 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -53,14 +53,12 @@ static u32 board_caps; | |||
53 | 53 | ||
54 | static void board_check_revision(void) | 54 | static void board_check_revision(void) |
55 | { | 55 | { |
56 | if (of_have_populated_dt()) { | 56 | if (of_machine_is_compatible("nokia,n800")) |
57 | if (of_machine_is_compatible("nokia,n800")) | 57 | board_caps = NOKIA_N800; |
58 | board_caps = NOKIA_N800; | 58 | else if (of_machine_is_compatible("nokia,n810")) |
59 | else if (of_machine_is_compatible("nokia,n810")) | 59 | board_caps = NOKIA_N810; |
60 | board_caps = NOKIA_N810; | 60 | else if (of_machine_is_compatible("nokia,n810-wimax")) |
61 | else if (of_machine_is_compatible("nokia,n810-wimax")) | 61 | board_caps = NOKIA_N810_WIMAX; |
62 | board_caps = NOKIA_N810_WIMAX; | ||
63 | } | ||
64 | 62 | ||
65 | if (!board_caps) | 63 | if (!board_caps) |
66 | pr_err("Unknown board\n"); | 64 | pr_err("Unknown board\n"); |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 473951203104..93057fb65f44 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -36,130 +36,6 @@ | |||
36 | #define L3_MODULES_MAX_LEN 12 | 36 | #define L3_MODULES_MAX_LEN 12 |
37 | #define L3_MODULES 3 | 37 | #define L3_MODULES 3 |
38 | 38 | ||
39 | static int __init omap3_l3_init(void) | ||
40 | { | ||
41 | struct omap_hwmod *oh; | ||
42 | struct platform_device *pdev; | ||
43 | char oh_name[L3_MODULES_MAX_LEN]; | ||
44 | |||
45 | /* | ||
46 | * To avoid code running on other OMAPs in | ||
47 | * multi-omap builds | ||
48 | */ | ||
49 | if (!(cpu_is_omap34xx()) || of_have_populated_dt()) | ||
50 | return -ENODEV; | ||
51 | |||
52 | snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main"); | ||
53 | |||
54 | oh = omap_hwmod_lookup(oh_name); | ||
55 | |||
56 | if (!oh) | ||
57 | pr_err("could not look up %s\n", oh_name); | ||
58 | |||
59 | pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0); | ||
60 | |||
61 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); | ||
62 | |||
63 | return PTR_ERR_OR_ZERO(pdev); | ||
64 | } | ||
65 | omap_postcore_initcall(omap3_l3_init); | ||
66 | |||
67 | static inline void omap_init_sti(void) {} | ||
68 | |||
69 | #if IS_ENABLED(CONFIG_SPI_OMAP24XX) | ||
70 | |||
71 | #include <linux/platform_data/spi-omap2-mcspi.h> | ||
72 | |||
73 | static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused) | ||
74 | { | ||
75 | struct platform_device *pdev; | ||
76 | char *name = "omap2_mcspi"; | ||
77 | struct omap2_mcspi_platform_config *pdata; | ||
78 | static int spi_num; | ||
79 | struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; | ||
80 | |||
81 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | ||
82 | if (!pdata) { | ||
83 | pr_err("Memory allocation for McSPI device failed\n"); | ||
84 | return -ENOMEM; | ||
85 | } | ||
86 | |||
87 | pdata->num_cs = mcspi_attrib->num_chipselect; | ||
88 | switch (oh->class->rev) { | ||
89 | case OMAP2_MCSPI_REV: | ||
90 | case OMAP3_MCSPI_REV: | ||
91 | pdata->regs_offset = 0; | ||
92 | break; | ||
93 | case OMAP4_MCSPI_REV: | ||
94 | pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; | ||
95 | break; | ||
96 | default: | ||
97 | pr_err("Invalid McSPI Revision value\n"); | ||
98 | kfree(pdata); | ||
99 | return -EINVAL; | ||
100 | } | ||
101 | |||
102 | spi_num++; | ||
103 | pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata)); | ||
104 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", | ||
105 | name, oh->name); | ||
106 | kfree(pdata); | ||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static void omap_init_mcspi(void) | ||
111 | { | ||
112 | omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); | ||
113 | } | ||
114 | |||
115 | #else | ||
116 | static inline void omap_init_mcspi(void) {} | ||
117 | #endif | ||
118 | |||
119 | /** | ||
120 | * omap_init_rng - bind the RNG hwmod to the RNG omap_device | ||
121 | * | ||
122 | * Bind the RNG hwmod to the RNG omap_device. No return value. | ||
123 | */ | ||
124 | static void __init omap_init_rng(void) | ||
125 | { | ||
126 | struct omap_hwmod *oh; | ||
127 | struct platform_device *pdev; | ||
128 | |||
129 | oh = omap_hwmod_lookup("rng"); | ||
130 | if (!oh) | ||
131 | return; | ||
132 | |||
133 | pdev = omap_device_build("omap_rng", -1, oh, NULL, 0); | ||
134 | WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n"); | ||
135 | } | ||
136 | |||
137 | static void __init omap_init_sham(void) | ||
138 | { | ||
139 | struct omap_hwmod *oh; | ||
140 | struct platform_device *pdev; | ||
141 | |||
142 | oh = omap_hwmod_lookup("sham"); | ||
143 | if (!oh) | ||
144 | return; | ||
145 | |||
146 | pdev = omap_device_build("omap-sham", -1, oh, NULL, 0); | ||
147 | WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n"); | ||
148 | } | ||
149 | |||
150 | static void __init omap_init_aes(void) | ||
151 | { | ||
152 | struct omap_hwmod *oh; | ||
153 | struct platform_device *pdev; | ||
154 | |||
155 | oh = omap_hwmod_lookup("aes"); | ||
156 | if (!oh) | ||
157 | return; | ||
158 | |||
159 | pdev = omap_device_build("omap-aes", -1, oh, NULL, 0); | ||
160 | WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n"); | ||
161 | } | ||
162 | |||
163 | /*-------------------------------------------------------------------------*/ | 39 | /*-------------------------------------------------------------------------*/ |
164 | 40 | ||
165 | #if IS_ENABLED(CONFIG_VIDEO_OMAP2_VOUT) | 41 | #if IS_ENABLED(CONFIG_VIDEO_OMAP2_VOUT) |
@@ -185,54 +61,3 @@ int __init omap_init_vout(void) | |||
185 | #else | 61 | #else |
186 | int __init omap_init_vout(void) { return 0; } | 62 | int __init omap_init_vout(void) { return 0; } |
187 | #endif | 63 | #endif |
188 | |||
189 | /*-------------------------------------------------------------------------*/ | ||
190 | |||
191 | static int __init omap2_init_devices(void) | ||
192 | { | ||
193 | /* Enable dummy states for those platforms without pinctrl support */ | ||
194 | if (!of_have_populated_dt()) | ||
195 | pinctrl_provide_dummies(); | ||
196 | |||
197 | /* If dtb is there, the devices will be created dynamically */ | ||
198 | if (!of_have_populated_dt()) { | ||
199 | /* | ||
200 | * please keep these calls, and their implementations above, | ||
201 | * in alphabetical order so they're easier to sort through. | ||
202 | */ | ||
203 | omap_init_mcspi(); | ||
204 | omap_init_sham(); | ||
205 | omap_init_aes(); | ||
206 | omap_init_rng(); | ||
207 | } | ||
208 | omap_init_sti(); | ||
209 | |||
210 | return 0; | ||
211 | } | ||
212 | omap_arch_initcall(omap2_init_devices); | ||
213 | |||
214 | static int __init omap_gpmc_init(void) | ||
215 | { | ||
216 | struct omap_hwmod *oh; | ||
217 | struct platform_device *pdev; | ||
218 | char *oh_name = "gpmc"; | ||
219 | |||
220 | /* | ||
221 | * if the board boots up with a populated DT, do not | ||
222 | * manually add the device from this initcall | ||
223 | */ | ||
224 | if (of_have_populated_dt()) | ||
225 | return -ENODEV; | ||
226 | |||
227 | oh = omap_hwmod_lookup(oh_name); | ||
228 | if (!oh) { | ||
229 | pr_err("Could not look up %s\n", oh_name); | ||
230 | return -ENODEV; | ||
231 | } | ||
232 | |||
233 | pdev = omap_device_build("omap-gpmc", -1, oh, NULL, 0); | ||
234 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); | ||
235 | |||
236 | return PTR_ERR_OR_ZERO(pdev); | ||
237 | } | ||
238 | omap_postcore_initcall(omap_gpmc_init); | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 5aafb8449c40..1d739d1a0a65 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -493,67 +493,39 @@ void __init omap3_init_early(void) | |||
493 | omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); | 493 | omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); |
494 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), | 494 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), |
495 | OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); | 495 | OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); |
496 | /* XXX: remove these once OMAP3 is DT only */ | ||
497 | if (!of_have_populated_dt()) { | ||
498 | omap2_set_globals_control( | ||
499 | OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE)); | ||
500 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); | ||
501 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), | ||
502 | NULL); | ||
503 | } | ||
504 | omap2_control_base_init(); | 496 | omap2_control_base_init(); |
505 | omap3xxx_check_revision(); | 497 | omap3xxx_check_revision(); |
506 | omap3xxx_check_features(); | 498 | omap3xxx_check_features(); |
507 | omap2_prcm_base_init(); | 499 | omap2_prcm_base_init(); |
508 | /* XXX: remove these once OMAP3 is DT only */ | ||
509 | if (!of_have_populated_dt()) { | ||
510 | omap3xxx_prm_init(NULL); | ||
511 | omap3xxx_cm_init(NULL); | ||
512 | } | ||
513 | omap3xxx_voltagedomains_init(); | 500 | omap3xxx_voltagedomains_init(); |
514 | omap3xxx_powerdomains_init(); | 501 | omap3xxx_powerdomains_init(); |
515 | omap3xxx_clockdomains_init(); | 502 | omap3xxx_clockdomains_init(); |
516 | omap3xxx_hwmod_init(); | 503 | omap3xxx_hwmod_init(); |
517 | omap_hwmod_init_postsetup(); | 504 | omap_hwmod_init_postsetup(); |
518 | if (!of_have_populated_dt()) { | ||
519 | omap3_control_legacy_iomap_init(); | ||
520 | if (soc_is_am35xx()) | ||
521 | omap_clk_soc_init = am35xx_clk_legacy_init; | ||
522 | else if (cpu_is_omap3630()) | ||
523 | omap_clk_soc_init = omap36xx_clk_legacy_init; | ||
524 | else if (omap_rev() == OMAP3430_REV_ES1_0) | ||
525 | omap_clk_soc_init = omap3430es1_clk_legacy_init; | ||
526 | else | ||
527 | omap_clk_soc_init = omap3430_clk_legacy_init; | ||
528 | } | ||
529 | } | 505 | } |
530 | 506 | ||
531 | void __init omap3430_init_early(void) | 507 | void __init omap3430_init_early(void) |
532 | { | 508 | { |
533 | omap3_init_early(); | 509 | omap3_init_early(); |
534 | if (of_have_populated_dt()) | 510 | omap_clk_soc_init = omap3430_dt_clk_init; |
535 | omap_clk_soc_init = omap3430_dt_clk_init; | ||
536 | } | 511 | } |
537 | 512 | ||
538 | void __init omap35xx_init_early(void) | 513 | void __init omap35xx_init_early(void) |
539 | { | 514 | { |
540 | omap3_init_early(); | 515 | omap3_init_early(); |
541 | if (of_have_populated_dt()) | 516 | omap_clk_soc_init = omap3430_dt_clk_init; |
542 | omap_clk_soc_init = omap3430_dt_clk_init; | ||
543 | } | 517 | } |
544 | 518 | ||
545 | void __init omap3630_init_early(void) | 519 | void __init omap3630_init_early(void) |
546 | { | 520 | { |
547 | omap3_init_early(); | 521 | omap3_init_early(); |
548 | if (of_have_populated_dt()) | 522 | omap_clk_soc_init = omap3630_dt_clk_init; |
549 | omap_clk_soc_init = omap3630_dt_clk_init; | ||
550 | } | 523 | } |
551 | 524 | ||
552 | void __init am35xx_init_early(void) | 525 | void __init am35xx_init_early(void) |
553 | { | 526 | { |
554 | omap3_init_early(); | 527 | omap3_init_early(); |
555 | if (of_have_populated_dt()) | 528 | omap_clk_soc_init = am35xx_dt_clk_init; |
556 | omap_clk_soc_init = am35xx_dt_clk_init; | ||
557 | } | 529 | } |
558 | 530 | ||
559 | void __init omap3_init_late(void) | 531 | void __init omap3_init_late(void) |
@@ -628,8 +600,7 @@ void __init ti816x_init_early(void) | |||
628 | ti816x_clockdomains_init(); | 600 | ti816x_clockdomains_init(); |
629 | dm816x_hwmod_init(); | 601 | dm816x_hwmod_init(); |
630 | omap_hwmod_init_postsetup(); | 602 | omap_hwmod_init_postsetup(); |
631 | if (of_have_populated_dt()) | 603 | omap_clk_soc_init = dm816x_dt_clk_init; |
632 | omap_clk_soc_init = dm816x_dt_clk_init; | ||
633 | } | 604 | } |
634 | #endif | 605 | #endif |
635 | 606 | ||
@@ -785,21 +756,19 @@ int __init omap_clk_init(void) | |||
785 | 756 | ||
786 | omap2_clk_setup_ll_ops(); | 757 | omap2_clk_setup_ll_ops(); |
787 | 758 | ||
788 | if (of_have_populated_dt()) { | 759 | ret = omap_control_init(); |
789 | ret = omap_control_init(); | 760 | if (ret) |
790 | if (ret) | 761 | return ret; |
791 | return ret; | ||
792 | 762 | ||
793 | ret = omap_prcm_init(); | 763 | ret = omap_prcm_init(); |
794 | if (ret) | 764 | if (ret) |
795 | return ret; | 765 | return ret; |
796 | 766 | ||
797 | of_clk_init(NULL); | 767 | of_clk_init(NULL); |
798 | 768 | ||
799 | ti_dt_clk_init_retry_clks(); | 769 | ti_dt_clk_init_retry_clks(); |
800 | 770 | ||
801 | ti_dt_clockdomains_setup(); | 771 | ti_dt_clockdomains_setup(); |
802 | } | ||
803 | 772 | ||
804 | ret = omap_clk_soc_init(); | 773 | ret = omap_clk_soc_init(); |
805 | 774 | ||
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index fc04be74e064..4acc0dae27e0 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -53,73 +53,3 @@ void __init omap3_mcbsp_init_pdata_callback( | |||
53 | 53 | ||
54 | pdata->force_ick_on = omap3_mcbsp_force_ick_on; | 54 | pdata->force_ick_on = omap3_mcbsp_force_ick_on; |
55 | } | 55 | } |
56 | |||
57 | static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | ||
58 | { | ||
59 | int id, count = 1; | ||
60 | char *name = "omap-mcbsp"; | ||
61 | struct omap_hwmod *oh_device[2]; | ||
62 | struct omap_mcbsp_platform_data *pdata = NULL; | ||
63 | struct platform_device *pdev; | ||
64 | |||
65 | sscanf(oh->name, "mcbsp%d", &id); | ||
66 | |||
67 | pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL); | ||
68 | if (!pdata) { | ||
69 | pr_err("%s: No memory for mcbsp\n", __func__); | ||
70 | return -ENOMEM; | ||
71 | } | ||
72 | |||
73 | pdata->reg_step = 4; | ||
74 | if (oh->class->rev < MCBSP_CONFIG_TYPE2) { | ||
75 | pdata->reg_size = 2; | ||
76 | } else { | ||
77 | pdata->reg_size = 4; | ||
78 | pdata->has_ccr = true; | ||
79 | } | ||
80 | |||
81 | if (oh->class->rev == MCBSP_CONFIG_TYPE2) { | ||
82 | /* The FIFO has 128 locations */ | ||
83 | pdata->buffer_size = 0x80; | ||
84 | } else if (oh->class->rev == MCBSP_CONFIG_TYPE3) { | ||
85 | if (id == 2) | ||
86 | /* The FIFO has 1024 + 256 locations */ | ||
87 | pdata->buffer_size = 0x500; | ||
88 | else | ||
89 | /* The FIFO has 128 locations */ | ||
90 | pdata->buffer_size = 0x80; | ||
91 | } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) { | ||
92 | /* The FIFO has 128 locations for all instances */ | ||
93 | pdata->buffer_size = 0x80; | ||
94 | } | ||
95 | |||
96 | if (oh->class->rev >= MCBSP_CONFIG_TYPE3) | ||
97 | pdata->has_wakeup = true; | ||
98 | |||
99 | oh_device[0] = oh; | ||
100 | |||
101 | if (oh->dev_attr) { | ||
102 | oh_device[1] = omap_hwmod_lookup(( | ||
103 | (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); | ||
104 | pdata->force_ick_on = omap3_mcbsp_force_ick_on; | ||
105 | count++; | ||
106 | } | ||
107 | pdev = omap_device_build_ss(name, id, oh_device, count, pdata, | ||
108 | sizeof(*pdata)); | ||
109 | kfree(pdata); | ||
110 | if (IS_ERR(pdev)) { | ||
111 | pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, | ||
112 | name, oh->name); | ||
113 | return PTR_ERR(pdev); | ||
114 | } | ||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static int __init omap2_mcbsp_init(void) | ||
119 | { | ||
120 | if (!of_have_populated_dt()) | ||
121 | omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); | ||
122 | |||
123 | return 0; | ||
124 | } | ||
125 | omap_arch_initcall(omap2_mcbsp_init); | ||
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index f989145480c8..ef9ffb8ac912 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c | |||
@@ -65,7 +65,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, | |||
65 | 65 | ||
66 | r = clk_get_sys(NULL, clk_name); | 66 | r = clk_get_sys(NULL, clk_name); |
67 | 67 | ||
68 | if (IS_ERR(r) && of_have_populated_dt()) { | 68 | if (IS_ERR(r)) { |
69 | struct of_phandle_args clkspec; | 69 | struct of_phandle_args clkspec; |
70 | 70 | ||
71 | clkspec.np = of_find_node_by_name(NULL, clk_name); | 71 | clkspec.np = of_find_node_by_name(NULL, clk_name); |
@@ -953,9 +953,6 @@ static int __init omap_device_late_init(void) | |||
953 | { | 953 | { |
954 | bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle); | 954 | bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle); |
955 | 955 | ||
956 | WARN(!of_have_populated_dt(), | ||
957 | "legacy booting deprecated, please update to boot with .dts\n"); | ||
958 | |||
959 | return 0; | 956 | return 0; |
960 | } | 957 | } |
961 | omap_late_initcall_sync(omap_device_late_init); | 958 | omap_late_initcall_sync(omap_device_late_init); |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 8bcea0d83fa0..0f7afdaf80d3 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -2334,24 +2334,21 @@ static int __init _init(struct omap_hwmod *oh, void *data) | |||
2334 | { | 2334 | { |
2335 | int r, index; | 2335 | int r, index; |
2336 | struct device_node *np = NULL; | 2336 | struct device_node *np = NULL; |
2337 | struct device_node *bus; | ||
2337 | 2338 | ||
2338 | if (oh->_state != _HWMOD_STATE_REGISTERED) | 2339 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
2339 | return 0; | 2340 | return 0; |
2340 | 2341 | ||
2341 | if (of_have_populated_dt()) { | 2342 | bus = of_find_node_by_name(NULL, "ocp"); |
2342 | struct device_node *bus; | 2343 | if (!bus) |
2343 | 2344 | return -ENODEV; | |
2344 | bus = of_find_node_by_name(NULL, "ocp"); | ||
2345 | if (!bus) | ||
2346 | return -ENODEV; | ||
2347 | 2345 | ||
2348 | r = of_dev_hwmod_lookup(bus, oh, &index, &np); | 2346 | r = of_dev_hwmod_lookup(bus, oh, &index, &np); |
2349 | if (r) | 2347 | if (r) |
2350 | pr_debug("omap_hwmod: %s missing dt data\n", oh->name); | 2348 | pr_debug("omap_hwmod: %s missing dt data\n", oh->name); |
2351 | else if (np && index) | 2349 | else if (np && index) |
2352 | pr_warn("omap_hwmod: %s using broken dt data from %s\n", | 2350 | pr_warn("omap_hwmod: %s using broken dt data from %s\n", |
2353 | oh->name, np->name); | 2351 | oh->name, np->name); |
2354 | } | ||
2355 | 2352 | ||
2356 | r = _init_mpu_rt_base(oh, NULL, index, np); | 2353 | r = _init_mpu_rt_base(oh, NULL, index, np); |
2357 | if (r < 0) { | 2354 | if (r < 0) { |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 1c6ca4d5fa2d..c3276436b0ae 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -3204,8 +3204,7 @@ int __init omap3xxx_hwmod_init(void) | |||
3204 | * If DT information is missing, enable them only for GP devices. | 3204 | * If DT information is missing, enable them only for GP devices. |
3205 | */ | 3205 | */ |
3206 | 3206 | ||
3207 | if (of_have_populated_dt()) | 3207 | bus = of_find_node_by_name(NULL, "ocp"); |
3208 | bus = of_find_node_by_name(NULL, "ocp"); | ||
3209 | 3208 | ||
3210 | if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) { | 3209 | if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) { |
3211 | r = omap_hwmod_register_links(h_sham); | 3210 | r = omap_hwmod_register_links(h_sham); |
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c deleted file mode 100644 index a358a07e18f2..000000000000 --- a/arch/arm/mach-omap2/opp.c +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP SoC specific OPP wrapper function | ||
3 | * | ||
4 | * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/ | ||
5 | * Nishanth Menon | ||
6 | * Kevin Hilman | ||
7 | * Copyright (C) 2010 Nokia Corporation. | ||
8 | * Eduardo Valentin | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
15 | * kind, whether express or implied; without even the implied warranty | ||
16 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | */ | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <linux/pm_opp.h> | ||
22 | #include <linux/cpu.h> | ||
23 | |||
24 | #include "omap_device.h" | ||
25 | |||
26 | #include "omap_opp_data.h" | ||
27 | |||
28 | /* Temp variable to allow multiple calls */ | ||
29 | static u8 __initdata omap_table_init; | ||
30 | |||
31 | /** | ||
32 | * omap_init_opp_table() - Initialize opp table as per the CPU type | ||
33 | * @opp_def: opp default list for this silicon | ||
34 | * @opp_def_size: number of opp entries for this silicon | ||
35 | * | ||
36 | * Register the initial OPP table with the OPP library based on the CPU | ||
37 | * type. This is meant to be used only by SoC specific registration. | ||
38 | */ | ||
39 | int __init omap_init_opp_table(struct omap_opp_def *opp_def, | ||
40 | u32 opp_def_size) | ||
41 | { | ||
42 | int i, r; | ||
43 | |||
44 | if (of_have_populated_dt()) | ||
45 | return -EINVAL; | ||
46 | |||
47 | if (!opp_def || !opp_def_size) { | ||
48 | pr_err("%s: invalid params!\n", __func__); | ||
49 | return -EINVAL; | ||
50 | } | ||
51 | |||
52 | /* | ||
53 | * Initialize only if not already initialized even if the previous | ||
54 | * call failed, because, no reason we'd succeed again. | ||
55 | */ | ||
56 | if (omap_table_init) | ||
57 | return -EEXIST; | ||
58 | omap_table_init = 1; | ||
59 | |||
60 | /* Lets now register with OPP library */ | ||
61 | for (i = 0; i < opp_def_size; i++, opp_def++) { | ||
62 | struct omap_hwmod *oh; | ||
63 | struct device *dev; | ||
64 | |||
65 | if (!opp_def->hwmod_name) { | ||
66 | pr_err("%s: NULL name of omap_hwmod, failing [%d].\n", | ||
67 | __func__, i); | ||
68 | return -EINVAL; | ||
69 | } | ||
70 | |||
71 | if (!strncmp(opp_def->hwmod_name, "mpu", 3)) { | ||
72 | /* | ||
73 | * All current OMAPs share voltage rail and | ||
74 | * clock source, so CPU0 is used to represent | ||
75 | * the MPU-SS. | ||
76 | */ | ||
77 | dev = get_cpu_device(0); | ||
78 | } else { | ||
79 | oh = omap_hwmod_lookup(opp_def->hwmod_name); | ||
80 | if (!oh || !oh->od) { | ||
81 | pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", | ||
82 | __func__, opp_def->hwmod_name, i); | ||
83 | continue; | ||
84 | } | ||
85 | dev = &oh->od->pdev->dev; | ||
86 | } | ||
87 | |||
88 | r = dev_pm_opp_add(dev, opp_def->freq, opp_def->u_volt); | ||
89 | if (r) { | ||
90 | dev_err(dev, "%s: add OPP %ld failed for %s [%d] result=%d\n", | ||
91 | __func__, opp_def->freq, | ||
92 | opp_def->hwmod_name, i, r); | ||
93 | } else { | ||
94 | if (!opp_def->default_available) | ||
95 | r = dev_pm_opp_disable(dev, opp_def->freq); | ||
96 | if (r) | ||
97 | dev_err(dev, "%s: disable %ld failed for %s [%d] result=%d\n", | ||
98 | __func__, opp_def->freq, | ||
99 | opp_def->hwmod_name, i, r); | ||
100 | } | ||
101 | } | ||
102 | |||
103 | return 0; | ||
104 | } | ||
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c index fc67add76444..c2d459f5b0da 100644 --- a/arch/arm/mach-omap2/opp3xxx_data.c +++ b/arch/arm/mach-omap2/opp3xxx_data.c | |||
@@ -83,89 +83,3 @@ struct omap_volt_data omap36xx_vddcore_volt_data[] = { | |||
83 | VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), | 83 | VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), |
84 | VOLT_DATA_DEFINE(0, 0, 0, 0), | 84 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
85 | }; | 85 | }; |
86 | |||
87 | /* OPP data */ | ||
88 | |||
89 | static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { | ||
90 | /* MPU OPP1 */ | ||
91 | OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV), | ||
92 | /* MPU OPP2 */ | ||
93 | OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV), | ||
94 | /* MPU OPP3 */ | ||
95 | OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV), | ||
96 | /* MPU OPP4 */ | ||
97 | OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), | ||
98 | /* MPU OPP5 */ | ||
99 | OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), | ||
100 | |||
101 | /* | ||
102 | * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is | ||
103 | * almost the same than the one at 83MHz thus providing very little | ||
104 | * gain for the power point of view. In term of energy it will even | ||
105 | * increase the consumption due to the very negative performance | ||
106 | * impact that frequency will do to the MPU and the whole system in | ||
107 | * general. | ||
108 | */ | ||
109 | OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV), | ||
110 | /* L3 OPP2 */ | ||
111 | OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV), | ||
112 | /* L3 OPP3 */ | ||
113 | OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV), | ||
114 | |||
115 | /* DSP OPP1 */ | ||
116 | OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV), | ||
117 | /* DSP OPP2 */ | ||
118 | OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV), | ||
119 | /* DSP OPP3 */ | ||
120 | OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV), | ||
121 | /* DSP OPP4 */ | ||
122 | OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), | ||
123 | /* DSP OPP5 */ | ||
124 | OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), | ||
125 | }; | ||
126 | |||
127 | static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { | ||
128 | /* MPU OPP1 - OPP50 */ | ||
129 | OPP_INITIALIZER("mpu", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV), | ||
130 | /* MPU OPP2 - OPP100 */ | ||
131 | OPP_INITIALIZER("mpu", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV), | ||
132 | /* MPU OPP3 - OPP-Turbo */ | ||
133 | OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV), | ||
134 | /* MPU OPP4 - OPP-SB */ | ||
135 | OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV), | ||
136 | |||
137 | /* L3 OPP1 - OPP50 */ | ||
138 | OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV), | ||
139 | /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */ | ||
140 | OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV), | ||
141 | |||
142 | /* DSP OPP1 - OPP50 */ | ||
143 | OPP_INITIALIZER("iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV), | ||
144 | /* DSP OPP2 - OPP100 */ | ||
145 | OPP_INITIALIZER("iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV), | ||
146 | /* DSP OPP3 - OPP-Turbo */ | ||
147 | OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV), | ||
148 | /* DSP OPP4 - OPP-SB */ | ||
149 | OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV), | ||
150 | }; | ||
151 | |||
152 | /** | ||
153 | * omap3_opp_init() - initialize omap3 opp table | ||
154 | */ | ||
155 | int __init omap3_opp_init(void) | ||
156 | { | ||
157 | int r = -ENODEV; | ||
158 | |||
159 | if (!cpu_is_omap34xx()) | ||
160 | return r; | ||
161 | |||
162 | if (cpu_is_omap3630()) | ||
163 | r = omap_init_opp_table(omap36xx_opp_def_list, | ||
164 | ARRAY_SIZE(omap36xx_opp_def_list)); | ||
165 | else | ||
166 | r = omap_init_opp_table(omap34xx_opp_def_list, | ||
167 | ARRAY_SIZE(omap34xx_opp_def_list)); | ||
168 | |||
169 | return r; | ||
170 | } | ||
171 | omap_device_initcall(omap3_opp_init); | ||
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c index 1ef7a3e5ce4a..adea43ea1c60 100644 --- a/arch/arm/mach-omap2/opp4xxx_data.c +++ b/arch/arm/mach-omap2/opp4xxx_data.c | |||
@@ -63,29 +63,6 @@ struct omap_volt_data omap443x_vdd_core_volt_data[] = { | |||
63 | VOLT_DATA_DEFINE(0, 0, 0, 0), | 63 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
64 | }; | 64 | }; |
65 | 65 | ||
66 | |||
67 | static struct omap_opp_def __initdata omap443x_opp_def_list[] = { | ||
68 | /* MPU OPP1 - OPP50 */ | ||
69 | OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV), | ||
70 | /* MPU OPP2 - OPP100 */ | ||
71 | OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV), | ||
72 | /* MPU OPP3 - OPP-Turbo */ | ||
73 | OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV), | ||
74 | /* MPU OPP4 - OPP-SB */ | ||
75 | OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV), | ||
76 | /* L3 OPP1 - OPP50 */ | ||
77 | OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV), | ||
78 | /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */ | ||
79 | OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV), | ||
80 | /* IVA OPP1 - OPP50 */ | ||
81 | OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV), | ||
82 | /* IVA OPP2 - OPP100 */ | ||
83 | OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV), | ||
84 | /* IVA OPP3 - OPP-Turbo */ | ||
85 | OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV), | ||
86 | /* TODO: add DSP, aess, fdif, gpu */ | ||
87 | }; | ||
88 | |||
89 | #define OMAP4460_VDD_MPU_OPP50_UV 1025000 | 66 | #define OMAP4460_VDD_MPU_OPP50_UV 1025000 |
90 | #define OMAP4460_VDD_MPU_OPP100_UV 1200000 | 67 | #define OMAP4460_VDD_MPU_OPP100_UV 1200000 |
91 | #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 | 68 | #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 |
@@ -122,59 +99,3 @@ struct omap_volt_data omap446x_vdd_core_volt_data[] = { | |||
122 | VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), | 99 | VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), |
123 | VOLT_DATA_DEFINE(0, 0, 0, 0), | 100 | VOLT_DATA_DEFINE(0, 0, 0, 0), |
124 | }; | 101 | }; |
125 | |||
126 | static struct omap_opp_def __initdata omap446x_opp_def_list[] = { | ||
127 | /* MPU OPP1 - OPP50 */ | ||
128 | OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV), | ||
129 | /* MPU OPP2 - OPP100 */ | ||
130 | OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV), | ||
131 | /* MPU OPP3 - OPP-Turbo */ | ||
132 | OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV), | ||
133 | /* | ||
134 | * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics | ||
135 | * recommends TPS623631 - confirm and enable the opp in board file | ||
136 | * XXX: May be we should enable these based on mpu capability and | ||
137 | * Exception board files disable it... | ||
138 | */ | ||
139 | OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV), | ||
140 | /* MPU OPP4 - OPP-Nitro SpeedBin */ | ||
141 | OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV), | ||
142 | /* L3 OPP1 - OPP50 */ | ||
143 | OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV), | ||
144 | /* L3 OPP2 - OPP100 */ | ||
145 | OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV), | ||
146 | /* IVA OPP1 - OPP50 */ | ||
147 | OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV), | ||
148 | /* IVA OPP2 - OPP100 */ | ||
149 | OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV), | ||
150 | /* | ||
151 | * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics | ||
152 | * recommends Phoenix VCORE2 which can supply only 600mA - so the ones | ||
153 | * above this OPP frequency, even though OMAP is capable, should be | ||
154 | * enabled by board file which is sure of the chip power capability | ||
155 | */ | ||
156 | OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV), | ||
157 | /* IVA OPP4 - OPP-Nitro */ | ||
158 | OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV), | ||
159 | /* IVA OPP5 - OPP-Nitro SpeedBin*/ | ||
160 | OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV), | ||
161 | |||
162 | /* TODO: add DSP, aess, fdif, gpu */ | ||
163 | }; | ||
164 | |||
165 | /** | ||
166 | * omap4_opp_init() - initialize omap4 opp table | ||
167 | */ | ||
168 | int __init omap4_opp_init(void) | ||
169 | { | ||
170 | int r = -ENODEV; | ||
171 | |||
172 | if (cpu_is_omap443x()) | ||
173 | r = omap_init_opp_table(omap443x_opp_def_list, | ||
174 | ARRAY_SIZE(omap443x_opp_def_list)); | ||
175 | else if (cpu_is_omap446x()) | ||
176 | r = omap_init_opp_table(omap446x_opp_def_list, | ||
177 | ARRAY_SIZE(omap446x_opp_def_list)); | ||
178 | return r; | ||
179 | } | ||
180 | omap_device_initcall(omap4_opp_init); | ||
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c deleted file mode 100644 index d2adfebd3b3f..000000000000 --- a/arch/arm/mach-omap2/pmu.c +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP2 ARM Performance Monitoring Unit (PMU) Support | ||
3 | * | ||
4 | * Copyright (C) 2012 Texas Instruments, Inc. | ||
5 | * | ||
6 | * Contacts: | ||
7 | * Jon Hunter <jon-hunter@ti.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | */ | ||
14 | #include <linux/of.h> | ||
15 | |||
16 | #include <asm/system_info.h> | ||
17 | |||
18 | #include "soc.h" | ||
19 | #include "omap_hwmod.h" | ||
20 | #include "omap_device.h" | ||
21 | |||
22 | static char *omap2_pmu_oh_names[] = {"mpu"}; | ||
23 | static char *omap3_pmu_oh_names[] = {"mpu", "debugss"}; | ||
24 | static char *omap4430_pmu_oh_names[] = {"l3_main_3", "l3_instr", "debugss"}; | ||
25 | static struct platform_device *omap_pmu_dev; | ||
26 | |||
27 | /** | ||
28 | * omap2_init_pmu - creates and registers PMU platform device | ||
29 | * @oh_num: Number of OMAP HWMODs required to create PMU device | ||
30 | * @oh_names: Array of OMAP HWMODS names required to create PMU device | ||
31 | * | ||
32 | * Uses OMAP HWMOD framework to create and register an ARM PMU device | ||
33 | * from a list of HWMOD names passed. Currently supports OMAP2, OMAP3 | ||
34 | * and OMAP4 devices. | ||
35 | */ | ||
36 | static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[]) | ||
37 | { | ||
38 | int i; | ||
39 | struct omap_hwmod *oh[3]; | ||
40 | char *dev_name = cpu_architecture() == CPU_ARCH_ARMv6 ? | ||
41 | "armv6-pmu" : "armv7-pmu"; | ||
42 | |||
43 | if ((!oh_num) || (oh_num > 3)) | ||
44 | return -EINVAL; | ||
45 | |||
46 | for (i = 0; i < oh_num; i++) { | ||
47 | oh[i] = omap_hwmod_lookup(oh_names[i]); | ||
48 | if (!oh[i]) { | ||
49 | pr_err("Could not look up %s hwmod\n", oh_names[i]); | ||
50 | return -ENODEV; | ||
51 | } | ||
52 | } | ||
53 | |||
54 | omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0); | ||
55 | WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n", | ||
56 | dev_name); | ||
57 | |||
58 | return PTR_ERR_OR_ZERO(omap_pmu_dev); | ||
59 | } | ||
60 | |||
61 | static int __init omap_init_pmu(void) | ||
62 | { | ||
63 | unsigned oh_num; | ||
64 | char **oh_names; | ||
65 | |||
66 | /* XXX Remove this check when the CTI driver is available */ | ||
67 | if (cpu_is_omap443x()) { | ||
68 | pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n"); | ||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | if (of_have_populated_dt()) | ||
73 | return 0; | ||
74 | |||
75 | /* | ||
76 | * To create an ARM-PMU device the following HWMODs | ||
77 | * are required for the various OMAP2+ devices. | ||
78 | * | ||
79 | * OMAP24xx: mpu | ||
80 | * OMAP3xxx: mpu, debugss | ||
81 | * OMAP4430: l3_main_3, l3_instr, debugss | ||
82 | * OMAP4460/70: mpu, debugss | ||
83 | */ | ||
84 | if (cpu_is_omap443x()) { | ||
85 | oh_num = ARRAY_SIZE(omap4430_pmu_oh_names); | ||
86 | oh_names = omap4430_pmu_oh_names; | ||
87 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
88 | oh_num = ARRAY_SIZE(omap3_pmu_oh_names); | ||
89 | oh_names = omap3_pmu_oh_names; | ||
90 | } else { | ||
91 | oh_num = ARRAY_SIZE(omap2_pmu_oh_names); | ||
92 | oh_names = omap2_pmu_oh_names; | ||
93 | } | ||
94 | |||
95 | return omap2_init_pmu(oh_num, oh_names); | ||
96 | } | ||
97 | omap_subsys_initcall(omap_init_pmu); | ||
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 718981bb80cd..395cf43b5c5e 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c | |||
@@ -690,6 +690,8 @@ static const struct of_device_id omap3_prm_dt_match_table[] = { | |||
690 | 690 | ||
691 | static int omap3xxx_prm_late_init(void) | 691 | static int omap3xxx_prm_late_init(void) |
692 | { | 692 | { |
693 | struct device_node *np; | ||
694 | int irq_num; | ||
693 | int ret; | 695 | int ret; |
694 | 696 | ||
695 | if (!(prm_features & PRM_HAS_IO_WAKEUP)) | 697 | if (!(prm_features & PRM_HAS_IO_WAKEUP)) |
@@ -702,16 +704,11 @@ static int omap3xxx_prm_late_init(void) | |||
702 | omap3_prcm_irq_setup.reconfigure_io_chain = | 704 | omap3_prcm_irq_setup.reconfigure_io_chain = |
703 | omap3430_pre_es3_1_reconfigure_io_chain; | 705 | omap3430_pre_es3_1_reconfigure_io_chain; |
704 | 706 | ||
705 | if (of_have_populated_dt()) { | 707 | np = of_find_matching_node(NULL, omap3_prm_dt_match_table); |
706 | struct device_node *np; | 708 | if (np) { |
707 | int irq_num; | 709 | irq_num = of_irq_get(np, 0); |
708 | 710 | if (irq_num >= 0) | |
709 | np = of_find_matching_node(NULL, omap3_prm_dt_match_table); | 711 | omap3_prcm_irq_setup.irq = irq_num; |
710 | if (np) { | ||
711 | irq_num = of_irq_get(np, 0); | ||
712 | if (irq_num >= 0) | ||
713 | omap3_prcm_irq_setup.irq = irq_num; | ||
714 | } | ||
715 | } | 712 | } |
716 | 713 | ||
717 | omap3xxx_prm_enable_io_wakeup(); | 714 | omap3xxx_prm_enable_io_wakeup(); |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 30768003f854..b045f974dc47 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -337,27 +337,6 @@ static void omap44xx_prm_reconfigure_io_chain(void) | |||
337 | } | 337 | } |
338 | 338 | ||
339 | /** | 339 | /** |
340 | * omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches | ||
341 | * | ||
342 | * Activates the I/O wakeup event latches and allows events logged by | ||
343 | * those latches to signal a wakeup event to the PRCM. For I/O wakeups | ||
344 | * to occur, WAKEUPENABLE bits must be set in the pad mux registers, and | ||
345 | * omap44xx_prm_reconfigure_io_chain() must be called. No return value. | ||
346 | */ | ||
347 | static void __init omap44xx_prm_enable_io_wakeup(void) | ||
348 | { | ||
349 | s32 inst = omap4_prmst_get_prm_dev_inst(); | ||
350 | |||
351 | if (inst == PRM_INSTANCE_UNKNOWN) | ||
352 | return; | ||
353 | |||
354 | omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK, | ||
355 | OMAP4430_GLOBAL_WUEN_MASK, | ||
356 | inst, | ||
357 | omap4_prcm_irq_setup.pm_ctrl); | ||
358 | } | ||
359 | |||
360 | /** | ||
361 | * omap44xx_prm_read_reset_sources - return the last SoC reset source | 340 | * omap44xx_prm_read_reset_sources - return the last SoC reset source |
362 | * | 341 | * |
363 | * Return a u32 representing the last reset sources of the SoC. The | 342 | * Return a u32 representing the last reset sources of the SoC. The |
@@ -689,8 +668,6 @@ struct pwrdm_ops omap4_pwrdm_operations = { | |||
689 | .pwrdm_has_voltdm = omap4_check_vcvp, | 668 | .pwrdm_has_voltdm = omap4_check_vcvp, |
690 | }; | 669 | }; |
691 | 670 | ||
692 | static int omap44xx_prm_late_init(void); | ||
693 | |||
694 | /* | 671 | /* |
695 | * XXX document | 672 | * XXX document |
696 | */ | 673 | */ |
@@ -698,7 +675,6 @@ static struct prm_ll_data omap44xx_prm_ll_data = { | |||
698 | .read_reset_sources = &omap44xx_prm_read_reset_sources, | 675 | .read_reset_sources = &omap44xx_prm_read_reset_sources, |
699 | .was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old, | 676 | .was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old, |
700 | .clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old, | 677 | .clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old, |
701 | .late_init = &omap44xx_prm_late_init, | ||
702 | .assert_hardreset = omap4_prminst_assert_hardreset, | 678 | .assert_hardreset = omap4_prminst_assert_hardreset, |
703 | .deassert_hardreset = omap4_prminst_deassert_hardreset, | 679 | .deassert_hardreset = omap4_prminst_deassert_hardreset, |
704 | .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, | 680 | .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, |
@@ -735,41 +711,6 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) | |||
735 | return prm_register(&omap44xx_prm_ll_data); | 711 | return prm_register(&omap44xx_prm_ll_data); |
736 | } | 712 | } |
737 | 713 | ||
738 | static int omap44xx_prm_late_init(void) | ||
739 | { | ||
740 | int irq_num; | ||
741 | |||
742 | if (!(prm_features & PRM_HAS_IO_WAKEUP)) | ||
743 | return 0; | ||
744 | |||
745 | /* OMAP4+ is DT only now */ | ||
746 | if (!of_have_populated_dt()) | ||
747 | return 0; | ||
748 | |||
749 | irq_num = of_irq_get(prm_init_data->np, 0); | ||
750 | /* | ||
751 | * Already have OMAP4 IRQ num. For all other platforms, we need | ||
752 | * IRQ numbers from DT | ||
753 | */ | ||
754 | if (irq_num < 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) { | ||
755 | if (irq_num == -EPROBE_DEFER) | ||
756 | return irq_num; | ||
757 | |||
758 | /* Have nothing to do */ | ||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | /* Once OMAP4 DT is filled as well */ | ||
763 | if (irq_num >= 0) { | ||
764 | omap4_prcm_irq_setup.irq = irq_num; | ||
765 | omap4_prcm_irq_setup.xlate_irq = NULL; | ||
766 | } | ||
767 | |||
768 | omap44xx_prm_enable_io_wakeup(); | ||
769 | |||
770 | return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); | ||
771 | } | ||
772 | |||
773 | static void __exit omap44xx_prm_exit(void) | 714 | static void __exit omap44xx_prm_exit(void) |
774 | { | 715 | { |
775 | prm_unregister(&omap44xx_prm_ll_data); | 716 | prm_unregister(&omap44xx_prm_ll_data); |
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 2b138b65129a..538980ee20d4 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -267,10 +267,9 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) | |||
267 | { | 267 | { |
268 | int nr_regs; | 268 | int nr_regs; |
269 | u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG]; | 269 | u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG]; |
270 | int offset, i; | 270 | int offset, i, irq; |
271 | struct irq_chip_generic *gc; | 271 | struct irq_chip_generic *gc; |
272 | struct irq_chip_type *ct; | 272 | struct irq_chip_type *ct; |
273 | unsigned int irq; | ||
274 | 273 | ||
275 | if (!irq_setup) | 274 | if (!irq_setup) |
276 | return -EINVAL; | 275 | return -EINVAL; |
@@ -344,10 +343,8 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) | |||
344 | prcm_irq_chips[i] = gc; | 343 | prcm_irq_chips[i] = gc; |
345 | } | 344 | } |
346 | 345 | ||
347 | if (of_have_populated_dt()) { | 346 | irq = omap_prcm_event_to_irq("io"); |
348 | int irq = omap_prcm_event_to_irq("io"); | 347 | omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain); |
349 | omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain); | ||
350 | } | ||
351 | 348 | ||
352 | return 0; | 349 | return 0; |
353 | 350 | ||
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 70670dfd7135..ce982d193046 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -252,37 +252,27 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | |||
252 | const char **timer_name, | 252 | const char **timer_name, |
253 | int posted) | 253 | int posted) |
254 | { | 254 | { |
255 | char name[10]; /* 10 = sizeof("gptXX_Xck0") */ | ||
256 | const char *oh_name = NULL; | 255 | const char *oh_name = NULL; |
257 | struct device_node *np; | 256 | struct device_node *np; |
258 | struct omap_hwmod *oh; | 257 | struct omap_hwmod *oh; |
259 | struct resource irq, mem; | ||
260 | struct clk *src; | 258 | struct clk *src; |
261 | int r = 0; | 259 | int r = 0; |
262 | 260 | ||
263 | if (of_have_populated_dt()) { | 261 | np = omap_get_timer_dt(omap_timer_match, property); |
264 | np = omap_get_timer_dt(omap_timer_match, property); | 262 | if (!np) |
265 | if (!np) | 263 | return -ENODEV; |
266 | return -ENODEV; | ||
267 | 264 | ||
268 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); | 265 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); |
269 | if (!oh_name) | 266 | if (!oh_name) |
270 | return -ENODEV; | 267 | return -ENODEV; |
271 | 268 | ||
272 | timer->irq = irq_of_parse_and_map(np, 0); | 269 | timer->irq = irq_of_parse_and_map(np, 0); |
273 | if (!timer->irq) | 270 | if (!timer->irq) |
274 | return -ENXIO; | 271 | return -ENXIO; |
275 | 272 | ||
276 | timer->io_base = of_iomap(np, 0); | 273 | timer->io_base = of_iomap(np, 0); |
277 | 274 | ||
278 | of_node_put(np); | 275 | of_node_put(np); |
279 | } else { | ||
280 | if (omap_dm_timer_reserve_systimer(timer->id)) | ||
281 | return -ENODEV; | ||
282 | |||
283 | sprintf(name, "timer%d", timer->id); | ||
284 | oh_name = name; | ||
285 | } | ||
286 | 276 | ||
287 | oh = omap_hwmod_lookup(oh_name); | 277 | oh = omap_hwmod_lookup(oh_name); |
288 | if (!oh) | 278 | if (!oh) |
@@ -290,22 +280,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | |||
290 | 280 | ||
291 | *timer_name = oh->name; | 281 | *timer_name = oh->name; |
292 | 282 | ||
293 | if (!of_have_populated_dt()) { | ||
294 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, | ||
295 | &irq); | ||
296 | if (r) | ||
297 | return -ENXIO; | ||
298 | timer->irq = irq.start; | ||
299 | |||
300 | r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, | ||
301 | &mem); | ||
302 | if (r) | ||
303 | return -ENXIO; | ||
304 | |||
305 | /* Static mapping, never released */ | ||
306 | timer->io_base = ioremap(mem.start, mem.end - mem.start); | ||
307 | } | ||
308 | |||
309 | if (!timer->io_base) | 283 | if (!timer->io_base) |
310 | return -ENXIO; | 284 | return -ENXIO; |
311 | 285 | ||
@@ -433,18 +407,15 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) | |||
433 | const char *oh_name = "counter_32k"; | 407 | const char *oh_name = "counter_32k"; |
434 | 408 | ||
435 | /* | 409 | /* |
436 | * If device-tree is present, then search the DT blob | 410 | * See if the 32kHz counter is supported. |
437 | * to see if the 32kHz counter is supported. | ||
438 | */ | 411 | */ |
439 | if (of_have_populated_dt()) { | 412 | np = omap_get_timer_dt(omap_counter_match, NULL); |
440 | np = omap_get_timer_dt(omap_counter_match, NULL); | 413 | if (!np) |
441 | if (!np) | 414 | return -ENODEV; |
442 | return -ENODEV; | 415 | |
443 | 416 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); | |
444 | of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); | 417 | if (!oh_name) |
445 | if (!oh_name) | 418 | return -ENODEV; |
446 | return -ENODEV; | ||
447 | } | ||
448 | 419 | ||
449 | /* | 420 | /* |
450 | * First check hwmod data is available for sync32k counter | 421 | * First check hwmod data is available for sync32k counter |
@@ -462,18 +433,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) | |||
462 | return ret; | 433 | return ret; |
463 | } | 434 | } |
464 | 435 | ||
465 | if (!of_have_populated_dt()) { | ||
466 | void __iomem *vbase; | ||
467 | |||
468 | vbase = omap_hwmod_get_mpu_rt_va(oh); | ||
469 | |||
470 | ret = omap_init_clocksource_32k(vbase); | ||
471 | if (ret) { | ||
472 | pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n", | ||
473 | __func__, ret); | ||
474 | omap_hwmod_idle(oh); | ||
475 | } | ||
476 | } | ||
477 | return ret; | 436 | return ret; |
478 | } | 437 | } |
479 | 438 | ||
@@ -689,96 +648,6 @@ void __init omap5_realtime_timer_init(void) | |||
689 | #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ | 648 | #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ |
690 | 649 | ||
691 | /** | 650 | /** |
692 | * omap_timer_init - build and register timer device with an | ||
693 | * associated timer hwmod | ||
694 | * @oh: timer hwmod pointer to be used to build timer device | ||
695 | * @user: parameter that can be passed from calling hwmod API | ||
696 | * | ||
697 | * Called by omap_hwmod_for_each_by_class to register each of the timer | ||
698 | * devices present in the system. The number of timer devices is known | ||
699 | * by parsing through the hwmod database for a given class name. At the | ||
700 | * end of function call memory is allocated for timer device and it is | ||
701 | * registered to the framework ready to be proved by the driver. | ||
702 | */ | ||
703 | static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) | ||
704 | { | ||
705 | int id; | ||
706 | int ret = 0; | ||
707 | char *name = "omap_timer"; | ||
708 | struct dmtimer_platform_data *pdata; | ||
709 | struct platform_device *pdev; | ||
710 | struct omap_timer_capability_dev_attr *timer_dev_attr; | ||
711 | |||
712 | pr_debug("%s: %s\n", __func__, oh->name); | ||
713 | |||
714 | /* on secure device, do not register secure timer */ | ||
715 | timer_dev_attr = oh->dev_attr; | ||
716 | if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr) | ||
717 | if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE) | ||
718 | return ret; | ||
719 | |||
720 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | ||
721 | if (!pdata) { | ||
722 | pr_err("%s: No memory for [%s]\n", __func__, oh->name); | ||
723 | return -ENOMEM; | ||
724 | } | ||
725 | |||
726 | /* | ||
727 | * Extract the IDs from name field in hwmod database | ||
728 | * and use the same for constructing ids' for the | ||
729 | * timer devices. In a way, we are avoiding usage of | ||
730 | * static variable witin the function to do the same. | ||
731 | * CAUTION: We have to be careful and make sure the | ||
732 | * name in hwmod database does not change in which case | ||
733 | * we might either make corresponding change here or | ||
734 | * switch back static variable mechanism. | ||
735 | */ | ||
736 | sscanf(oh->name, "timer%2d", &id); | ||
737 | |||
738 | if (timer_dev_attr) | ||
739 | pdata->timer_capability = timer_dev_attr->timer_capability; | ||
740 | |||
741 | pdata->timer_errata = omap_dm_timer_get_errata(); | ||
742 | pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; | ||
743 | |||
744 | pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata)); | ||
745 | |||
746 | if (IS_ERR(pdev)) { | ||
747 | pr_err("%s: Can't build omap_device for %s: %s.\n", | ||
748 | __func__, name, oh->name); | ||
749 | ret = -EINVAL; | ||
750 | } | ||
751 | |||
752 | kfree(pdata); | ||
753 | |||
754 | return ret; | ||
755 | } | ||
756 | |||
757 | /** | ||
758 | * omap2_dm_timer_init - top level regular device initialization | ||
759 | * | ||
760 | * Uses dedicated hwmod api to parse through hwmod database for | ||
761 | * given class name and then build and register the timer device. | ||
762 | */ | ||
763 | static int __init omap2_dm_timer_init(void) | ||
764 | { | ||
765 | int ret; | ||
766 | |||
767 | /* If dtb is there, the devices will be created dynamically */ | ||
768 | if (of_have_populated_dt()) | ||
769 | return -ENODEV; | ||
770 | |||
771 | ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); | ||
772 | if (unlikely(ret)) { | ||
773 | pr_err("%s: device registration failed.\n", __func__); | ||
774 | return -EINVAL; | ||
775 | } | ||
776 | |||
777 | return 0; | ||
778 | } | ||
779 | omap_arch_initcall(omap2_dm_timer_init); | ||
780 | |||
781 | /** | ||
782 | * omap2_override_clocksource - clocksource override with user configuration | 651 | * omap2_override_clocksource - clocksource override with user configuration |
783 | * | 652 | * |
784 | * Allows user to override default clocksource, using kernel parameter | 653 | * Allows user to override default clocksource, using kernel parameter |
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index ff0a68cf7439..0084b6c77cf1 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c | |||
@@ -102,31 +102,3 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh) | |||
102 | return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : | 102 | return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : |
103 | omap2_wd_timer_disable(oh); | 103 | omap2_wd_timer_disable(oh); |
104 | } | 104 | } |
105 | |||
106 | static int __init omap_init_wdt(void) | ||
107 | { | ||
108 | int id = -1; | ||
109 | struct platform_device *pdev; | ||
110 | struct omap_hwmod *oh; | ||
111 | char *oh_name = "wd_timer2"; | ||
112 | char *dev_name = "omap_wdt"; | ||
113 | struct omap_wd_timer_platform_data pdata; | ||
114 | |||
115 | if (!cpu_class_is_omap2() || of_have_populated_dt()) | ||
116 | return 0; | ||
117 | |||
118 | oh = omap_hwmod_lookup(oh_name); | ||
119 | if (!oh) { | ||
120 | pr_err("Could not look up wd_timer%d hwmod\n", id); | ||
121 | return -EINVAL; | ||
122 | } | ||
123 | |||
124 | pdata.read_reset_sources = prm_read_reset_sources; | ||
125 | |||
126 | pdev = omap_device_build(dev_name, id, oh, &pdata, | ||
127 | sizeof(struct omap_wd_timer_platform_data)); | ||
128 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", | ||
129 | dev_name, oh->name); | ||
130 | return 0; | ||
131 | } | ||
132 | omap_subsys_initcall(omap_init_wdt); | ||