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authorWill Deacon <will.deacon@arm.com>2016-10-28 07:23:58 -0400
committerMarc Zyngier <marc.zyngier@arm.com>2016-11-29 04:14:48 -0500
commit016f98afd050f876845c49d3a0ad6dd0c30c5681 (patch)
tree47eb2b64c9805c1a3dfb69a4505ec8a53a2d99dd
parentd44ffa5ae70a15a15190aa9ffa6f6acdeae1d25c (diff)
irqchip/gic-v3: Use nops macro for Cavium ThunderX erratum 23154
The workaround for Cavium ThunderX erratum 23154 has a homebrew pipeflush built out of NOP sequences around the read of the IAR. This patch converts the code to use the new nops macro, which makes it a little easier to read. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index fdf34f8b4ee0..0313670a3e3f 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -122,14 +122,9 @@ static inline u64 gic_read_iar_cavium_thunderx(void)
122{ 122{
123 u64 irqstat; 123 u64 irqstat;
124 124
125 asm volatile( 125 nops(8);
126 "nop;nop;nop;nop\n\t"
127 "nop;nop;nop;nop");
128
129 irqstat = read_sysreg_s(ICC_IAR1_EL1); 126 irqstat = read_sysreg_s(ICC_IAR1_EL1);
130 127 nops(4);
131 asm volatile(
132 "nop;nop;nop;nop");
133 mb(); 128 mb();
134 129
135 return irqstat; 130 return irqstat;