diff options
author | Bibby Hsieh <bibby.hsieh@mediatek.com> | 2018-10-02 23:41:50 -0400 |
---|---|---|
committer | CK Hu <ck.hu@mediatek.com> | 2018-10-02 23:56:33 -0400 |
commit | 014e604196bddbd3a0186775e02bc5574bed18d4 (patch) | |
tree | 8e0903791ae66e3d7ad2b549da28d6c07e0909c7 | |
parent | 0fc721b2968e3cadec520c60d2fc63498d865055 (diff) |
drm/mediatek: implement connection from BLS to DPI0
Modify display driver to support connection from BLS to DPI.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
-rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 546b3e3b300b..579ce28d801d 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030 | 39 | #define DISP_REG_CONFIG_DISP_OVL_MOUT_EN 0x030 |
40 | #define DISP_REG_CONFIG_OUT_SEL 0x04c | 40 | #define DISP_REG_CONFIG_OUT_SEL 0x04c |
41 | #define DISP_REG_CONFIG_DSI_SEL 0x050 | 41 | #define DISP_REG_CONFIG_DSI_SEL 0x050 |
42 | #define DISP_REG_CONFIG_DPI_SEL 0x064 | ||
42 | 43 | ||
43 | #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) | 44 | #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n)) |
44 | #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) | 45 | #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) |
@@ -136,7 +137,10 @@ | |||
136 | 137 | ||
137 | #define OVL_MOUT_EN_RDMA 0x1 | 138 | #define OVL_MOUT_EN_RDMA 0x1 |
138 | #define BLS_TO_DSI_RDMA1_TO_DPI1 0x8 | 139 | #define BLS_TO_DSI_RDMA1_TO_DPI1 0x8 |
140 | #define BLS_TO_DPI_RDMA1_TO_DSI 0x2 | ||
139 | #define DSI_SEL_IN_BLS 0x0 | 141 | #define DSI_SEL_IN_BLS 0x0 |
142 | #define DPI_SEL_IN_BLS 0x0 | ||
143 | #define DSI_SEL_IN_RDMA 0x1 | ||
140 | 144 | ||
141 | struct mtk_disp_mutex { | 145 | struct mtk_disp_mutex { |
142 | int id; | 146 | int id; |
@@ -339,9 +343,17 @@ static void mtk_ddp_sout_sel(void __iomem *config_regs, | |||
339 | enum mtk_ddp_comp_id cur, | 343 | enum mtk_ddp_comp_id cur, |
340 | enum mtk_ddp_comp_id next) | 344 | enum mtk_ddp_comp_id next) |
341 | { | 345 | { |
342 | if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) | 346 | if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { |
343 | writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1, | 347 | writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1, |
344 | config_regs + DISP_REG_CONFIG_OUT_SEL); | 348 | config_regs + DISP_REG_CONFIG_OUT_SEL); |
349 | } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) { | ||
350 | writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI, | ||
351 | config_regs + DISP_REG_CONFIG_OUT_SEL); | ||
352 | writel_relaxed(DSI_SEL_IN_RDMA, | ||
353 | config_regs + DISP_REG_CONFIG_DSI_SEL); | ||
354 | writel_relaxed(DPI_SEL_IN_BLS, | ||
355 | config_regs + DISP_REG_CONFIG_DPI_SEL); | ||
356 | } | ||
345 | } | 357 | } |
346 | 358 | ||
347 | void mtk_ddp_add_comp_to_path(void __iomem *config_regs, | 359 | void mtk_ddp_add_comp_to_path(void __iomem *config_regs, |