diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2018-09-30 05:37:27 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-10-10 15:48:18 -0400 |
commit | 009d9ed6c4b7b84dbff8314d74233da9237a4560 (patch) | |
tree | 2be4fce9cd925e0f852d84efd2c25de25412ef62 | |
parent | 3089aa2248943e62a875840862c0103b47e8420c (diff) |
drm/amdgpu: Change AI gfx/sdma/smu init sequence
initialize gfx/sdma before dpm features enabled.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index fb26039beeba..bf5e6a413dee 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c | |||
@@ -529,6 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) | |||
529 | amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); | 529 | amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); |
530 | else | 530 | else |
531 | amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); | 531 | amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); |
532 | amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); | ||
533 | amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); | ||
532 | if (!amdgpu_sriov_vf(adev)) | 534 | if (!amdgpu_sriov_vf(adev)) |
533 | amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); | 535 | amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); |
534 | if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) | 536 | if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) |
@@ -539,8 +541,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) | |||
539 | #else | 541 | #else |
540 | # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." | 542 | # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." |
541 | #endif | 543 | #endif |
542 | amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); | ||
543 | amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); | ||
544 | if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { | 544 | if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { |
545 | amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); | 545 | amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); |
546 | amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); | 546 | amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); |
@@ -551,6 +551,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) | |||
551 | amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); | 551 | amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); |
552 | amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); | 552 | amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); |
553 | amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); | 553 | amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); |
554 | amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); | ||
555 | amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); | ||
554 | amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); | 556 | amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); |
555 | if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) | 557 | if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) |
556 | amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); | 558 | amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); |
@@ -560,8 +562,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) | |||
560 | #else | 562 | #else |
561 | # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." | 563 | # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." |
562 | #endif | 564 | #endif |
563 | amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); | ||
564 | amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); | ||
565 | amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); | 565 | amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); |
566 | break; | 566 | break; |
567 | default: | 567 | default: |