aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/soc
Commit message (Collapse)AuthorAge
...
| | * | | soc: qcom: smd: delete unneeded of_node_putJulia Lawall2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device node iterators perform an of_node_put on each iteration, so putting an of_node_put before a continue results in a double put. A simplified version of the semantic match that finds this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator i; @@ i(..., child, ...) { ... when != of_node_get(child) * of_node_put(child); ... * continue; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Correct SMEM items for upper channelsBjorn Andersson2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the SMEM items for the second set of SMD channels, as these where incorrect. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Reject send of too big packetsBjorn Andersson2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attempting to find room for a packet that's bigger than the fifo will never succeed and the calling process will be sleeping forever in the loop, waiting for enough room. So fail early instead. Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Handle big endian CPUsStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smd structures are always in little endian, but the smd driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd_rpm: Handle big endian CPUsStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The smd rpm structures are always in little endian, but this driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Remove use of VLAISStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Usage of VLAIS prevents clang from compiling this file, and it also opens us to the possibility of allocating a large structure on the stack to the point that we blow past the limit of the kernel stack. Remove the VLAIS and allocate a structure on the heap with kmalloc so that we're safer and more clang friendly. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Use __iowrite32_copy() instead of open-coding itStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already have a function to do this and it silences some sparse warnings along the way. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Represent channel layout in structuresStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rx and tx channel info are laid out in memory next to each other, and there are two types of channel info structures, byte based and word based. We have 4 pointers to these info structures, when we really only need two to point to the different types of structures. Encapsulate the byte based and word based tx/rx structures in a "channel pair" structure that describes the layout of memory and reduces the number of pointers in the smd channel structure by two. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smem: Handle big endian CPUsStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The contents of smem are always in little endian, but the smem driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: Make qcom_smem_get() return a pointerStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Passing a void ** almost always requires a cast at the call site. Instead of littering the code with casts every time this function is called, have qcom_smem_get() return a void pointer to the location of the smem item. This frees the caller from having to cast the pointer. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: Reorder SMEM/SMD configsStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I make nconfig, having the SMEM option after the SMD option causes the configurator to get confused when I'm enabling and disabling these options. Let's move SMEM before SMD so there's a clear indented dependency chain. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smem: Avoid NULL pointer exception on removeStephen Boyd2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't set a pointer to NULL and then dereference it in the next line. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | | soc: qcom: smd: Implement id_table driver matchingBjorn Andersson2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a id_table based driver maching mechanism for drivers that binds to fixed channels and doesn't need any additional configuration, e.g. IPCRTR and DIAG. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * | | | Merge tag 'v4.4-rockchip-drivers1' of ↵Arnd Bergmann2015-10-09
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Merge "Rockchip power-domain drivers for 4.4" from Heiko Stuebner: Add the power-domain base-driver which currently contains support for the rk3288 powerdomain layout but can be easily extended for the socs (including arm64) later on. A big thanks to Ceasar Wang for pulling through on this during 18 revisions. Also included is a fix to the pm-clock handling in the generic powerdomains to adapt it to the per-user clock handling we now do, Acked by Rafael Wysocki. * tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: power-domain: Add power domain driver dt-bindings: add document of Rockchip power domains PM / clk: Do not __clk_get passed in clock-references dt-bindings: add power-domain header for RK3288 SoCs
| | * | | soc: rockchip: power-domain: Add power domain driverCaesar Wang2015-10-06
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is found on RK3288 SoCs. In order to meet high performance and low power requirements, a power management unit is designed or saving power when RK3288 in low power mode. The RK3288 PMU is dedicated for managing the power of the whole chip. PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON register. After setting the register, PMU would enter the Low Power mode. In the low power mode, pmu will auto power on/off the specified power domain, send idle req to specified power domain, shut down/up pll and so on. All of above are configurable by setting corresponding registers. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> [replace dsb() with dsb(sy) for arm64 buildability; sy is the default, so no functional change; adapt to per-user clocks in genpd] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | | | Merge tag 'armsoc-soc' of ↵Linus Torvalds2015-11-10
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "New and/or improved SoC support for this release: Marvell Berlin: - Enable standard DT-based cpufreq - Add CPU hotplug support Freescale: - Ethernet init for i.MX7D - Suspend/resume support for i.MX6UL Allwinner: - Support for R8 chipset (used on NTC's $9 C.H.I.P board) Mediatek: - SMP support for some platforms Uniphier: - L2 support - Cleaned up SMP support, etc. plus a handful of other patches around above functionality, and a few other smaller changes" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits) ARM: uniphier: rework SMP operations to use trampoline code ARM: uniphier: add outer cache support Documentation: EXYNOS: Update bootloader interface on exynos542x ARM: mvebu: add broken-idle option ARM: orion5x: use mac_pton() helper ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned ARM: sunxi: Add R8 support ARM: digicolor: select pinctrl/gpio driver arm: berlin: add CPU hotplug support arm: berlin: use non-self-cleared reset register to reset cpu ARM: mediatek: add smp bringup code ARM: mediatek: enable gpt6 on boot up to make arch timer working soc: mediatek: Fix random hang up issue while kernel init soc: ti: qmss: make acc queue support optional in the driver soc: ti: add firmware file name as part of the driver Documentation: dt: soc: Add description for knav qmss driver ARM: S3C64XX: Use PWM lookup table for mach-smartq ARM: S3C64XX: Use PWM lookup table for mach-hmt ARM: S3C64XX: Use PWM lookup table for mach-crag6410 ARM: S3C64XX: Use PWM lookup table for smdk6410 ...
| * \ \ \ Merge tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek into ↵Olof Johansson2015-10-23
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/soc Do the initial setting of the pmic wrap interrupt before requesting the interrupt. This fixes the corner-case where the pmic is initialized by the bootloader, but not the pmic watchdog. Add support for active wakeup to the scpsys. This allows to keep the power of a scpsys domain during suspend state. With version v4.3 new subsystem clocks are added to the clock dirver. In late init the kernel turns off all unused clocks. This can provoke a hang if the kernel tries to access the venc and venc_lt power domain registers. Add the necessary parent clocks for this power domains to the scpsys so that no random hang happens. The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer. As there is no opensource bootloader in the near future for this architectures we enable the arch timer at kernel boot. We need the arch timer for SMP boot. Add support for SMP on mt6589, mt8127 and mt8135. * tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek: ARM: mediatek: add smp bringup code ARM: mediatek: enable gpt6 on boot up to make arch timer working soc: mediatek: Fix random hang up issue while kernel init soc: mediatek: add scpsys support active_wakeup soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq. Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | soc: mediatek: Fix random hang up issue while kernel initJames Liao2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In kernel late init, it turns off all unused clocks, which needs to access subsystem registers such as VENC and VENC_LT. Accessing MT8173 VENC registers needs two top clocks, mm_sel and venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel. So we need to keep these clocks on before accessing their registers. This patch keeps venc_sel / venclt_sel clock on when VENC / VENC_LT's power is on, to prevent system hang up while accessing its registeres. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | soc: mediatek: add scpsys support active_wakeupEddie Huang2015-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register gpd_dev_ops.active_wakeup function to support keep power during suspend state. And add flag to each power domain to decide whether keep power during suspend or not. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | | | soc: mediatek: Move the initial setting of pmic wrap interrupt before ↵Henry Chen2015-09-27
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | requesting irq. The watchdog may not be initialized by the bootloader, even if the rest of the pwrap is. Move the watchdog initialization out of pwrap_init() to make sure the watchdog is always initialized and not only when the pwrap is uninitialized. Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | | | Merge tag 'keystone-driver-soc_v2' of ↵Arnd Bergmann2015-10-15
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc Merge "ARM Keystone SOC driver updates for 4.4" from Santosh Shilimkar: Documentation and support to be able to load the PDSP firmware necessary for accumulator operation. * tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: ti: qmss: make acc queue support optional in the driver soc: ti: add firmware file name as part of the driver Documentation: dt: soc: Add description for knav qmss driver
| | * | | | soc: ti: qmss: make acc queue support optional in the driverMurali Karicheri2015-10-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | acc channels are available only if accumulator PDSP is loaded and running in the SoC. As this requires firmware and user may not have firmware in the file system, make the accumulator queue support available in qmss driver optional. To use accumulator queus user needs to add firmware to the file system and boot up kernel. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
| | * | | | soc: ti: add firmware file name as part of the driverMurali Karicheri2015-10-13
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently firmware file name is included in the DTS. This is not scalable as user has to change the DTS if they need upgrade to a new firmware. Instead, add the firmware file name in the driver itself. As long as there is no API change, new firmware upgrade is easy and require no driver change. User is expected to copy the firmware image to the file system and add a sym link to the new firmware for doing an upgrade. Driver add a array of firmware file names to search for the available firmware blobs. This scheme also prepare the driver for future changes to API if ever happens. In such case it is assumed that driver needs to change to accommodate the new firmware and new firmware file name will get added to the array. Also update the DT document to remove the firmware attribute and add description about firmware in the driver documentation. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
| * | | | Merge tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux into ↵Arnd Bergmann2015-10-15
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/soc Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli: This pull request contains the following Broadcom SoC platform and driver changes: - Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific code which is coming next - Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit with their specific write-pairing setting, which must be saved and restored during system-wide suspend/resume, and consequently updates the brcmstb machine code to initialize the BIU - Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine descriptor matching their compatible string and setting up the PL310 L2 cache and enabling the relevant ARM errata for their Cortex-A9 * tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux: ARM: brcmstb: Setup BIU control registers during boot soc: brcmstb: Add Bus Interface Unit control setup soc: add stubs for brcmstb SoC's ARM: NSP: Add basic support for Broadcom Northstar Plus SoC
| | * | | soc: brcmstb: Add Bus Interface Unit control setupFlorian Fainelli2015-10-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Broadcom STB SoCs (brcmstb) require an early setup of their Bus Interface Unit control register, this needs to happen before SMP is brought up because it affects how the CPU complex will be interfaced to the memory controller. Add support code which properly initializes the BIU registers based on whether "brcm,write-pairing" is present in Device Tree, and take care of saving and restoring credit register settings during system-wide suspend/resume operations. Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| | * | | soc: add stubs for brcmstb SoC'sBrian Norris2015-09-14
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | Used on BCM7xxx Set-Top Box chips (e.g., BCM7445). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | | | Merge tag 'armsoc-fixes-nc' of ↵Linus Torvalds2015-11-10
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC non-urgent fixes from Olof Johansson: "A handful of fixes that came in and didn't seem warranted to go in through the 4.3-rc cycle. - MAINTAINERS updates for one of the Broadcom platforms and lpc18xx - A couple of non-critical Davinci bugfixes - A fix to reset irq affinity for TI platforms (silences a warning at reboot)" * tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: update lpc18xx entry with more drivers soc: ti: reset irq affinity before freeing irq ARM: cns3xxx: pci: avoid potential stack overflow ARM: davinci: clock: Correct return values for API functions ARM: davinci: re-use %*ph specifier MAINTAINERS: add entry for the Broadcom Northstar Plus SoCs
| * | | soc: ti: reset irq affinity before freeing irqMurali Karicheri2015-10-08
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using accumulator queue for rx side for network driver, following warning is seen when doing a reboot command from Linux console. This is because, affinity value is not reset before calling free_irq(). This patch fixes this. Deconfiguring network interfaces... ------------[ cut here ]----------- WARNING: CPU: 0 PID: 2081 at kernel/irq/manage.c:1370 __free_irq+0x208/0x214 Modules linked in: CPU: 0 PID: 2081 Comm: ifconfig Not tainted 4.1.5-00908-g1049e206-dirty #1 Hardware name: Keystone Backtrace: [<c0012b98>] (dump_backtrace) from [<c0012dbc>] (show_stack+0x18/0x1c) r7:c005d0a8 r6:c06e2184 r5:c06e2184 r4:00000000 [<c0012da4>] (show_stack) from [<c04e7168>] (dump_stack+0x8c/0xcc) [<c04e70dc>] (dump_stack) from [<c0025944>] (warn_slowpath_common+0x88/0xb8) r7:c005d0a8 r6:0000055a r5:00000009 r4:0000000 [<c00258bc>] (warn_slowpath_common) from [<c0025a18>] (warn_slowpath_null+0x 24/0x2c) r8:0000006c r7:ee513f60 r6:ee513f00 r5:ee611010 r4:cc873a00 (warn_slowpath_null) from [<c005d0a8>] (__free_irq+0x208/0x214) [<c005cea0>] (__free_irq) from [<c005d158>] (free_irq+0x54/0xac) r10:00000002 r9:00000000 r8:00000000 r7:ee611010 r6:0000006c r5:00000000 r4:ee513f00 r3:00000000 [<c005d104>] (free_irq) from [<c02a81b0>] (knav_range_setup_acc_irq+0xb0/0x1 28) r7:00000001 r6:0000006c r5:ee611010 r4:00000001 [<c02a8100>] (knav_range_setup_acc_irq) from [<c02a8248>] (knav_acc_close_qu eue+0x20/0x24) r8:edd1a4c8 r7:00001000 r6:eed89980 r5:ee616650 r4:edf9d990 [<c02a8228>] (knav_acc_close_queue) from [<c02a6160>] (knav_queue_close+0xb4 /0xb8) [<c02a60ac>] (knav_queue_close) from [<c0336270>] (netcp_free_navigator_reso urces+0x1d4/0x2c0) r5:edd1a480 r4:00000400 [<c033609c>] (netcp_free_navigator_resources) from [<c033657c>] (netcp_ndo_stop+0x220/0x230) r10:00008914 r9:edf34400 r8:00000000 r7:edd1a5d8 r6:edd1a480 r5:00000400 r4:edd1a000 [<c033635c>] (netcp_ndo_stop) from [<c03d9c80> (__dev_close_many+0x90/0xd8) r7:00001003 r6:00001042 r5:edb0de20 r4:edd1a000 [<c03d9bf0>] (__dev_close_many) from [<c03d9df4>] (__dev_close+0x30/0x48) r5:00000001 r4:edd1a000 [<c03d9dc4>] (__dev_close) from [<c03e175c>] (__dev_change_flags+0x9c/0x14c) [<c03e16c0>] (__dev_change_flags) from [<c03e182c>] (dev_change_flags+0x20/0 r9:edf34400 r8:00000000 r7:00000000 r6:00001003 r5:edd1a138 r4:edd1a000 [<c03e180c>] (dev_change_flags) from [<c0446f94>] (devinet_ioctl+0x680/0x754 r9:edf34400 r8:bef6af3c r7:00000000 r6:bef6ac64 r5:edf3440c r4:00000000 [<c0446914>] (devinet_ioctl) from [<c0448760>] (inet_ioctl+0x1a8/0x1d0) r10:00000000 r9:edb0c000 r8:bef6ac64 r7:00000003 r6:bef6ac64 r5:bef6ac64 r4:00008914 [<c04485b8>] (inet_ioctl) from [<c03c72fc>] (sock_ioctl+0x1d0/0x2a8) [<c03c712c>] (sock_ioctl) from [<c00eb608>] (do_vfs_ioctl+0x414/0x604) r7:00000003 r6:ed8b60c0 r5:bef6ac64 r4:ccc88f20 [<c00eb1f4>] (do_vfs_ioctl) from [<c00eb834>] (SyS_ioctl+0x3c/0x64) r9:edb0c000 r8:bef6ac64 r7:00008914 r6:ed8b60c0 r5:00000003 r4:ed8b60c0 [<c00eb7f8>] (SyS_ioctl) from [<c000f780>] (ret_fast_syscall+0x0/0x3c) r9:edb0c000 r8:c000f924 r7:00000036 r6:0007e77c r5:bef6ac64 r4:0007e7d0 ---[ end trace f565594c905af0b4 ]--- Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* / / soc: dove: Let genpd deal with disabling of unused PM domainsUlf Hansson2015-10-12
|/ / | | | | | | | | | | | | | | | | Genpd tries from a late_initcall to disable unused PM domains, which makes it unnecessary to also manage this from any earlier phase when for example initializing a genpd. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* | soc: dove: Prepare irq handler for irq argument removalThomas Gleixner2015-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | soc: dove: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descThomas Gleixner2015-09-14
|/ | | | | | | | Search and replace done with coccinelle Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2015-09-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull late ARM SoC updates from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The bulk of the changes are for samsung/exynos SoCs for some changes that needed a few minor reworks so ended up a bit late. The others are mainly for qcom SoCs: a couple fixes and some DTS updates" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: multi_v7_defconfig: Enable PBIAS regulator soc: qcom: smd: Correct fBLOCKREADINTR handling soc: qcom: smd: Use correct remote processor ID soc: qcom: smem: Fix errant private access ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path ARM: dts: qcom: msm8960-cdp: Use stdout-path ARM: dts: qcom: msm8660-surf: Use stdout-path ARM: dts: qcom: ipq8064-ap148: Use stdout-path ARM: dts: qcom: apq8084-mtp: Use stdout-path ARM: dts: qcom: apq8084-ifc6540: Use stdout-path ARM: dts: qcom: apq8074-dragonboard: Use stdout-path ARM: dts: qcom: apq8064-ifc6410: Use stdout-path ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path ARM: dts: qcom: Label serial nodes for aliasing and stdout-path reset: ath79: Fix missing spin_lock_init reset: Add (devm_)reset_control_get stub functions ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12 cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o ARM: dts: add iommu property to JPEG device for exynos4 ARM: dts: enable SPI1 for exynos4412-odroidu3 ...
| * soc: qcom: smd: Correct fBLOCKREADINTR handlingBjorn Andersson2015-09-09
| | | | | | | | | | | | | | | | | | | | fBLOCKREADINTR is masking the notification from the remote and should hence be cleared while we're waiting the tx fifo to drain. Also change the reset state to mask the notification, as send is the only use case where we're interested in it. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * soc: qcom: smd: Use correct remote processor IDAndy Gross2015-09-09
| | | | | | | | | | | | | | | | This patch fixes SMEM addressing issues when remote processors need to use secure SMEM partitions. Signed-off-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
| * soc: qcom: smem: Fix errant private accessAndy Gross2015-09-09
| | | | | | | | | | | | | | | | This patch corrects private partition item access. Instead of falling back to global for instances where we have an actual host and remote partition existing, return the results of the private lookup. Signed-off-by: Andy Gross <agross@codeaurora.org>
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-09-01
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Some releases this branch is nearly empty, others we have more stuff. It tends to gather drivers that need SoC modification or dependencies such that they have to (also) go in through our tree. For this release, we have merged in part of the reset controller tree (with handshake that the parts we have merged in will remain stable), as well as dependencies on a few clock branches. In general, new items here are: - Qualcomm driver for SMM/SMD, which is how they communicate with the coprocessors on (some) of their platforms - memory controller work for ARM's PL172 memory controller - reset drivers for various platforms - PMU power domain support for Marvell platforms - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits) ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() ARM: tegra: Disable cpuidle if PSCI is available soc/tegra: pmc: Use existing pclk reference soc/tegra: pmc: Remove unnecessary return statement soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile memory: tegra: Add Tegra210 support memory: tegra: Add support for a variable-size client ID bitfield clk: shmobile: rz: Add CPG/MSTP Clock Domain support clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support clk: shmobile: Add CPG/MSTP Clock Domain support ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets reset: reset-zynq: Adding support for Xilinx Zynq reset controller. docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings. MIPS: ath79: Add the reset controller to the AR9132 dtsi reset: Add a driver for the reset controller on the AR71XX/AR9XXX devicetree: Add bindings for the ATH79 reset controller reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property doc: dt: add documentation for lpc1850-rgu reset driver ...
| * \ Merge tag 'tegra-for-4.3-soc' of ↵Olof Johansson2015-08-20
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers ARM: tegra: Core SoC changes for v4.3-rc1 This contains a bit more of Tegra210 support, which is shaping up pretty nicely. Other than that there are a couple of cleanup patches here, too. * tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() ARM: tegra: Disable cpuidle if PSCI is available soc/tegra: pmc: Use existing pclk reference soc/tegra: pmc: Remove unnecessary return statement soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile soc/tegra: fuse: Add spare bit offset for Tegra210 soc/tegra: fuse: Add spare bit offset for Tegra124 soc/tegra: fuse: Add spare bit offset for Tegra114 soc/tegra: fuse: Rename core_* to soc_* soc/tegra: fuse: Add Tegra210 support soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers soc/tegra: fuse: Restrict legacy code to 32-bit ARM soc/tegra: pmc: Add Tegra210 support soc/tegra: pmc: Restrict legacy code to 32-bit ARM soc/tegra: pmc: Avoid usage of uninitialized variable soc/tegra: Add Tegra210 support soc/tegra: Add Tegra132 support Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | soc/tegra: pmc: Use existing pclk referenceThierry Reding2015-08-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver requests the pclk clock at probe time already and stores its reference to it in struct tegra_pmc, so there is no need to look it up everytime it is needed. Use the existing reference instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Remove unnecessary return statementThierry Reding2015-08-13
| | | | | | | | | | | | | | | | | | | | | | | | Functions returning no value don't need an explicit return statement. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in MakefileMasahiro Yamada2015-08-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kbuild descends into drivers/soc/tegra/ only when CONFIG_ARCH_TEGRA is enabled. (see drivers/soc/Makefile) $(CONFIG_ARCH_TEGRA) in drivers/soc/tegra/Makefile always evaluates to 'y'. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra210Thierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra210 is 0x380, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra124Thierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra124 is 0x300, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra114Thierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra114 is 0x280, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Rename core_* to soc_*Thierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's a mixture of core_* and soc_* prefixes for variables storing information related to the VDD_CORE rail. Choose one (soc_*) and use it more consistently. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add Tegra210 supportThierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Tegra210 support to the fuses driver and add Tegra210-specific speedo definitions. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Unify Tegra20 and Tegra30 driversThierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unifying the drivers makes it easier to restrict the legacy probing paths to 32-bit ARM. This in turn will come in handy as support for new 64-bit ARM SoCs is added. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Restrict legacy code to 32-bit ARMThierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For backwards-compatibility with old device trees, if no APBMISC node exists this driver hard-codes the I/O memory region. All 64-bit ARM device tree files are recent enough that they can be required to have this node, and therefore the legacy code path is not required. Based on work done by Paul Walmsley <pwalmsley@nvidia.com>. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Add Tegra210 supportThierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra210 uses a power management controller that is compatible with earlier SoC generations but adds a couple of power partitions for new hardware blocks. Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Restrict legacy code to 32-bit ARMThierry Reding2015-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For backwards-compatibility with old device trees, if no PMC node exists this driver hard-codes the I/O memory region. All 64-bit ARM device tree files are recent enough that they can be required to have this node, and therefore the legacy code path is not required on 64-bit ARM. Based on work done by Paul Walmsley <pwalmsley@nvidia.com>. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 23:39:59 -0500