Merge tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux into next/soc

Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:

This pull request contains the following Broadcom SoC platform and driver changes:

- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
  code which is coming next

- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
  with their specific write-pairing setting, which must be saved and restored during
  system-wide suspend/resume, and consequently updates the brcmstb machine code to
  initialize the BIU

- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
  descriptor matching their compatible string and setting up the PL310 L2 cache and
  enabling the relevant ARM errata for their Cortex-A9

* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
  ARM: brcmstb: Setup BIU control registers during boot
  soc: brcmstb: Add Bus Interface Unit control setup
  soc: add stubs for brcmstb SoC's
  ARM: NSP: Add basic support for Broadcom Northstar Plus SoC

6 files changed, 161 insertions, 0 deletions

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 96ddecb92254..c9c0fcce98a7 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -1,5 +1,6 @@
 menu "SOC (System On Chip) specific Drivers"
 
+source "drivers/soc/brcmstb/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
 source "drivers/soc/sunxi/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 0b12d777d3c4..4e27f10367f0 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -2,6 +2,7 @@
 # Makefile for the Linux Kernel SOC specific device drivers.
 #
 
+obj-$(CONFIG_SOC_BRCMSTB)       += brcmstb/
 obj-$(CONFIG_MACH_DOVE)         += dove/
 obj-$(CONFIG_ARCH_MEDIATEK)     += mediatek/
 obj-$(CONFIG_ARCH_QCOM)         += qcom/
diff --git a/drivers/soc/brcmstb/Kconfig b/drivers/soc/brcmstb/Kconfig
new file mode 100644
index 000000000000..39cab3bd544d
--- /dev/null
+++ b/drivers/soc/brcmstb/Kconfig
@@ -0,0 +1,9 @@
+menuconfig SOC_BRCMSTB
+        bool "Broadcom STB SoC drivers"
+        depends on ARM
+        help
+          Enables drivers for the Broadcom Set-Top Box (STB) series of chips.
+          This option alone enables only some support code, while the drivers
+          can be enabled individually within this menu.
+
+          If unsure, say N.
diff --git a/drivers/soc/brcmstb/Makefile b/drivers/soc/brcmstb/Makefile
new file mode 100644
index 000000000000..9120b2715d3e
--- /dev/null
+++ b/drivers/soc/brcmstb/Makefile
@@ -0,0 +1 @@
+obj-y                           += common.o biuctrl.o
diff --git a/drivers/soc/brcmstb/biuctrl.c b/drivers/soc/brcmstb/biuctrl.c
new file mode 100644
index 000000000000..9049c076f9a1
--- /dev/null
+++ b/drivers/soc/brcmstb/biuctrl.c
@@ -0,0 +1,116 @@
+/*
+ * Broadcom STB SoCs Bus Unit Interface controls
+ *
+ * Copyright (C) 2015, Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt)     "brcmstb: " KBUILD_MODNAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/syscore_ops.h>
+
+#define CPU_CREDIT_REG_OFFSET                   0x184
+#define  CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK 0x70000000
+
+static void __iomem *cpubiuctrl_base;
+static bool mcp_wr_pairing_en;
+
+static int __init mcp_write_pairing_set(void)
+{
+        u32 creds = 0;
+
+        if (!cpubiuctrl_base)
+                return -1;
+
+        creds = readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+        if (mcp_wr_pairing_en) {
+                pr_info("MCP: Enabling write pairing\n");
+                writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
+                             cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+        } else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) {
+                pr_info("MCP: Disabling write pairing\n");
+                writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
+                                cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+        } else {
+                pr_info("MCP: Write pairing already disabled\n");
+        }
+
+        return 0;
+}
+
+static int __init setup_hifcpubiuctrl_regs(void)
+{
+        struct device_node *np;
+        int ret = 0;
+
+        np = of_find_compatible_node(NULL, NULL, "brcm,brcmstb-cpu-biu-ctrl");
+        if (!np) {
+                pr_err("missing BIU control node\n");
+                return -ENODEV;
+        }
+
+        cpubiuctrl_base = of_iomap(np, 0);
+        if (!cpubiuctrl_base) {
+                pr_err("failed to remap BIU control base\n");
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        mcp_wr_pairing_en = of_property_read_bool(np, "brcm,write-pairing");
+out:
+        of_node_put(np);
+        return ret;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static u32 cpu_credit_reg_dump;  /* for save/restore */
+
+static int brcmstb_cpu_credit_reg_suspend(void)
+{
+        if (cpubiuctrl_base)
+                cpu_credit_reg_dump =
+                        readl_relaxed(cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+        return 0;
+}
+
+static void brcmstb_cpu_credit_reg_resume(void)
+{
+        if (cpubiuctrl_base)
+                writel_relaxed(cpu_credit_reg_dump,
+                                cpubiuctrl_base + CPU_CREDIT_REG_OFFSET);
+}
+
+static struct syscore_ops brcmstb_cpu_credit_syscore_ops = {
+        .suspend = brcmstb_cpu_credit_reg_suspend,
+        .resume = brcmstb_cpu_credit_reg_resume,
+};
+#endif
+
+
+void __init brcmstb_biuctrl_init(void)
+{
+        int ret;
+
+        setup_hifcpubiuctrl_regs();
+
+        ret = mcp_write_pairing_set();
+        if (ret) {
+                pr_err("MCP: Unable to disable write pairing!\n");
+                return;
+        }
+
+#ifdef CONFIG_PM_SLEEP
+        register_syscore_ops(&brcmstb_cpu_credit_syscore_ops);
+#endif
+}
diff --git a/drivers/soc/brcmstb/common.c b/drivers/soc/brcmstb/common.c
new file mode 100644
index 000000000000..c262c029b1b8
--- /dev/null
+++ b/drivers/soc/brcmstb/common.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright © 2014 NVIDIA Corporation
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of.h>
+
+#include <soc/brcmstb/common.h>
+
+static const struct of_device_id brcmstb_machine_match[] = {
+        { .compatible = "brcm,brcmstb", },
+        { }
+};
+
+bool soc_is_brcmstb(void)
+{
+        struct device_node *root;
+
+        root = of_find_node_by_path("/");
+        if (!root)
+                return false;
+
+        return of_match_node(brcmstb_machine_match, root) != NULL;
+}