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path: root/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
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* pinctrl: sh-pfc: Improve core and user API separationGeert Uytterhoeven2016-06-21
| | | | | | | | | | | | | | | | The Renesas Pin Function Controller uses two header files: - sh_pfc.h, for use by both core code and SoC-specific drivers, - core.h, for internal use by the core code only. Several SoC-specific drivers include core.h, as they need the sh_pfc structure, which is passed explicitly to the various SoC-specific callbacks, and used there. Hence move its definition from core.h to sh_pfc.h, and remove the inclusion of core.h from all SoC-specific files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Rename PINMUX_IPSR_DATA() to PINMUX_IPSR_GPSR()Geert Uytterhoeven2016-02-08
| | | | | | | | | | This macro describes a pinmux configuration that needs configuration in both a Peripheral Function Select Register (IPSR) and in a GPIO/Peripheral Function Select Register 1 (GPSR). Reflect that in the macro name for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* pinctrl: sh-pfc: r8a7778: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven2015-12-08
| | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>Geert Uytterhoeven2015-10-20
| | | | | | | | | | This header file will be removed soon. Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl drivers only, to sh_pfc.h, and drop the #include. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]Geert Uytterhoeven2015-10-20
| | | | | | | | | | | The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but also various other pinmux-related data (functions and marks). Every single driver already calls its local array pinmux_data[]. Hence rename the sh_pfc_soc_info member to "pinmux_data". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* pinctrl: sh-pfc: r8a7778: Add bias (pull-up) pinconf supportUlrich Hecht2015-10-20
| | | | | | | | | | | On this SoC there is no simple mapping of GP pins to pull-up register bits, so we need a table. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arraysLaurent Pinchart2013-12-20
| | | | | | | The arrays are never modified, declare them as const. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: r8a7778: Add CAN pin groupsSergei Shtylyov2013-10-27
| | | | | | | Add CAN data and clock pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* sh-pfc: r8a7778: Add SRU/SSI pin supportKuninori Morimoto2013-09-24
| | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
* sh-pfc: Support pins not associated with a GPIO portLaurent Pinchart2013-07-29
| | | | | | | | | | | | | Pins with selectable functions but without a GPIO port can't be named PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in the pinmux pins array, naming them with the PIN_ prefix followed by the pin physical position. In order to make sure not to register those pins as GPIOs, add a SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: Consolidate PFC SoC data macrosLaurent Pinchart2013-07-29
| | | | | | | | Move macros defined in several SoC data files to a common location and document them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: Replace pinmux_enum_id typedef with u16Laurent Pinchart2013-07-29
| | | | | | | | | | The typedef only conceals the real variable type without bringing any additional value (see Documentation/CodingStyle, section 5.b). Moreover, it polutes the pinmux namespace. Replace it with the integer type it used to hide. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
* sh-pfc: r8a7778: tidyup MMC_D1 pinKuninori Morimoto2013-06-18
| | | | | | | | | MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8) Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add MMCIF pin groupsKuninori Morimoto2013-06-05
| | | | | | | Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add HSPI pin groupsKuninori Morimoto2013-06-05
| | | | | | | Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add I2C pin groupsKuninori Morimoto2013-06-05
| | | | | | | Add I2C SDA/SCL pin groups to R8A7778 PFC driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: fixup IRQ1A settingsKuninori Morimoto2013-06-05
| | | | | | | | IP2[31] func2 is IRQ1A, not IRQ3A Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add Ether pin groupsSergei Shtylyov2013-06-05
| | | | | | | | | Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add VIN pin groupsVladimir Barinov2013-06-05
| | | | | | | | | | | | | Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver. While at it, add SH_PFC_MUX8() macro for 8-bit data busses. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> [Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus, made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add USB pin groupsSergei Shtylyov2013-06-05
| | | | | | | | | Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it alphabeticallyKuninori Morimoto2013-06-05
| | | | | | | | SDHI 1/2 are the target Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: Fix outdated GPIO_FN commentsLaurent Pinchart2013-06-05
| | | | | | | | Function GPIOs have been removed, remove comments that refer to them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add SDHI supportKuninori Morimoto2013-06-04
| | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: r8a7778: add common PFC macro helperKuninori Morimoto2013-06-04
| | | | | | | | | | | pfc-r8a7778 will have many devices pfc support in the future, and current pfc-r8a7778 is using pin/mux definition macro for SCIF. The device definition style using macro is readable code IMO, but creating new macro for each devices is not good sense. This patch adds common SH_PFC_xx() macro for each new feature devices Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* sh-pfc: Add r8a7778 pinmux supportKuninori Morimoto2013-06-04
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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