Commit message (Expand) | Author | Age | |
---|---|---|---|
* | pinctrl-aspeed-g5: Never set SCU90[6] | Andrew Jeffery | 2016-11-07 |
* | pinctrl: aspeed-g5: Fix pin association of SPI1 function | Andrew Jeffery | 2016-10-18 |
* | pinctrl: aspeed-g5: Fix GPIOE1 typo | Andrew Jeffery | 2016-10-18 |
* | pinctrl: aspeed-g5: Fix names of GPID2 pins | Andrew Jeffery | 2016-10-18 |
* | pinctrl: aspeed: "Not enabled" is a significant mux state | Andrew Jeffery | 2016-10-18 |
* | pinctrl: aspeed: fix regmap error handling | Arnd Bergmann | 2016-09-13 |
* | pinctrl: Add pinctrl-aspeed-g5 driver | Andrew Jeffery | 2016-09-07 |
* | pinctrl: Add pinctrl-aspeed-g4 driver | Andrew Jeffery | 2016-09-07 |
* | pinctrl: Add core support for Aspeed SoCs | Andrew Jeffery | 2016-09-07 |