| Commit message (Expand) | Author | Age |
|---|
| * | drm/i915: Mass convert dev->dev_private to to_i915(dev) | Chris Wilson | 2016-07-04 |
| * | drm/i915: Fix buffer overflow in dsi_calc_mnp() | Chris Wilson | 2016-07-02 |
| * | drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() | Chris Wilson | 2016-06-30 |
| * | drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() | Chris Wilson | 2016-06-30 |
| * | drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll() | Ville Syrjälä | 2016-04-15 |
| * | drm/i915: Compute DSI PLL parameters during .compute_config() | Ville Syrjälä | 2016-04-15 |
| * | drm/i915: Fix CHV DSI PLL refclk during state readout | Ville Syrjälä | 2016-04-12 |
| * | drm/i915: Power down the DSI PLL before reconfiguring it | Ville Syrjälä | 2016-04-12 |
| * | drm/i915: Change lfsr_converts[] to u16 | Ville Syrjälä | 2016-04-12 |
| * | drm/i915/bxt: Fix DSI HW state readout | Imre Deak | 2016-03-24 |
| * | drm/i915/dsi: start using enum mipi_dsi_pixel_format | Jani Nikula | 2016-03-16 |
| * | drm/i915/dsi: lose the loose 666 format name in favor of packed | Jani Nikula | 2016-03-16 |
| * | drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards | Deepak M | 2016-03-03 |
| * | drm/i915/dsi: Using the bpp value wrt the pixel format | Deepak M | 2016-02-19 |
| * | drm/i915/dsi: remove unused dsi_rr_formula() | Jani Nikula | 2016-01-08 |
| * | drm/i915/dsi: abstract get pclk platform differences | Jani Nikula | 2016-01-08 |
| * | drm/i915: Separate cherryview from valleyview | Wayne Boyer | 2015-12-10 |
| * | drm/i915/bxt: vlv_dsi_reset_clocks() can be static | kbuild test robot | 2015-10-06 |
| * | drm/i915/bxt: get DSI pixelclock | Shashank Sharma | 2015-10-02 |
| * | drm/i915/bxt: DSI disable and post-disable | Shashank Sharma | 2015-10-02 |
| * | drm/i915/bxt: Program Tx Rx and Dphy clocks | Shashank Sharma | 2015-10-02 |
| * | drm/i915/bxt: Disable DSI PLL for BXT | Shashank Sharma | 2015-09-23 |
| * | drm/i915/bxt: Enable BXT DSI PLL | Shashank Sharma | 2015-09-23 |
| * | drm/i915: Changes required to enable DSI Video Mode on CHT | Gaurav K Singh | 2015-07-03 |
| * | drm/i915: Support for higher DSI clk | Gaurav K Singh | 2015-07-03 |
| * | drm/i915/dsi: abstract dsi bpp derivation from pixel format | Jani Nikula | 2015-07-03 |
| * | drm/i915: s/dpio_lock/sb_lock/ | Ville Syrjälä | 2015-05-28 |
| * | drm/i915/dsi: add support for DSI PLL N1 divisor values | Jani Nikula | 2015-05-20 |
| * | drm/i915: clean up dsi pll calculation | Jani Nikula | 2015-05-20 |
| * | drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C | Gaurav K Singh | 2014-12-10 |
| * | drm/i915: cck reg used for checking DSI Pll locked | Gaurav K Singh | 2014-12-05 |
| * | drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link | Gaurav K Singh | 2014-12-05 |
| * | drm/i915: Align intel_dsi*.c files a bit | Daniel Vetter | 2014-08-08 |
| * | drm/i915: Add support for Video Burst Mode for MIPI DSI | Shobhit Kumar | 2014-08-08 |
| * | drm/i915: Add correct hw/sw config check for DSI encoder | Shobhit Kumar | 2014-08-07 |
| * | drm/i915: Try harder to get best m, n, p values with minimal error | Shobhit Kumar | 2013-12-11 |
| * | drm/i915: Compute dsi_clk from pixel clock | Shobhit Kumar | 2013-12-11 |
| * | drm/i915: Use adjusted_mode in DSI PLL calculations | Ville Syrjälä | 2013-09-16 |
| * | drm/i915: add VLV DSI PLL Calculations | ymohanma | 2013-09-04 |
