| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | drivers: clk: st: PLL rate change implementation for DVFS | Gabriel Fernandez | 2015-10-09 |
| * | clk: st: Support for PLLs inside ClockGenA(s) | Gabriel FERNANDEZ | 2014-03-25 |
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index : litmus-rt-edfsc.git | |
| LITMUS^RT with the EDF-SC plugin for Real-Time Systems journal paper | Zelin Tong |
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