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It is necessary to properly configure these clocks in order
to address 720p and 1080p HDMI resolution.
Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Merge "STi DT changes for v4.4, round 1" from Maxime Coquelin:
Highlights:
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- Add multiple pinctrl configurations to STiH407
- Enable devices using pins only at board level
- Add HW RNG device nodes to STiH407 family
- Fix MMC0 clock configuration on STiH418
- Fix interrupt related bindings on STiH407
* tag 'sti-dt-for-v4.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: STi: STiH407: Enable the 2 HW Random Number Generators for STiH4{07, 10}
ARM: DT: STi: STiH418: Fix mmc0 clock configuration
ARM: STi: DT: STiH407: Rename incorrect interrupt related binding
ARM: STi: STiH407: Add spi default pinctrl groups.
ARM: DT: STiH407: Add RMII pinctrl support
ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX
ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller
ARM: DT: STiH407: Add systrace pin configuration
ARM: DT: STiH407: Add NAND flash controller pin configuration
ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config
ARM: DT: STiH407: Add serial3 pinctrl configuration
ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs
ARM: STi: DT: STiH407: Add i2c3 alternate pin configs
ARM: STi: DT: STiH407: Add a cec0 pin definition
ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level
ARM: dts: stih407/410: Tidy up display nodes
ARM: dts: stih407: Enable PWM nodes only board level
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The display nodes are common to both STiH407 and STiH410, move them to the
family file.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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STI drm drivers probe and bind using component framework was incorrect.
In addition to drivers fix DT update is needed to make all sub-components
become childs of sti-display-subsystem.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This also incorporates the STiH410.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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This patch adds the DRM/KMS dt nodes.
This node can't be in stih407-family.dtsi file because in the future we
will integrate a new stih418-b2199 board. It's a stih407 family board
with different drm/kms dt nodes.
That is why i created the stih407.dtsi file.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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The stih410 soc which will be added in the following commit is very similar to
the stih407, to enable maximum re-use of the dt files this commit abstracts the
common parts into a shared dt file stihxxx-b2120 for the board, and also a shared
file stih407-family.dtsi for the SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Patch adds DT entries for clockgen C0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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This patch adds the reset controller DT nodes for the powerdown,
softreset and picophy controllers.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU.
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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