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-rw-r--r--include/linux/mlx5/device.h20
-rw-r--r--include/linux/mlx5/mlx5_ifc.h6
2 files changed, 20 insertions, 6 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 7d3a85faefb7..df2f79ef3cac 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -443,9 +443,12 @@ struct mlx5_init_seg {
443 __be32 rsvd1[120]; 443 __be32 rsvd1[120];
444 __be32 initializing; 444 __be32 initializing;
445 struct health_buffer health; 445 struct health_buffer health;
446 __be32 rsvd2[884]; 446 __be32 rsvd2[880];
447 __be32 internal_timer_h;
448 __be32 internal_timer_l;
449 __be32 rsrv3[2];
447 __be32 health_counter; 450 __be32 health_counter;
448 __be32 rsvd3[1019]; 451 __be32 rsvd4[1019];
449 __be64 ieee1588_clk; 452 __be64 ieee1588_clk;
450 __be32 ieee1588_clk_type; 453 __be32 ieee1588_clk_type;
451 __be32 clr_intx; 454 __be32 clr_intx;
@@ -601,7 +604,8 @@ struct mlx5_cqe64 {
601 __be32 imm_inval_pkey; 604 __be32 imm_inval_pkey;
602 u8 rsvd40[4]; 605 u8 rsvd40[4];
603 __be32 byte_cnt; 606 __be32 byte_cnt;
604 __be64 timestamp; 607 __be32 timestamp_h;
608 __be32 timestamp_l;
605 __be32 sop_drop_qpn; 609 __be32 sop_drop_qpn;
606 __be16 wqe_counter; 610 __be16 wqe_counter;
607 u8 signature; 611 u8 signature;
@@ -623,6 +627,16 @@ static inline int cqe_has_vlan(struct mlx5_cqe64 *cqe)
623 return !!(cqe->l4_hdr_type_etc & 0x1); 627 return !!(cqe->l4_hdr_type_etc & 0x1);
624} 628}
625 629
630static inline u64 get_cqe_ts(struct mlx5_cqe64 *cqe)
631{
632 u32 hi, lo;
633
634 hi = be32_to_cpu(cqe->timestamp_h);
635 lo = be32_to_cpu(cqe->timestamp_l);
636
637 return (u64)lo | ((u64)hi << 32);
638}
639
626enum { 640enum {
627 CQE_L4_HDR_TYPE_NONE = 0x0, 641 CQE_L4_HDR_TYPE_NONE = 0x0,
628 CQE_L4_HDR_TYPE_TCP_NO_ACK = 0x1, 642 CQE_L4_HDR_TYPE_TCP_NO_ACK = 0x1,
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 131a2737cfa3..1780a85a8797 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -829,9 +829,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
829 u8 reserved_66[0x8]; 829 u8 reserved_66[0x8];
830 u8 log_uar_page_sz[0x10]; 830 u8 log_uar_page_sz[0x10];
831 831
832 u8 reserved_67[0xe0]; 832 u8 reserved_67[0x40];
833 833 u8 device_frequency_khz[0x20];
834 u8 reserved_68[0x1f]; 834 u8 reserved_68[0x5f];
835 u8 cqe_zip[0x1]; 835 u8 cqe_zip[0x1];
836 836
837 u8 cqe_zip_timeout[0x10]; 837 u8 cqe_zip_timeout[0x10];