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path: root/drivers/usb/serial/mos7720.c
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Diffstat (limited to 'drivers/usb/serial/mos7720.c')
-rw-r--r--drivers/usb/serial/mos7720.c253
1 files changed, 138 insertions, 115 deletions
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c
index 4f70df33975a..78b4f64c6b00 100644
--- a/drivers/usb/serial/mos7720.c
+++ b/drivers/usb/serial/mos7720.c
@@ -121,26 +121,26 @@ static DEFINE_SPINLOCK(release_lock);
121static const unsigned int dummy; /* for clarity in register access fns */ 121static const unsigned int dummy; /* for clarity in register access fns */
122 122
123enum mos_regs { 123enum mos_regs {
124 THR, /* serial port regs */ 124 MOS7720_THR, /* serial port regs */
125 RHR, 125 MOS7720_RHR,
126 IER, 126 MOS7720_IER,
127 FCR, 127 MOS7720_FCR,
128 ISR, 128 MOS7720_ISR,
129 LCR, 129 MOS7720_LCR,
130 MCR, 130 MOS7720_MCR,
131 LSR, 131 MOS7720_LSR,
132 MSR, 132 MOS7720_MSR,
133 SPR, 133 MOS7720_SPR,
134 DLL, 134 MOS7720_DLL,
135 DLM, 135 MOS7720_DLM,
136 DPR, /* parallel port regs */ 136 MOS7720_DPR, /* parallel port regs */
137 DSR, 137 MOS7720_DSR,
138 DCR, 138 MOS7720_DCR,
139 ECR, 139 MOS7720_ECR,
140 SP1_REG, /* device control regs */ 140 MOS7720_SP1_REG, /* device control regs */
141 SP2_REG, /* serial port 2 (7720 only) */ 141 MOS7720_SP2_REG, /* serial port 2 (7720 only) */
142 PP_REG, 142 MOS7720_PP_REG,
143 SP_CONTROL_REG, 143 MOS7720_SP_CONTROL_REG,
144}; 144};
145 145
146/* 146/*
@@ -150,26 +150,26 @@ enum mos_regs {
150static inline __u16 get_reg_index(enum mos_regs reg) 150static inline __u16 get_reg_index(enum mos_regs reg)
151{ 151{
152 static const __u16 mos7715_index_lookup_table[] = { 152 static const __u16 mos7715_index_lookup_table[] = {
153 0x00, /* THR */ 153 0x00, /* MOS7720_THR */
154 0x00, /* RHR */ 154 0x00, /* MOS7720_RHR */
155 0x01, /* IER */ 155 0x01, /* MOS7720_IER */
156 0x02, /* FCR */ 156 0x02, /* MOS7720_FCR */
157 0x02, /* ISR */ 157 0x02, /* MOS7720_ISR */
158 0x03, /* LCR */ 158 0x03, /* MOS7720_LCR */
159 0x04, /* MCR */ 159 0x04, /* MOS7720_MCR */
160 0x05, /* LSR */ 160 0x05, /* MOS7720_LSR */
161 0x06, /* MSR */ 161 0x06, /* MOS7720_MSR */
162 0x07, /* SPR */ 162 0x07, /* MOS7720_SPR */
163 0x00, /* DLL */ 163 0x00, /* MOS7720_DLL */
164 0x01, /* DLM */ 164 0x01, /* MOS7720_DLM */
165 0x00, /* DPR */ 165 0x00, /* MOS7720_DPR */
166 0x01, /* DSR */ 166 0x01, /* MOS7720_DSR */
167 0x02, /* DCR */ 167 0x02, /* MOS7720_DCR */
168 0x0a, /* ECR */ 168 0x0a, /* MOS7720_ECR */
169 0x01, /* SP1_REG */ 169 0x01, /* MOS7720_SP1_REG */
170 0x02, /* SP2_REG (7720 only) */ 170 0x02, /* MOS7720_SP2_REG (7720 only) */
171 0x04, /* PP_REG (7715 only) */ 171 0x04, /* MOS7720_PP_REG (7715 only) */
172 0x08, /* SP_CONTROL_REG */ 172 0x08, /* MOS7720_SP_CONTROL_REG */
173 }; 173 };
174 return mos7715_index_lookup_table[reg]; 174 return mos7715_index_lookup_table[reg];
175} 175}
@@ -181,10 +181,10 @@ static inline __u16 get_reg_index(enum mos_regs reg)
181static inline __u16 get_reg_value(enum mos_regs reg, 181static inline __u16 get_reg_value(enum mos_regs reg,
182 unsigned int serial_portnum) 182 unsigned int serial_portnum)
183{ 183{
184 if (reg >= SP1_REG) /* control reg */ 184 if (reg >= MOS7720_SP1_REG) /* control reg */
185 return 0x0000; 185 return 0x0000;
186 186
187 else if (reg >= DPR) /* parallel port reg (7715 only) */ 187 else if (reg >= MOS7720_DPR) /* parallel port reg (7715 only) */
188 return 0x0100; 188 return 0x0100;
189 189
190 else /* serial port reg */ 190 else /* serial port reg */
@@ -252,7 +252,8 @@ static inline int mos7715_change_mode(struct mos7715_parport *mos_parport,
252 enum mos7715_pp_modes mode) 252 enum mos7715_pp_modes mode)
253{ 253{
254 mos_parport->shadowECR = mode; 254 mos_parport->shadowECR = mode;
255 write_mos_reg(mos_parport->serial, dummy, ECR, mos_parport->shadowECR); 255 write_mos_reg(mos_parport->serial, dummy, MOS7720_ECR,
256 mos_parport->shadowECR);
256 return 0; 257 return 0;
257} 258}
258 259
@@ -486,7 +487,7 @@ static void parport_mos7715_write_data(struct parport *pp, unsigned char d)
486 if (parport_prologue(pp) < 0) 487 if (parport_prologue(pp) < 0)
487 return; 488 return;
488 mos7715_change_mode(mos_parport, SPP); 489 mos7715_change_mode(mos_parport, SPP);
489 write_mos_reg(mos_parport->serial, dummy, DPR, (__u8)d); 490 write_mos_reg(mos_parport->serial, dummy, MOS7720_DPR, (__u8)d);
490 parport_epilogue(pp); 491 parport_epilogue(pp);
491} 492}
492 493
@@ -497,7 +498,7 @@ static unsigned char parport_mos7715_read_data(struct parport *pp)
497 498
498 if (parport_prologue(pp) < 0) 499 if (parport_prologue(pp) < 0)
499 return 0; 500 return 0;
500 read_mos_reg(mos_parport->serial, dummy, DPR, &d); 501 read_mos_reg(mos_parport->serial, dummy, MOS7720_DPR, &d);
501 parport_epilogue(pp); 502 parport_epilogue(pp);
502 return d; 503 return d;
503} 504}
@@ -510,7 +511,7 @@ static void parport_mos7715_write_control(struct parport *pp, unsigned char d)
510 if (parport_prologue(pp) < 0) 511 if (parport_prologue(pp) < 0)
511 return; 512 return;
512 data = ((__u8)d & 0x0f) | (mos_parport->shadowDCR & 0xf0); 513 data = ((__u8)d & 0x0f) | (mos_parport->shadowDCR & 0xf0);
513 write_mos_reg(mos_parport->serial, dummy, DCR, data); 514 write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR, data);
514 mos_parport->shadowDCR = data; 515 mos_parport->shadowDCR = data;
515 parport_epilogue(pp); 516 parport_epilogue(pp);
516} 517}
@@ -543,7 +544,8 @@ static unsigned char parport_mos7715_frob_control(struct parport *pp,
543 if (parport_prologue(pp) < 0) 544 if (parport_prologue(pp) < 0)
544 return 0; 545 return 0;
545 mos_parport->shadowDCR = (mos_parport->shadowDCR & (~mask)) ^ val; 546 mos_parport->shadowDCR = (mos_parport->shadowDCR & (~mask)) ^ val;
546 write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR); 547 write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
548 mos_parport->shadowDCR);
547 dcr = mos_parport->shadowDCR & 0x0f; 549 dcr = mos_parport->shadowDCR & 0x0f;
548 parport_epilogue(pp); 550 parport_epilogue(pp);
549 return dcr; 551 return dcr;
@@ -581,7 +583,8 @@ static void parport_mos7715_data_forward(struct parport *pp)
581 return; 583 return;
582 mos7715_change_mode(mos_parport, PS2); 584 mos7715_change_mode(mos_parport, PS2);
583 mos_parport->shadowDCR &= ~0x20; 585 mos_parport->shadowDCR &= ~0x20;
584 write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR); 586 write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
587 mos_parport->shadowDCR);
585 parport_epilogue(pp); 588 parport_epilogue(pp);
586} 589}
587 590
@@ -593,7 +596,8 @@ static void parport_mos7715_data_reverse(struct parport *pp)
593 return; 596 return;
594 mos7715_change_mode(mos_parport, PS2); 597 mos7715_change_mode(mos_parport, PS2);
595 mos_parport->shadowDCR |= 0x20; 598 mos_parport->shadowDCR |= 0x20;
596 write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR); 599 write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
600 mos_parport->shadowDCR);
597 parport_epilogue(pp); 601 parport_epilogue(pp);
598} 602}
599 603
@@ -633,8 +637,10 @@ static void parport_mos7715_restore_state(struct parport *pp,
633 spin_unlock(&release_lock); 637 spin_unlock(&release_lock);
634 return; 638 return;
635 } 639 }
636 write_parport_reg_nonblock(mos_parport, DCR, mos_parport->shadowDCR); 640 write_parport_reg_nonblock(mos_parport, MOS7720_DCR,
637 write_parport_reg_nonblock(mos_parport, ECR, mos_parport->shadowECR); 641 mos_parport->shadowDCR);
642 write_parport_reg_nonblock(mos_parport, MOS7720_ECR,
643 mos_parport->shadowECR);
638 spin_unlock(&release_lock); 644 spin_unlock(&release_lock);
639} 645}
640 646
@@ -714,14 +720,16 @@ static int mos7715_parport_init(struct usb_serial *serial)
714 init_completion(&mos_parport->syncmsg_compl); 720 init_completion(&mos_parport->syncmsg_compl);
715 721
716 /* cycle parallel port reset bit */ 722 /* cycle parallel port reset bit */
717 write_mos_reg(mos_parport->serial, dummy, PP_REG, (__u8)0x80); 723 write_mos_reg(mos_parport->serial, dummy, MOS7720_PP_REG, (__u8)0x80);
718 write_mos_reg(mos_parport->serial, dummy, PP_REG, (__u8)0x00); 724 write_mos_reg(mos_parport->serial, dummy, MOS7720_PP_REG, (__u8)0x00);
719 725
720 /* initialize device registers */ 726 /* initialize device registers */
721 mos_parport->shadowDCR = DCR_INIT_VAL; 727 mos_parport->shadowDCR = DCR_INIT_VAL;
722 write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR); 728 write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
729 mos_parport->shadowDCR);
723 mos_parport->shadowECR = ECR_INIT_VAL; 730 mos_parport->shadowECR = ECR_INIT_VAL;
724 write_mos_reg(mos_parport->serial, dummy, ECR, mos_parport->shadowECR); 731 write_mos_reg(mos_parport->serial, dummy, MOS7720_ECR,
732 mos_parport->shadowECR);
725 733
726 /* register with parport core */ 734 /* register with parport core */
727 mos_parport->pp = parport_register_port(0, PARPORT_IRQ_NONE, 735 mos_parport->pp = parport_register_port(0, PARPORT_IRQ_NONE,
@@ -1033,45 +1041,49 @@ static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port)
1033 /* Initialize MCS7720 -- Write Init values to corresponding Registers 1041 /* Initialize MCS7720 -- Write Init values to corresponding Registers
1034 * 1042 *
1035 * Register Index 1043 * Register Index
1036 * 0 : THR/RHR 1044 * 0 : MOS7720_THR/MOS7720_RHR
1037 * 1 : IER 1045 * 1 : MOS7720_IER
1038 * 2 : FCR 1046 * 2 : MOS7720_FCR
1039 * 3 : LCR 1047 * 3 : MOS7720_LCR
1040 * 4 : MCR 1048 * 4 : MOS7720_MCR
1041 * 5 : LSR 1049 * 5 : MOS7720_LSR
1042 * 6 : MSR 1050 * 6 : MOS7720_MSR
1043 * 7 : SPR 1051 * 7 : MOS7720_SPR
1044 * 1052 *
1045 * 0x08 : SP1/2 Control Reg 1053 * 0x08 : SP1/2 Control Reg
1046 */ 1054 */
1047 port_number = port->port_number; 1055 port_number = port->port_number;
1048 read_mos_reg(serial, port_number, LSR, &data); 1056 read_mos_reg(serial, port_number, MOS7720_LSR, &data);
1049 1057
1050 dev_dbg(&port->dev, "SS::%p LSR:%x\n", mos7720_port, data); 1058 dev_dbg(&port->dev, "SS::%p LSR:%x\n", mos7720_port, data);
1051 1059
1052 write_mos_reg(serial, dummy, SP1_REG, 0x02); 1060 write_mos_reg(serial, dummy, MOS7720_SP1_REG, 0x02);
1053 write_mos_reg(serial, dummy, SP2_REG, 0x02); 1061 write_mos_reg(serial, dummy, MOS7720_SP2_REG, 0x02);
1054 1062
1055 write_mos_reg(serial, port_number, IER, 0x00); 1063 write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
1056 write_mos_reg(serial, port_number, FCR, 0x00); 1064 write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
1057 1065
1058 write_mos_reg(serial, port_number, FCR, 0xcf); 1066 write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
1059 mos7720_port->shadowLCR = 0x03; 1067 mos7720_port->shadowLCR = 0x03;
1060 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1068 write_mos_reg(serial, port_number, MOS7720_LCR,
1069 mos7720_port->shadowLCR);
1061 mos7720_port->shadowMCR = 0x0b; 1070 mos7720_port->shadowMCR = 0x0b;
1062 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); 1071 write_mos_reg(serial, port_number, MOS7720_MCR,
1072 mos7720_port->shadowMCR);
1063 1073
1064 write_mos_reg(serial, port_number, SP_CONTROL_REG, 0x00); 1074 write_mos_reg(serial, port_number, MOS7720_SP_CONTROL_REG, 0x00);
1065 read_mos_reg(serial, dummy, SP_CONTROL_REG, &data); 1075 read_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, &data);
1066 data = data | (port->port_number + 1); 1076 data = data | (port->port_number + 1);
1067 write_mos_reg(serial, dummy, SP_CONTROL_REG, data); 1077 write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, data);
1068 mos7720_port->shadowLCR = 0x83; 1078 mos7720_port->shadowLCR = 0x83;
1069 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1079 write_mos_reg(serial, port_number, MOS7720_LCR,
1070 write_mos_reg(serial, port_number, THR, 0x0c); 1080 mos7720_port->shadowLCR);
1071 write_mos_reg(serial, port_number, IER, 0x00); 1081 write_mos_reg(serial, port_number, MOS7720_THR, 0x0c);
1082 write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
1072 mos7720_port->shadowLCR = 0x03; 1083 mos7720_port->shadowLCR = 0x03;
1073 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1084 write_mos_reg(serial, port_number, MOS7720_LCR,
1074 write_mos_reg(serial, port_number, IER, 0x0c); 1085 mos7720_port->shadowLCR);
1086 write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
1075 1087
1076 response = usb_submit_urb(port->read_urb, GFP_KERNEL); 1088 response = usb_submit_urb(port->read_urb, GFP_KERNEL);
1077 if (response) 1089 if (response)
@@ -1144,8 +1156,8 @@ static void mos7720_close(struct usb_serial_port *port)
1144 usb_kill_urb(port->write_urb); 1156 usb_kill_urb(port->write_urb);
1145 usb_kill_urb(port->read_urb); 1157 usb_kill_urb(port->read_urb);
1146 1158
1147 write_mos_reg(serial, port->port_number, MCR, 0x00); 1159 write_mos_reg(serial, port->port_number, MOS7720_MCR, 0x00);
1148 write_mos_reg(serial, port->port_number, IER, 0x00); 1160 write_mos_reg(serial, port->port_number, MOS7720_IER, 0x00);
1149 1161
1150 mos7720_port->open = 0; 1162 mos7720_port->open = 0;
1151} 1163}
@@ -1169,7 +1181,8 @@ static void mos7720_break(struct tty_struct *tty, int break_state)
1169 data = mos7720_port->shadowLCR & ~UART_LCR_SBC; 1181 data = mos7720_port->shadowLCR & ~UART_LCR_SBC;
1170 1182
1171 mos7720_port->shadowLCR = data; 1183 mos7720_port->shadowLCR = data;
1172 write_mos_reg(serial, port->port_number, LCR, mos7720_port->shadowLCR); 1184 write_mos_reg(serial, port->port_number, MOS7720_LCR,
1185 mos7720_port->shadowLCR);
1173} 1186}
1174 1187
1175/* 1188/*
@@ -1297,7 +1310,7 @@ static void mos7720_throttle(struct tty_struct *tty)
1297 /* if we are implementing RTS/CTS, toggle that line */ 1310 /* if we are implementing RTS/CTS, toggle that line */
1298 if (tty->termios.c_cflag & CRTSCTS) { 1311 if (tty->termios.c_cflag & CRTSCTS) {
1299 mos7720_port->shadowMCR &= ~UART_MCR_RTS; 1312 mos7720_port->shadowMCR &= ~UART_MCR_RTS;
1300 write_mos_reg(port->serial, port->port_number, MCR, 1313 write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
1301 mos7720_port->shadowMCR); 1314 mos7720_port->shadowMCR);
1302 } 1315 }
1303} 1316}
@@ -1327,7 +1340,7 @@ static void mos7720_unthrottle(struct tty_struct *tty)
1327 /* if we are implementing RTS/CTS, toggle that line */ 1340 /* if we are implementing RTS/CTS, toggle that line */
1328 if (tty->termios.c_cflag & CRTSCTS) { 1341 if (tty->termios.c_cflag & CRTSCTS) {
1329 mos7720_port->shadowMCR |= UART_MCR_RTS; 1342 mos7720_port->shadowMCR |= UART_MCR_RTS;
1330 write_mos_reg(port->serial, port->port_number, MCR, 1343 write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
1331 mos7720_port->shadowMCR); 1344 mos7720_port->shadowMCR);
1332 } 1345 }
1333} 1346}
@@ -1352,35 +1365,39 @@ static int set_higher_rates(struct moschip_port *mos7720_port,
1352 dev_dbg(&port->dev, "Sending Setting Commands ..........\n"); 1365 dev_dbg(&port->dev, "Sending Setting Commands ..........\n");
1353 port_number = port->port_number; 1366 port_number = port->port_number;
1354 1367
1355 write_mos_reg(serial, port_number, IER, 0x00); 1368 write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
1356 write_mos_reg(serial, port_number, FCR, 0x00); 1369 write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
1357 write_mos_reg(serial, port_number, FCR, 0xcf); 1370 write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
1358 mos7720_port->shadowMCR = 0x0b; 1371 mos7720_port->shadowMCR = 0x0b;
1359 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); 1372 write_mos_reg(serial, port_number, MOS7720_MCR,
1360 write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x00); 1373 mos7720_port->shadowMCR);
1374 write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, 0x00);
1361 1375
1362 /*********************************************** 1376 /***********************************************
1363 * Set for higher rates * 1377 * Set for higher rates *
1364 ***********************************************/ 1378 ***********************************************/
1365 /* writing baud rate verbatum into uart clock field clearly not right */ 1379 /* writing baud rate verbatum into uart clock field clearly not right */
1366 if (port_number == 0) 1380 if (port_number == 0)
1367 sp_reg = SP1_REG; 1381 sp_reg = MOS7720_SP1_REG;
1368 else 1382 else
1369 sp_reg = SP2_REG; 1383 sp_reg = MOS7720_SP2_REG;
1370 write_mos_reg(serial, dummy, sp_reg, baud * 0x10); 1384 write_mos_reg(serial, dummy, sp_reg, baud * 0x10);
1371 write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x03); 1385 write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, 0x03);
1372 mos7720_port->shadowMCR = 0x2b; 1386 mos7720_port->shadowMCR = 0x2b;
1373 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); 1387 write_mos_reg(serial, port_number, MOS7720_MCR,
1388 mos7720_port->shadowMCR);
1374 1389
1375 /*********************************************** 1390 /***********************************************
1376 * Set DLL/DLM 1391 * Set DLL/DLM
1377 ***********************************************/ 1392 ***********************************************/
1378 mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB; 1393 mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB;
1379 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1394 write_mos_reg(serial, port_number, MOS7720_LCR,
1380 write_mos_reg(serial, port_number, DLL, 0x01); 1395 mos7720_port->shadowLCR);
1381 write_mos_reg(serial, port_number, DLM, 0x00); 1396 write_mos_reg(serial, port_number, MOS7720_DLL, 0x01);
1397 write_mos_reg(serial, port_number, MOS7720_DLM, 0x00);
1382 mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB; 1398 mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB;
1383 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1399 write_mos_reg(serial, port_number, MOS7720_LCR,
1400 mos7720_port->shadowLCR);
1384 1401
1385 return 0; 1402 return 0;
1386} 1403}
@@ -1488,15 +1505,16 @@ static int send_cmd_write_baud_rate(struct moschip_port *mos7720_port,
1488 1505
1489 /* Enable access to divisor latch */ 1506 /* Enable access to divisor latch */
1490 mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB; 1507 mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB;
1491 write_mos_reg(serial, number, LCR, mos7720_port->shadowLCR); 1508 write_mos_reg(serial, number, MOS7720_LCR, mos7720_port->shadowLCR);
1492 1509
1493 /* Write the divisor */ 1510 /* Write the divisor */
1494 write_mos_reg(serial, number, DLL, (__u8)(divisor & 0xff)); 1511 write_mos_reg(serial, number, MOS7720_DLL, (__u8)(divisor & 0xff));
1495 write_mos_reg(serial, number, DLM, (__u8)((divisor & 0xff00) >> 8)); 1512 write_mos_reg(serial, number, MOS7720_DLM,
1513 (__u8)((divisor & 0xff00) >> 8));
1496 1514
1497 /* Disable access to divisor latch */ 1515 /* Disable access to divisor latch */
1498 mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB; 1516 mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB;
1499 write_mos_reg(serial, number, LCR, mos7720_port->shadowLCR); 1517 write_mos_reg(serial, number, MOS7720_LCR, mos7720_port->shadowLCR);
1500 1518
1501 return status; 1519 return status;
1502} 1520}
@@ -1600,14 +1618,16 @@ static void change_port_settings(struct tty_struct *tty,
1600 1618
1601 1619
1602 /* Disable Interrupts */ 1620 /* Disable Interrupts */
1603 write_mos_reg(serial, port_number, IER, 0x00); 1621 write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
1604 write_mos_reg(serial, port_number, FCR, 0x00); 1622 write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
1605 write_mos_reg(serial, port_number, FCR, 0xcf); 1623 write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
1606 1624
1607 /* Send the updated LCR value to the mos7720 */ 1625 /* Send the updated LCR value to the mos7720 */
1608 write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR); 1626 write_mos_reg(serial, port_number, MOS7720_LCR,
1627 mos7720_port->shadowLCR);
1609 mos7720_port->shadowMCR = 0x0b; 1628 mos7720_port->shadowMCR = 0x0b;
1610 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); 1629 write_mos_reg(serial, port_number, MOS7720_MCR,
1630 mos7720_port->shadowMCR);
1611 1631
1612 /* set up the MCR register and send it to the mos7720 */ 1632 /* set up the MCR register and send it to the mos7720 */
1613 mos7720_port->shadowMCR = UART_MCR_OUT2; 1633 mos7720_port->shadowMCR = UART_MCR_OUT2;
@@ -1619,14 +1639,17 @@ static void change_port_settings(struct tty_struct *tty,
1619 /* To set hardware flow control to the specified * 1639 /* To set hardware flow control to the specified *
1620 * serial port, in SP1/2_CONTROL_REG */ 1640 * serial port, in SP1/2_CONTROL_REG */
1621 if (port_number) 1641 if (port_number)
1622 write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x01); 1642 write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG,
1643 0x01);
1623 else 1644 else
1624 write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x02); 1645 write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG,
1646 0x02);
1625 1647
1626 } else 1648 } else
1627 mos7720_port->shadowMCR &= ~(UART_MCR_XONANY); 1649 mos7720_port->shadowMCR &= ~(UART_MCR_XONANY);
1628 1650
1629 write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR); 1651 write_mos_reg(serial, port_number, MOS7720_MCR,
1652 mos7720_port->shadowMCR);
1630 1653
1631 /* Determine divisor based on baud rate */ 1654 /* Determine divisor based on baud rate */
1632 baud = tty_get_baud_rate(tty); 1655 baud = tty_get_baud_rate(tty);
@@ -1639,7 +1662,7 @@ static void change_port_settings(struct tty_struct *tty,
1639 if (baud >= 230400) { 1662 if (baud >= 230400) {
1640 set_higher_rates(mos7720_port, baud); 1663 set_higher_rates(mos7720_port, baud);
1641 /* Enable Interrupts */ 1664 /* Enable Interrupts */
1642 write_mos_reg(serial, port_number, IER, 0x0c); 1665 write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
1643 return; 1666 return;
1644 } 1667 }
1645 1668
@@ -1650,7 +1673,7 @@ static void change_port_settings(struct tty_struct *tty,
1650 if (cflag & CBAUD) 1673 if (cflag & CBAUD)
1651 tty_encode_baud_rate(tty, baud, baud); 1674 tty_encode_baud_rate(tty, baud, baud);
1652 /* Enable Interrupts */ 1675 /* Enable Interrupts */
1653 write_mos_reg(serial, port_number, IER, 0x0c); 1676 write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
1654 1677
1655 if (port->read_urb->status != -EINPROGRESS) { 1678 if (port->read_urb->status != -EINPROGRESS) {
1656 status = usb_submit_urb(port->read_urb, GFP_KERNEL); 1679 status = usb_submit_urb(port->read_urb, GFP_KERNEL);
@@ -1725,7 +1748,7 @@ static int get_lsr_info(struct tty_struct *tty,
1725 1748
1726 count = mos7720_chars_in_buffer(tty); 1749 count = mos7720_chars_in_buffer(tty);
1727 if (count == 0) { 1750 if (count == 0) {
1728 read_mos_reg(port->serial, port_number, LSR, &data); 1751 read_mos_reg(port->serial, port_number, MOS7720_LSR, &data);
1729 if ((data & (UART_LSR_TEMT | UART_LSR_THRE)) 1752 if ((data & (UART_LSR_TEMT | UART_LSR_THRE))
1730 == (UART_LSR_TEMT | UART_LSR_THRE)) { 1753 == (UART_LSR_TEMT | UART_LSR_THRE)) {
1731 dev_dbg(&port->dev, "%s -- Empty\n", __func__); 1754 dev_dbg(&port->dev, "%s -- Empty\n", __func__);
@@ -1782,7 +1805,7 @@ static int mos7720_tiocmset(struct tty_struct *tty,
1782 mcr &= ~UART_MCR_LOOP; 1805 mcr &= ~UART_MCR_LOOP;
1783 1806
1784 mos7720_port->shadowMCR = mcr; 1807 mos7720_port->shadowMCR = mcr;
1785 write_mos_reg(port->serial, port->port_number, MCR, 1808 write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
1786 mos7720_port->shadowMCR); 1809 mos7720_port->shadowMCR);
1787 1810
1788 return 0; 1811 return 0;
@@ -1827,7 +1850,7 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd,
1827 } 1850 }
1828 1851
1829 mos7720_port->shadowMCR = mcr; 1852 mos7720_port->shadowMCR = mcr;
1830 write_mos_reg(port->serial, port->port_number, MCR, 1853 write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
1831 mos7720_port->shadowMCR); 1854 mos7720_port->shadowMCR);
1832 1855
1833 return 0; 1856 return 0;
@@ -1942,7 +1965,7 @@ static int mos7720_startup(struct usb_serial *serial)
1942 } 1965 }
1943#endif 1966#endif
1944 /* LSR For Port 1 */ 1967 /* LSR For Port 1 */
1945 read_mos_reg(serial, 0, LSR, &data); 1968 read_mos_reg(serial, 0, MOS7720_LSR, &data);
1946 dev_dbg(&dev->dev, "LSR:%x\n", data); 1969 dev_dbg(&dev->dev, "LSR:%x\n", data);
1947 1970
1948 return 0; 1971 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 00:23:40 -0500