diff options
Diffstat (limited to 'drivers/usb/gadget/bcm63xx_udc.c')
-rw-r--r-- | drivers/usb/gadget/bcm63xx_udc.c | 58 |
1 files changed, 32 insertions, 26 deletions
diff --git a/drivers/usb/gadget/bcm63xx_udc.c b/drivers/usb/gadget/bcm63xx_udc.c index 888fbb43b338..e969eb809a85 100644 --- a/drivers/usb/gadget/bcm63xx_udc.c +++ b/drivers/usb/gadget/bcm63xx_udc.c | |||
@@ -360,24 +360,30 @@ static inline void usb_dma_writel(struct bcm63xx_udc *udc, u32 val, u32 off) | |||
360 | bcm_writel(val, udc->iudma_regs + off); | 360 | bcm_writel(val, udc->iudma_regs + off); |
361 | } | 361 | } |
362 | 362 | ||
363 | static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off) | 363 | static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off, int chan) |
364 | { | 364 | { |
365 | return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off); | 365 | return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off + |
366 | (ENETDMA_CHAN_WIDTH * chan)); | ||
366 | } | 367 | } |
367 | 368 | ||
368 | static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off) | 369 | static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off, |
370 | int chan) | ||
369 | { | 371 | { |
370 | bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off); | 372 | bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off + |
373 | (ENETDMA_CHAN_WIDTH * chan)); | ||
371 | } | 374 | } |
372 | 375 | ||
373 | static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off) | 376 | static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off, int chan) |
374 | { | 377 | { |
375 | return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off); | 378 | return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off + |
379 | (ENETDMA_CHAN_WIDTH * chan)); | ||
376 | } | 380 | } |
377 | 381 | ||
378 | static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off) | 382 | static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off, |
383 | int chan) | ||
379 | { | 384 | { |
380 | bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off); | 385 | bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off + |
386 | (ENETDMA_CHAN_WIDTH * chan)); | ||
381 | } | 387 | } |
382 | 388 | ||
383 | static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled) | 389 | static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled) |
@@ -638,7 +644,7 @@ static void iudma_write(struct bcm63xx_udc *udc, struct iudma_ch *iudma, | |||
638 | } while (!last_bd); | 644 | } while (!last_bd); |
639 | 645 | ||
640 | usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK, | 646 | usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK, |
641 | ENETDMAC_CHANCFG_REG(iudma->ch_idx)); | 647 | ENETDMAC_CHANCFG_REG, iudma->ch_idx); |
642 | } | 648 | } |
643 | 649 | ||
644 | /** | 650 | /** |
@@ -694,9 +700,9 @@ static void iudma_reset_channel(struct bcm63xx_udc *udc, struct iudma_ch *iudma) | |||
694 | bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num)); | 700 | bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num)); |
695 | 701 | ||
696 | /* stop DMA, then wait for the hardware to wrap up */ | 702 | /* stop DMA, then wait for the hardware to wrap up */ |
697 | usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG(ch_idx)); | 703 | usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG, ch_idx); |
698 | 704 | ||
699 | while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)) & | 705 | while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx) & |
700 | ENETDMAC_CHANCFG_EN_MASK) { | 706 | ENETDMAC_CHANCFG_EN_MASK) { |
701 | udelay(1); | 707 | udelay(1); |
702 | 708 | ||
@@ -713,10 +719,10 @@ static void iudma_reset_channel(struct bcm63xx_udc *udc, struct iudma_ch *iudma) | |||
713 | dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n", | 719 | dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n", |
714 | ch_idx); | 720 | ch_idx); |
715 | usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK, | 721 | usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK, |
716 | ENETDMAC_CHANCFG_REG(ch_idx)); | 722 | ENETDMAC_CHANCFG_REG, ch_idx); |
717 | } | 723 | } |
718 | } | 724 | } |
719 | usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG(ch_idx)); | 725 | usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG, ch_idx); |
720 | 726 | ||
721 | /* don't leave "live" HW-owned entries for the next guy to step on */ | 727 | /* don't leave "live" HW-owned entries for the next guy to step on */ |
722 | for (d = iudma->bd_ring; d <= iudma->end_bd; d++) | 728 | for (d = iudma->bd_ring; d <= iudma->end_bd; d++) |
@@ -728,11 +734,11 @@ static void iudma_reset_channel(struct bcm63xx_udc *udc, struct iudma_ch *iudma) | |||
728 | 734 | ||
729 | /* set up IRQs, UBUS burst size, and BD base for this channel */ | 735 | /* set up IRQs, UBUS burst size, and BD base for this channel */ |
730 | usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK, | 736 | usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK, |
731 | ENETDMAC_IRMASK_REG(ch_idx)); | 737 | ENETDMAC_IRMASK_REG, ch_idx); |
732 | usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG(ch_idx)); | 738 | usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG, ch_idx); |
733 | 739 | ||
734 | usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG(ch_idx)); | 740 | usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG, ch_idx); |
735 | usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG(ch_idx)); | 741 | usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG, ch_idx); |
736 | } | 742 | } |
737 | 743 | ||
738 | /** | 744 | /** |
@@ -2035,7 +2041,7 @@ static irqreturn_t bcm63xx_udc_data_isr(int irq, void *dev_id) | |||
2035 | spin_lock(&udc->lock); | 2041 | spin_lock(&udc->lock); |
2036 | 2042 | ||
2037 | usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK, | 2043 | usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK, |
2038 | ENETDMAC_IR_REG(iudma->ch_idx)); | 2044 | ENETDMAC_IR_REG, iudma->ch_idx); |
2039 | bep = iudma->bep; | 2045 | bep = iudma->bep; |
2040 | rc = iudma_read(udc, iudma); | 2046 | rc = iudma_read(udc, iudma); |
2041 | 2047 | ||
@@ -2175,18 +2181,18 @@ static int bcm63xx_iudma_dbg_show(struct seq_file *s, void *p) | |||
2175 | seq_printf(s, " [ep%d]:\n", | 2181 | seq_printf(s, " [ep%d]:\n", |
2176 | max_t(int, iudma_defaults[ch_idx].ep_num, 0)); | 2182 | max_t(int, iudma_defaults[ch_idx].ep_num, 0)); |
2177 | seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n", | 2183 | seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n", |
2178 | usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)), | 2184 | usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx), |
2179 | usb_dmac_readl(udc, ENETDMAC_IR_REG(ch_idx)), | 2185 | usb_dmac_readl(udc, ENETDMAC_IR_REG, ch_idx), |
2180 | usb_dmac_readl(udc, ENETDMAC_IRMASK_REG(ch_idx)), | 2186 | usb_dmac_readl(udc, ENETDMAC_IRMASK_REG, ch_idx), |
2181 | usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG(ch_idx))); | 2187 | usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG, ch_idx)); |
2182 | 2188 | ||
2183 | sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG(ch_idx)); | 2189 | sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG, ch_idx); |
2184 | sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG(ch_idx)); | 2190 | sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG, ch_idx); |
2185 | seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n", | 2191 | seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n", |
2186 | usb_dmas_readl(udc, ENETDMAS_RSTART_REG(ch_idx)), | 2192 | usb_dmas_readl(udc, ENETDMAS_RSTART_REG, ch_idx), |
2187 | sram2 >> 16, sram2 & 0xffff, | 2193 | sram2 >> 16, sram2 & 0xffff, |
2188 | sram3 >> 16, sram3 & 0xffff, | 2194 | sram3 >> 16, sram3 & 0xffff, |
2189 | usb_dmas_readl(udc, ENETDMAS_SRAM4_REG(ch_idx))); | 2195 | usb_dmas_readl(udc, ENETDMAS_SRAM4_REG, ch_idx)); |
2190 | seq_printf(s, " desc: %d/%d used", iudma->n_bds_used, | 2196 | seq_printf(s, " desc: %d/%d used", iudma->n_bds_used, |
2191 | iudma->n_bds); | 2197 | iudma->n_bds); |
2192 | 2198 | ||