1 files changed, 129 insertions, 3 deletions

diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
index fafcf5e354c6..42c459a9d3fe 100644
--- a/drivers/scsi/ufs/ufs.h
+++ b/drivers/scsi/ufs/ufs.h
@@ -49,6 +49,27 @@
 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
                         cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
                          (byte1 << 8) | (byte0))
+/*
+ * UFS device may have standard LUs and LUN id could be from 0x00 to
+ * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
+ * UFS device may also have the Well Known LUs (also referred as W-LU)
+ * which again could be from 0x00 to 0x7F. For W-LUs, device only use
+ * the "Extended Addressing Format" which means the W-LUNs would be
+ * from 0xc100 (SCSI_W_LUN_BASE) onwards.
+ * This means max. LUN number reported from UFS device could be 0xC17F.
+ */
+#define UFS_UPIU_MAX_UNIT_NUM_ID        0x7F
+#define UFS_MAX_LUNS            (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
+#define UFS_UPIU_WLUN_ID        (1 << 7)
+#define UFS_UPIU_MAX_GENERAL_LUN        8
+
+/* Well known logical unit id in LUN field of UPIU */
+enum {
+        UFS_UPIU_REPORT_LUNS_WLUN       = 0x81,
+        UFS_UPIU_UFS_DEVICE_WLUN        = 0xD0,
+        UFS_UPIU_BOOT_WLUN              = 0xB0,
+        UFS_UPIU_RPMB_WLUN              = 0xC4,
+};
 
 /*
  * UFS Protocol Information Unit related definitions
@@ -108,11 +129,13 @@ enum {
 /* Flag idn for Query Requests*/
 enum flag_idn {
         QUERY_FLAG_IDN_FDEVICEINIT      = 0x01,
+        QUERY_FLAG_IDN_PWR_ON_WPE       = 0x03,
         QUERY_FLAG_IDN_BKOPS_EN         = 0x04,
 };
 
 /* Attribute idn for Query requests */
 enum attr_idn {
+        QUERY_ATTR_IDN_ACTIVE_ICC_LVL   = 0x03,
         QUERY_ATTR_IDN_BKOPS_STATUS     = 0x05,
         QUERY_ATTR_IDN_EE_CONTROL       = 0x0D,
         QUERY_ATTR_IDN_EE_STATUS        = 0x0E,
@@ -129,10 +152,29 @@ enum desc_idn {
         QUERY_DESC_IDN_RFU_1            = 0x6,
         QUERY_DESC_IDN_GEOMETRY         = 0x7,
         QUERY_DESC_IDN_POWER            = 0x8,
-        QUERY_DESC_IDN_RFU_2            = 0x9,
+        QUERY_DESC_IDN_MAX,
+};
+
+enum desc_header_offset {
+        QUERY_DESC_LENGTH_OFFSET        = 0x00,
+        QUERY_DESC_DESC_TYPE_OFFSET     = 0x01,
+};
+
+enum ufs_desc_max_size {
+        QUERY_DESC_DEVICE_MAX_SIZE              = 0x1F,
+        QUERY_DESC_CONFIGURAION_MAX_SIZE        = 0x90,
+        QUERY_DESC_UNIT_MAX_SIZE                = 0x23,
+        QUERY_DESC_INTERCONNECT_MAX_SIZE        = 0x06,
+        /*
+         * Max. 126 UNICODE characters (2 bytes per character) plus 2 bytes
+         * of descriptor header.
+         */
+        QUERY_DESC_STRING_MAX_SIZE              = 0xFE,
+        QUERY_DESC_GEOMETRY_MAZ_SIZE            = 0x44,
+        QUERY_DESC_POWER_MAX_SIZE               = 0x62,
+        QUERY_DESC_RFU_MAX_SIZE                 = 0x00,
 };
 
-#define UNIT_DESC_MAX_SIZE       0x22
 /* Unit descriptor parameters offsets in bytes*/
 enum unit_desc_param {
         UNIT_DESC_PARAM_LEN                     = 0x0,
@@ -153,6 +195,43 @@ enum unit_desc_param {
         UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1      = 0x22,
 };
 
+/*
+ * Logical Unit Write Protect
+ * 00h: LU not write protected
+ * 01h: LU write protected when fPowerOnWPEn =1
+ * 02h: LU permanently write protected when fPermanentWPEn =1
+ */
+enum ufs_lu_wp_type {
+        UFS_LU_NO_WP            = 0x00,
+        UFS_LU_POWER_ON_WP      = 0x01,
+        UFS_LU_PERM_WP          = 0x02,
+};
+
+/* bActiveICCLevel parameter current units */
+enum {
+        UFSHCD_NANO_AMP         = 0,
+        UFSHCD_MICRO_AMP        = 1,
+        UFSHCD_MILI_AMP         = 2,
+        UFSHCD_AMP              = 3,
+};
+
+#define POWER_DESC_MAX_SIZE                     0x62
+#define POWER_DESC_MAX_ACTV_ICC_LVLS            16
+
+/* Attribute  bActiveICCLevel parameter bit masks definitions */
+#define ATTR_ICC_LVL_UNIT_OFFSET        14
+#define ATTR_ICC_LVL_UNIT_MASK          (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
+#define ATTR_ICC_LVL_VALUE_MASK         0x3FF
+
+/* Power descriptor parameters offsets in bytes */
+enum power_desc_param_offset {
+        PWR_DESC_LEN                    = 0x0,
+        PWR_DESC_TYPE                   = 0x1,
+        PWR_DESC_ACTIVE_LVLS_VCC_0      = 0x2,
+        PWR_DESC_ACTIVE_LVLS_VCCQ_0     = 0x22,
+        PWR_DESC_ACTIVE_LVLS_VCCQ2_0    = 0x42,
+};
+
 /* Exception event mask values */
 enum {
         MASK_EE_STATUS          = 0xFFFF,
@@ -160,11 +239,12 @@ enum {
 };
 
 /* Background operation status */
-enum {
+enum bkops_status {
         BKOPS_STATUS_NO_OP               = 0x0,
         BKOPS_STATUS_NON_CRITICAL        = 0x1,
         BKOPS_STATUS_PERF_IMPACT         = 0x2,
         BKOPS_STATUS_CRITICAL            = 0x3,
+        BKOPS_STATUS_MAX                 = BKOPS_STATUS_CRITICAL,
 };
 
 /* UTP QUERY Transaction Specific Fields OpCode */
@@ -225,6 +305,14 @@ enum {
         UPIU_TASK_MANAGEMENT_FUNC_FAILED        = 0x05,
         UPIU_INCORRECT_LOGICAL_UNIT_NO          = 0x09,
 };
+
+/* UFS device power modes */
+enum ufs_dev_pwr_mode {
+        UFS_ACTIVE_PWR_MODE     = 1,
+        UFS_SLEEP_PWR_MODE      = 2,
+        UFS_POWERDOWN_PWR_MODE  = 3,
+};
+
 /**
  * struct utp_upiu_header - UPIU header structure
  * @dword_0: UPIU header DW-0
@@ -362,4 +450,42 @@ struct ufs_query_res {
         struct utp_upiu_query upiu_res;
 };
 
+#define UFS_VREG_VCC_MIN_UV        2700000 /* uV */
+#define UFS_VREG_VCC_MAX_UV        3600000 /* uV */
+#define UFS_VREG_VCC_1P8_MIN_UV    1700000 /* uV */
+#define UFS_VREG_VCC_1P8_MAX_UV    1950000 /* uV */
+#define UFS_VREG_VCCQ_MIN_UV       1100000 /* uV */
+#define UFS_VREG_VCCQ_MAX_UV       1300000 /* uV */
+#define UFS_VREG_VCCQ2_MIN_UV      1650000 /* uV */
+#define UFS_VREG_VCCQ2_MAX_UV      1950000 /* uV */
+
+/*
+ * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
+ * and link is in Hibern8 state.
+ */
+#define UFS_VREG_LPM_LOAD_UA    1000 /* uA */
+
+struct ufs_vreg {
+        struct regulator *reg;
+        const char *name;
+        bool enabled;
+        int min_uV;
+        int max_uV;
+        int min_uA;
+        int max_uA;
+};
+
+struct ufs_vreg_info {
+        struct ufs_vreg *vcc;
+        struct ufs_vreg *vccq;
+        struct ufs_vreg *vccq2;
+        struct ufs_vreg *vdd_hba;
+};
+
+struct ufs_dev_info {
+        bool f_power_on_wp_en;
+        /* Keeps information if any of the LU is power on write protected */
+        bool is_lu_power_on_wp;
+};
+
 #endif /* End of Header */