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path: root/drivers/net/wireless/ath/ath9k/eeprom_def.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/eeprom_def.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index 17f0a6806207..b9540a992616 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -14,6 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <asm/unaligned.h>
17#include "hw.h" 18#include "hw.h"
18#include "ar9002_phy.h" 19#include "ar9002_phy.h"
19 20
@@ -276,11 +277,11 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
276 case EEP_NFTHRESH_2: 277 case EEP_NFTHRESH_2:
277 return pModal[1].noiseFloorThreshCh[0]; 278 return pModal[1].noiseFloorThreshCh[0];
278 case EEP_MAC_LSW: 279 case EEP_MAC_LSW:
279 return pBase->macAddr[0] << 8 | pBase->macAddr[1]; 280 return get_unaligned_be16(pBase->macAddr);
280 case EEP_MAC_MID: 281 case EEP_MAC_MID:
281 return pBase->macAddr[2] << 8 | pBase->macAddr[3]; 282 return get_unaligned_be16(pBase->macAddr + 2);
282 case EEP_MAC_MSW: 283 case EEP_MAC_MSW:
283 return pBase->macAddr[4] << 8 | pBase->macAddr[5]; 284 return get_unaligned_be16(pBase->macAddr + 4);
284 case EEP_REG_0: 285 case EEP_REG_0:
285 return pBase->regDmn[0]; 286 return pBase->regDmn[0];
286 case EEP_REG_1: 287 case EEP_REG_1:
@@ -831,10 +832,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
831 832
832 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; 833 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
833 for (j = 0; j < 32; j++) { 834 for (j = 0; j < 32; j++) {
834 reg32 = ((pdadcValues[4 * j + 0] & 0xFF) << 0) | 835 reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
835 ((pdadcValues[4 * j + 1] & 0xFF) << 8) |
836 ((pdadcValues[4 * j + 2] & 0xFF) << 16)|
837 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
838 REG_WRITE(ah, regOffset, reg32); 836 REG_WRITE(ah, regOffset, reg32);
839 837
840 ath_dbg(common, ATH_DBG_EEPROM, 838 ath_dbg(common, ATH_DBG_EEPROM,