aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/ath/ath5k/ani.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/ani.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/ani.c84
1 files changed, 42 insertions, 42 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c
index 2f0b967a6d8e..603ae15f139b 100644
--- a/drivers/net/wireless/ath/ath5k/ani.c
+++ b/drivers/net/wireless/ath/ath5k/ani.c
@@ -74,7 +74,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
74 static const s8 fr[] = { -78, -80 }; 74 static const s8 fr[] = { -78, -80 };
75#endif 75#endif
76 if (level < 0 || level >= ARRAY_SIZE(sz)) { 76 if (level < 0 || level >= ARRAY_SIZE(sz)) {
77 ATH5K_ERR(ah->ah_sc, "noise immunity level %d out of range", 77 ATH5K_ERR(ah, "noise immunity level %d out of range",
78 level); 78 level);
79 return; 79 return;
80 } 80 }
@@ -88,8 +88,8 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
89 AR5K_PHY_SIG_FIRPWR, fr[level]); 89 AR5K_PHY_SIG_FIRPWR, fr[level]);
90 90
91 ah->ah_sc->ani_state.noise_imm_level = level; 91 ah->ani_state.noise_imm_level = level;
92 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 92 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
93} 93}
94 94
95 95
@@ -105,8 +105,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; 105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
106 106
107 if (level < 0 || level >= ARRAY_SIZE(val) || 107 if (level < 0 || level >= ARRAY_SIZE(val) ||
108 level > ah->ah_sc->ani_state.max_spur_level) { 108 level > ah->ani_state.max_spur_level) {
109 ATH5K_ERR(ah->ah_sc, "spur immunity level %d out of range", 109 ATH5K_ERR(ah, "spur immunity level %d out of range",
110 level); 110 level);
111 return; 111 return;
112 } 112 }
@@ -114,8 +114,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR,
115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]); 115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]);
116 116
117 ah->ah_sc->ani_state.spur_level = level; 117 ah->ani_state.spur_level = level;
118 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 118 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
119} 119}
120 120
121 121
@@ -130,15 +130,15 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
130 static const int val[] = { 0, 4, 8 }; 130 static const int val[] = { 0, 4, 8 };
131 131
132 if (level < 0 || level >= ARRAY_SIZE(val)) { 132 if (level < 0 || level >= ARRAY_SIZE(val)) {
133 ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); 133 ATH5K_ERR(ah, "firstep level %d out of range", level);
134 return; 134 return;
135 } 135 }
136 136
137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
138 AR5K_PHY_SIG_FIRSTEP, val[level]); 138 AR5K_PHY_SIG_FIRSTEP, val[level]);
139 139
140 ah->ah_sc->ani_state.firstep_level = level; 140 ah->ani_state.firstep_level = level;
141 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 141 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
142} 142}
143 143
144 144
@@ -178,8 +178,8 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, 178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN); 179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN);
180 180
181 ah->ah_sc->ani_state.ofdm_weak_sig = on; 181 ah->ani_state.ofdm_weak_sig = on;
182 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 182 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
183 on ? "on" : "off"); 183 on ? "on" : "off");
184} 184}
185 185
@@ -195,8 +195,8 @@ ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on)
195 static const int val[] = { 8, 6 }; 195 static const int val[] = { 8, 6 };
196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, 196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR,
197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); 197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]);
198 ah->ah_sc->ani_state.cck_weak_sig = on; 198 ah->ani_state.cck_weak_sig = on;
199 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 199 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
200 on ? "on" : "off"); 200 on ? "on" : "off");
201} 201}
202 202
@@ -218,7 +218,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
218{ 218{
219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
220 220
221 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", 221 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "raise immunity (%s)",
222 ofdm_trigger ? "ODFM" : "CCK"); 222 ofdm_trigger ? "ODFM" : "CCK");
223 223
224 /* first: raise noise immunity */ 224 /* first: raise noise immunity */
@@ -229,13 +229,13 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
229 229
230 /* only OFDM: raise spur immunity level */ 230 /* only OFDM: raise spur immunity level */
231 if (ofdm_trigger && 231 if (ofdm_trigger &&
232 as->spur_level < ah->ah_sc->ani_state.max_spur_level) { 232 as->spur_level < ah->ani_state.max_spur_level) {
233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1); 233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1);
234 return; 234 return;
235 } 235 }
236 236
237 /* AP mode */ 237 /* AP mode */
238 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 238 if (ah->opmode == NL80211_IFTYPE_AP) {
239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL) 239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1); 240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
241 return; 241 return;
@@ -248,7 +248,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
248 * don't shut out a remote node by raising immunity too high. */ 248 * don't shut out a remote node by raising immunity too high. */
249 249
250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) { 250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) {
251 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 251 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
252 "beacon RSSI high"); 252 "beacon RSSI high");
253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak 253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak
254 * signal detection */ 254 * signal detection */
@@ -265,7 +265,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) { 265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
266 /* beacon RSSI in mid range, we need OFDM weak signal detect, 266 /* beacon RSSI in mid range, we need OFDM weak signal detect,
267 * but can raise firstep level */ 267 * but can raise firstep level */
268 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 268 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
269 "beacon RSSI mid"); 269 "beacon RSSI mid");
270 if (ofdm_trigger && as->ofdm_weak_sig == false) 270 if (ofdm_trigger && as->ofdm_weak_sig == false)
271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
@@ -275,7 +275,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) { 275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) {
276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal 276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal
277 * detect and zero firstep level to maximize CCK sensitivity */ 277 * detect and zero firstep level to maximize CCK sensitivity */
278 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 278 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
279 "beacon RSSI low, 2GHz"); 279 "beacon RSSI low, 2GHz");
280 if (ofdm_trigger && as->ofdm_weak_sig == true) 280 if (ofdm_trigger && as->ofdm_weak_sig == true)
281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
@@ -303,9 +303,9 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
303{ 303{
304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
305 305
306 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); 306 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "lower immunity");
307 307
308 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 308 if (ah->opmode == NL80211_IFTYPE_AP) {
309 /* AP mode */ 309 /* AP mode */
310 if (as->firstep_level > 0) { 310 if (as->firstep_level > 0) {
311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1); 311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1);
@@ -464,7 +464,7 @@ ath5k_ani_period_restart(struct ath5k_hw *ah, struct ath5k_ani_state *as)
464void 464void
465ath5k_ani_calibration(struct ath5k_hw *ah) 465ath5k_ani_calibration(struct ath5k_hw *ah)
466{ 466{
467 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 467 struct ath5k_ani_state *as = &ah->ani_state;
468 int listen, ofdm_high, ofdm_low, cck_high, cck_low; 468 int listen, ofdm_high, ofdm_low, cck_high, cck_low;
469 469
470 /* get listen time since last call and add it to the counter because we 470 /* get listen time since last call and add it to the counter because we
@@ -483,9 +483,9 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000; 483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000;
484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000; 484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000;
485 485
486 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 486 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
487 "listen %d (now %d)", as->listen_time, listen); 487 "listen %d (now %d)", as->listen_time, listen);
488 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 488 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
489 "check high ofdm %d/%d cck %d/%d", 489 "check high ofdm %d/%d cck %d/%d",
490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high); 490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high);
491 491
@@ -498,7 +498,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) { 498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) {
499 /* If more than 5 (TODO: why 5?) periods have passed and we got 499 /* If more than 5 (TODO: why 5?) periods have passed and we got
500 * relatively little errors we can try to lower immunity */ 500 * relatively little errors we can try to lower immunity */
501 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 501 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
502 "check low ofdm %d/%d cck %d/%d", 502 "check low ofdm %d/%d cck %d/%d",
503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low); 503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low);
504 504
@@ -525,7 +525,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
525void 525void
526ath5k_ani_mib_intr(struct ath5k_hw *ah) 526ath5k_ani_mib_intr(struct ath5k_hw *ah)
527{ 527{
528 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 528 struct ath5k_ani_state *as = &ah->ani_state;
529 529
530 /* nothing to do here if HW does not have PHY error counters - they 530 /* nothing to do here if HW does not have PHY error counters - they
531 * can't be the reason for the MIB interrupt then */ 531 * can't be the reason for the MIB interrupt then */
@@ -536,7 +536,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT); 536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT);
537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT); 537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT);
538 538
539 if (ah->ah_sc->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO) 539 if (ah->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO)
540 return; 540 return;
541 541
542 /* If one of the errors triggered, we can get a superfluous second 542 /* If one of the errors triggered, we can get a superfluous second
@@ -547,7 +547,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
547 547
548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH || 548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH ||
549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
550 tasklet_schedule(&ah->ah_sc->ani_tasklet); 550 tasklet_schedule(&ah->ani_tasklet);
551} 551}
552 552
553 553
@@ -561,16 +561,16 @@ void
561ath5k_ani_phy_error_report(struct ath5k_hw *ah, 561ath5k_ani_phy_error_report(struct ath5k_hw *ah,
562 enum ath5k_phy_error_code phyerr) 562 enum ath5k_phy_error_code phyerr)
563{ 563{
564 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 564 struct ath5k_ani_state *as = &ah->ani_state;
565 565
566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) { 566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) {
567 as->ofdm_errors++; 567 as->ofdm_errors++;
568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH) 568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH)
569 tasklet_schedule(&ah->ah_sc->ani_tasklet); 569 tasklet_schedule(&ah->ani_tasklet);
570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) { 570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) {
571 as->cck_errors++; 571 as->cck_errors++;
572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
573 tasklet_schedule(&ah->ah_sc->ani_tasklet); 573 tasklet_schedule(&ah->ani_tasklet);
574 } 574 }
575} 575}
576 576
@@ -631,24 +631,24 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
631 return; 631 return;
632 632
633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) { 633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) {
634 ATH5K_ERR(ah->ah_sc, "ANI mode %d out of range", mode); 634 ATH5K_ERR(ah, "ANI mode %d out of range", mode);
635 return; 635 return;
636 } 636 }
637 637
638 /* clear old state information */ 638 /* clear old state information */
639 memset(&ah->ah_sc->ani_state, 0, sizeof(ah->ah_sc->ani_state)); 639 memset(&ah->ani_state, 0, sizeof(ah->ani_state));
640 640
641 /* older hardware has more spur levels than newer */ 641 /* older hardware has more spur levels than newer */
642 if (ah->ah_mac_srev < AR5K_SREV_AR2414) 642 if (ah->ah_mac_srev < AR5K_SREV_AR2414)
643 ah->ah_sc->ani_state.max_spur_level = 7; 643 ah->ani_state.max_spur_level = 7;
644 else 644 else
645 ah->ah_sc->ani_state.max_spur_level = 2; 645 ah->ani_state.max_spur_level = 2;
646 646
647 /* initial values for our ani parameters */ 647 /* initial values for our ani parameters */
648 if (mode == ATH5K_ANI_MODE_OFF) { 648 if (mode == ATH5K_ANI_MODE_OFF) {
649 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI off\n"); 649 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI off\n");
650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) { 650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) {
651 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 651 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
652 "ANI manual low -> high sensitivity\n"); 652 "ANI manual low -> high sensitivity\n");
653 ath5k_ani_set_noise_immunity_level(ah, 0); 653 ath5k_ani_set_noise_immunity_level(ah, 0);
654 ath5k_ani_set_spur_immunity_level(ah, 0); 654 ath5k_ani_set_spur_immunity_level(ah, 0);
@@ -656,17 +656,17 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
657 ath5k_ani_set_cck_weak_signal_detection(ah, true); 657 ath5k_ani_set_cck_weak_signal_detection(ah, true);
658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) { 658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) {
659 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 659 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
660 "ANI manual high -> low sensitivity\n"); 660 "ANI manual high -> low sensitivity\n");
661 ath5k_ani_set_noise_immunity_level(ah, 661 ath5k_ani_set_noise_immunity_level(ah,
662 ATH5K_ANI_MAX_NOISE_IMM_LVL); 662 ATH5K_ANI_MAX_NOISE_IMM_LVL);
663 ath5k_ani_set_spur_immunity_level(ah, 663 ath5k_ani_set_spur_immunity_level(ah,
664 ah->ah_sc->ani_state.max_spur_level); 664 ah->ani_state.max_spur_level);
665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
667 ath5k_ani_set_cck_weak_signal_detection(ah, false); 667 ath5k_ani_set_cck_weak_signal_detection(ah, false);
668 } else if (mode == ATH5K_ANI_MODE_AUTO) { 668 } else if (mode == ATH5K_ANI_MODE_AUTO) {
669 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI auto\n"); 669 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI auto\n");
670 ath5k_ani_set_noise_immunity_level(ah, 0); 670 ath5k_ani_set_noise_immunity_level(ah, 0);
671 ath5k_ani_set_spur_immunity_level(ah, 0); 671 ath5k_ani_set_spur_immunity_level(ah, 0);
672 ath5k_ani_set_firstep_level(ah, 0); 672 ath5k_ani_set_firstep_level(ah, 0);
@@ -692,7 +692,7 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
692 ~AR5K_RX_FILTER_PHYERR); 692 ~AR5K_RX_FILTER_PHYERR);
693 } 693 }
694 694
695 ah->ah_sc->ani_state.ani_mode = mode; 695 ah->ani_state.ani_mode = mode;
696} 696}
697 697
698 698