diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c | 57 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h | 6 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 54 |
4 files changed, 78 insertions, 41 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c index 9062a8434246..c308429dd9c7 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c +++ b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c | |||
@@ -35,10 +35,10 @@ static inline unsigned int ipv6_clip_hash(struct clip_tbl *d, const u32 *key) | |||
35 | } | 35 | } |
36 | 36 | ||
37 | static unsigned int clip_addr_hash(struct clip_tbl *ctbl, const u32 *addr, | 37 | static unsigned int clip_addr_hash(struct clip_tbl *ctbl, const u32 *addr, |
38 | int addr_len) | 38 | u8 v6) |
39 | { | 39 | { |
40 | return addr_len == 4 ? ipv4_clip_hash(ctbl, addr) : | 40 | return v6 ? ipv6_clip_hash(ctbl, addr) : |
41 | ipv6_clip_hash(ctbl, addr); | 41 | ipv4_clip_hash(ctbl, addr); |
42 | } | 42 | } |
43 | 43 | ||
44 | static int clip6_get_mbox(const struct net_device *dev, | 44 | static int clip6_get_mbox(const struct net_device *dev, |
@@ -78,23 +78,22 @@ int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6) | |||
78 | struct clip_entry *ce, *cte; | 78 | struct clip_entry *ce, *cte; |
79 | u32 *addr = (u32 *)lip; | 79 | u32 *addr = (u32 *)lip; |
80 | int hash; | 80 | int hash; |
81 | int addr_len; | 81 | int ret = -1; |
82 | int ret = 0; | ||
83 | 82 | ||
84 | if (!ctbl) | 83 | if (!ctbl) |
85 | return 0; | 84 | return 0; |
86 | 85 | ||
87 | if (v6) | 86 | hash = clip_addr_hash(ctbl, addr, v6); |
88 | addr_len = 16; | ||
89 | else | ||
90 | addr_len = 4; | ||
91 | |||
92 | hash = clip_addr_hash(ctbl, addr, addr_len); | ||
93 | 87 | ||
94 | read_lock_bh(&ctbl->lock); | 88 | read_lock_bh(&ctbl->lock); |
95 | list_for_each_entry(cte, &ctbl->hash_list[hash], list) { | 89 | list_for_each_entry(cte, &ctbl->hash_list[hash], list) { |
96 | if (addr_len == cte->addr_len && | 90 | if (cte->addr6.sin6_family == AF_INET6 && v6) |
97 | memcmp(lip, cte->addr, cte->addr_len) == 0) { | 91 | ret = memcmp(lip, cte->addr6.sin6_addr.s6_addr, |
92 | sizeof(struct in6_addr)); | ||
93 | else if (cte->addr.sin_family == AF_INET && !v6) | ||
94 | ret = memcmp(lip, (char *)(&cte->addr.sin_addr), | ||
95 | sizeof(struct in_addr)); | ||
96 | if (!ret) { | ||
98 | ce = cte; | 97 | ce = cte; |
99 | read_unlock_bh(&ctbl->lock); | 98 | read_unlock_bh(&ctbl->lock); |
100 | goto found; | 99 | goto found; |
@@ -111,15 +110,20 @@ int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6) | |||
111 | spin_lock_init(&ce->lock); | 110 | spin_lock_init(&ce->lock); |
112 | atomic_set(&ce->refcnt, 0); | 111 | atomic_set(&ce->refcnt, 0); |
113 | atomic_dec(&ctbl->nfree); | 112 | atomic_dec(&ctbl->nfree); |
114 | ce->addr_len = addr_len; | ||
115 | memcpy(ce->addr, lip, addr_len); | ||
116 | list_add_tail(&ce->list, &ctbl->hash_list[hash]); | 113 | list_add_tail(&ce->list, &ctbl->hash_list[hash]); |
117 | if (v6) { | 114 | if (v6) { |
115 | ce->addr6.sin6_family = AF_INET6; | ||
116 | memcpy(ce->addr6.sin6_addr.s6_addr, | ||
117 | lip, sizeof(struct in6_addr)); | ||
118 | ret = clip6_get_mbox(dev, (const struct in6_addr *)lip); | 118 | ret = clip6_get_mbox(dev, (const struct in6_addr *)lip); |
119 | if (ret) { | 119 | if (ret) { |
120 | write_unlock_bh(&ctbl->lock); | 120 | write_unlock_bh(&ctbl->lock); |
121 | return ret; | 121 | return ret; |
122 | } | 122 | } |
123 | } else { | ||
124 | ce->addr.sin_family = AF_INET; | ||
125 | memcpy((char *)(&ce->addr.sin_addr), lip, | ||
126 | sizeof(struct in_addr)); | ||
123 | } | 127 | } |
124 | } else { | 128 | } else { |
125 | write_unlock_bh(&ctbl->lock); | 129 | write_unlock_bh(&ctbl->lock); |
@@ -140,19 +144,19 @@ void cxgb4_clip_release(const struct net_device *dev, const u32 *lip, u8 v6) | |||
140 | struct clip_entry *ce, *cte; | 144 | struct clip_entry *ce, *cte; |
141 | u32 *addr = (u32 *)lip; | 145 | u32 *addr = (u32 *)lip; |
142 | int hash; | 146 | int hash; |
143 | int addr_len; | 147 | int ret = -1; |
144 | |||
145 | if (v6) | ||
146 | addr_len = 16; | ||
147 | else | ||
148 | addr_len = 4; | ||
149 | 148 | ||
150 | hash = clip_addr_hash(ctbl, addr, addr_len); | 149 | hash = clip_addr_hash(ctbl, addr, v6); |
151 | 150 | ||
152 | read_lock_bh(&ctbl->lock); | 151 | read_lock_bh(&ctbl->lock); |
153 | list_for_each_entry(cte, &ctbl->hash_list[hash], list) { | 152 | list_for_each_entry(cte, &ctbl->hash_list[hash], list) { |
154 | if (addr_len == cte->addr_len && | 153 | if (cte->addr6.sin6_family == AF_INET6 && v6) |
155 | memcmp(lip, cte->addr, cte->addr_len) == 0) { | 154 | ret = memcmp(lip, cte->addr6.sin6_addr.s6_addr, |
155 | sizeof(struct in6_addr)); | ||
156 | else if (cte->addr.sin_family == AF_INET && !v6) | ||
157 | ret = memcmp(lip, (char *)(&cte->addr.sin_addr), | ||
158 | sizeof(struct in_addr)); | ||
159 | if (!ret) { | ||
156 | ce = cte; | 160 | ce = cte; |
157 | read_unlock_bh(&ctbl->lock); | 161 | read_unlock_bh(&ctbl->lock); |
158 | goto found; | 162 | goto found; |
@@ -249,10 +253,7 @@ int clip_tbl_show(struct seq_file *seq, void *v) | |||
249 | for (i = 0 ; i < ctbl->clipt_size; ++i) { | 253 | for (i = 0 ; i < ctbl->clipt_size; ++i) { |
250 | list_for_each_entry(ce, &ctbl->hash_list[i], list) { | 254 | list_for_each_entry(ce, &ctbl->hash_list[i], list) { |
251 | ip[0] = '\0'; | 255 | ip[0] = '\0'; |
252 | if (ce->addr_len == 16) | 256 | sprintf(ip, "%pISc", &ce->addr); |
253 | sprintf(ip, "%pI6c", ce->addr); | ||
254 | else | ||
255 | sprintf(ip, "%pI4c", ce->addr); | ||
256 | seq_printf(seq, "%-25s %u\n", ip, | 257 | seq_printf(seq, "%-25s %u\n", ip, |
257 | atomic_read(&ce->refcnt)); | 258 | atomic_read(&ce->refcnt)); |
258 | } | 259 | } |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h index 2eaba0161cf8..35eb43c6bcbb 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h +++ b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h | |||
@@ -14,8 +14,10 @@ struct clip_entry { | |||
14 | spinlock_t lock; /* Hold while modifying clip reference */ | 14 | spinlock_t lock; /* Hold while modifying clip reference */ |
15 | atomic_t refcnt; | 15 | atomic_t refcnt; |
16 | struct list_head list; | 16 | struct list_head list; |
17 | u32 addr[4]; | 17 | union { |
18 | int addr_len; | 18 | struct sockaddr_in addr; |
19 | struct sockaddr_in6 addr6; | ||
20 | }; | ||
19 | }; | 21 | }; |
20 | 22 | ||
21 | struct clip_tbl { | 23 | struct clip_tbl { |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index d6cda17efe6e..97842d03675b 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -1103,7 +1103,7 @@ int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); | |||
1103 | #define T4_MEMORY_WRITE 0 | 1103 | #define T4_MEMORY_WRITE 0 |
1104 | #define T4_MEMORY_READ 1 | 1104 | #define T4_MEMORY_READ 1 |
1105 | int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len, | 1105 | int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len, |
1106 | __be32 *buf, int dir); | 1106 | void *buf, int dir); |
1107 | static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr, | 1107 | static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr, |
1108 | u32 len, __be32 *buf) | 1108 | u32 len, __be32 *buf) |
1109 | { | 1109 | { |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 4d643b65265e..853c38997c82 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -449,7 +449,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) | |||
449 | * @mtype: memory type: MEM_EDC0, MEM_EDC1 or MEM_MC | 449 | * @mtype: memory type: MEM_EDC0, MEM_EDC1 or MEM_MC |
450 | * @addr: address within indicated memory type | 450 | * @addr: address within indicated memory type |
451 | * @len: amount of memory to transfer | 451 | * @len: amount of memory to transfer |
452 | * @buf: host memory buffer | 452 | * @hbuf: host memory buffer |
453 | * @dir: direction of transfer T4_MEMORY_READ (1) or T4_MEMORY_WRITE (0) | 453 | * @dir: direction of transfer T4_MEMORY_READ (1) or T4_MEMORY_WRITE (0) |
454 | * | 454 | * |
455 | * Reads/writes an [almost] arbitrary memory region in the firmware: the | 455 | * Reads/writes an [almost] arbitrary memory region in the firmware: the |
@@ -460,15 +460,17 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) | |||
460 | * caller's responsibility to perform appropriate byte order conversions. | 460 | * caller's responsibility to perform appropriate byte order conversions. |
461 | */ | 461 | */ |
462 | int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, | 462 | int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, |
463 | u32 len, __be32 *buf, int dir) | 463 | u32 len, void *hbuf, int dir) |
464 | { | 464 | { |
465 | u32 pos, offset, resid, memoffset; | 465 | u32 pos, offset, resid, memoffset; |
466 | u32 edc_size, mc_size, win_pf, mem_reg, mem_aperture, mem_base; | 466 | u32 edc_size, mc_size, win_pf, mem_reg, mem_aperture, mem_base; |
467 | u32 *buf; | ||
467 | 468 | ||
468 | /* Argument sanity checks ... | 469 | /* Argument sanity checks ... |
469 | */ | 470 | */ |
470 | if (addr & 0x3) | 471 | if (addr & 0x3 || (uintptr_t)hbuf & 0x3) |
471 | return -EINVAL; | 472 | return -EINVAL; |
473 | buf = (u32 *)hbuf; | ||
472 | 474 | ||
473 | /* It's convenient to be able to handle lengths which aren't a | 475 | /* It's convenient to be able to handle lengths which aren't a |
474 | * multiple of 32-bits because we often end up transferring files to | 476 | * multiple of 32-bits because we often end up transferring files to |
@@ -532,14 +534,45 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, | |||
532 | 534 | ||
533 | /* Transfer data to/from the adapter as long as there's an integral | 535 | /* Transfer data to/from the adapter as long as there's an integral |
534 | * number of 32-bit transfers to complete. | 536 | * number of 32-bit transfers to complete. |
537 | * | ||
538 | * A note on Endianness issues: | ||
539 | * | ||
540 | * The "register" reads and writes below from/to the PCI-E Memory | ||
541 | * Window invoke the standard adapter Big-Endian to PCI-E Link | ||
542 | * Little-Endian "swizzel." As a result, if we have the following | ||
543 | * data in adapter memory: | ||
544 | * | ||
545 | * Memory: ... | b0 | b1 | b2 | b3 | ... | ||
546 | * Address: i+0 i+1 i+2 i+3 | ||
547 | * | ||
548 | * Then a read of the adapter memory via the PCI-E Memory Window | ||
549 | * will yield: | ||
550 | * | ||
551 | * x = readl(i) | ||
552 | * 31 0 | ||
553 | * [ b3 | b2 | b1 | b0 ] | ||
554 | * | ||
555 | * If this value is stored into local memory on a Little-Endian system | ||
556 | * it will show up correctly in local memory as: | ||
557 | * | ||
558 | * ( ..., b0, b1, b2, b3, ... ) | ||
559 | * | ||
560 | * But on a Big-Endian system, the store will show up in memory | ||
561 | * incorrectly swizzled as: | ||
562 | * | ||
563 | * ( ..., b3, b2, b1, b0, ... ) | ||
564 | * | ||
565 | * So we need to account for this in the reads and writes to the | ||
566 | * PCI-E Memory Window below by undoing the register read/write | ||
567 | * swizzels. | ||
535 | */ | 568 | */ |
536 | while (len > 0) { | 569 | while (len > 0) { |
537 | if (dir == T4_MEMORY_READ) | 570 | if (dir == T4_MEMORY_READ) |
538 | *buf++ = (__force __be32) t4_read_reg(adap, | 571 | *buf++ = le32_to_cpu((__force __le32)t4_read_reg(adap, |
539 | mem_base + offset); | 572 | mem_base + offset)); |
540 | else | 573 | else |
541 | t4_write_reg(adap, mem_base + offset, | 574 | t4_write_reg(adap, mem_base + offset, |
542 | (__force u32) *buf++); | 575 | (__force u32)cpu_to_le32(*buf++)); |
543 | offset += sizeof(__be32); | 576 | offset += sizeof(__be32); |
544 | len -= sizeof(__be32); | 577 | len -= sizeof(__be32); |
545 | 578 | ||
@@ -568,15 +601,16 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, | |||
568 | */ | 601 | */ |
569 | if (resid) { | 602 | if (resid) { |
570 | union { | 603 | union { |
571 | __be32 word; | 604 | u32 word; |
572 | char byte[4]; | 605 | char byte[4]; |
573 | } last; | 606 | } last; |
574 | unsigned char *bp; | 607 | unsigned char *bp; |
575 | int i; | 608 | int i; |
576 | 609 | ||
577 | if (dir == T4_MEMORY_READ) { | 610 | if (dir == T4_MEMORY_READ) { |
578 | last.word = (__force __be32) t4_read_reg(adap, | 611 | last.word = le32_to_cpu( |
579 | mem_base + offset); | 612 | (__force __le32)t4_read_reg(adap, |
613 | mem_base + offset)); | ||
580 | for (bp = (unsigned char *)buf, i = resid; i < 4; i++) | 614 | for (bp = (unsigned char *)buf, i = resid; i < 4; i++) |
581 | bp[i] = last.byte[i]; | 615 | bp[i] = last.byte[i]; |
582 | } else { | 616 | } else { |
@@ -584,7 +618,7 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, | |||
584 | for (i = resid; i < 4; i++) | 618 | for (i = resid; i < 4; i++) |
585 | last.byte[i] = 0; | 619 | last.byte[i] = 0; |
586 | t4_write_reg(adap, mem_base + offset, | 620 | t4_write_reg(adap, mem_base + offset, |
587 | (__force u32) last.word); | 621 | (__force u32)cpu_to_le32(last.word)); |
588 | } | 622 | } |
589 | } | 623 | } |
590 | 624 | ||