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path: root/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
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Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c')
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c56
1 files changed, 28 insertions, 28 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 53ad8d3d9e4c..04e675b8218a 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -834,11 +834,11 @@ static void disable_msi(struct adapter *adapter)
834static irqreturn_t t4_nondata_intr(int irq, void *cookie) 834static irqreturn_t t4_nondata_intr(int irq, void *cookie)
835{ 835{
836 struct adapter *adap = cookie; 836 struct adapter *adap = cookie;
837 u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A));
837 838
838 u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE)); 839 if (v & PFSW_F) {
839 if (v & PFSW) {
840 adap->swintr = 1; 840 adap->swintr = 1;
841 t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE), v); 841 t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE_A), v);
842 } 842 }
843 t4_slow_intr_handler(adap); 843 t4_slow_intr_handler(adap);
844 return IRQ_HANDLED; 844 return IRQ_HANDLED;
@@ -3654,10 +3654,10 @@ void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
3654{ 3654{
3655 struct adapter *adap = netdev2adap(dev); 3655 struct adapter *adap = netdev2adap(dev);
3656 3656
3657 t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK, tag_mask); 3657 t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK_A, tag_mask);
3658 t4_write_reg(adap, ULP_RX_ISCSI_PSZ, HPZ0(pgsz_order[0]) | 3658 t4_write_reg(adap, ULP_RX_ISCSI_PSZ_A, HPZ0_V(pgsz_order[0]) |
3659 HPZ1(pgsz_order[1]) | HPZ2(pgsz_order[2]) | 3659 HPZ1_V(pgsz_order[1]) | HPZ2_V(pgsz_order[2]) |
3660 HPZ3(pgsz_order[3])); 3660 HPZ3_V(pgsz_order[3]));
3661} 3661}
3662EXPORT_SYMBOL(cxgb4_iscsi_init); 3662EXPORT_SYMBOL(cxgb4_iscsi_init);
3663 3663
@@ -4580,13 +4580,13 @@ int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
4580 f->fs.val.lip[i] = val[i]; 4580 f->fs.val.lip[i] = val[i];
4581 f->fs.mask.lip[i] = ~0; 4581 f->fs.mask.lip[i] = ~0;
4582 } 4582 }
4583 if (adap->params.tp.vlan_pri_map & F_PORT) { 4583 if (adap->params.tp.vlan_pri_map & PORT_F) {
4584 f->fs.val.iport = port; 4584 f->fs.val.iport = port;
4585 f->fs.mask.iport = mask; 4585 f->fs.mask.iport = mask;
4586 } 4586 }
4587 } 4587 }
4588 4588
4589 if (adap->params.tp.vlan_pri_map & F_PROTOCOL) { 4589 if (adap->params.tp.vlan_pri_map & PROTOCOL_F) {
4590 f->fs.val.proto = IPPROTO_TCP; 4590 f->fs.val.proto = IPPROTO_TCP;
4591 f->fs.mask.proto = ~0; 4591 f->fs.mask.proto = ~0;
4592 } 4592 }
@@ -4950,37 +4950,37 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c)
4950 4950
4951 /* tweak some settings */ 4951 /* tweak some settings */
4952 t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849); 4952 t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849);
4953 t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12)); 4953 t4_write_reg(adap, ULP_RX_TDDP_PSZ_A, HPZ0_V(PAGE_SHIFT - 12));
4954 t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A); 4954 t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A);
4955 v = t4_read_reg(adap, TP_PIO_DATA_A); 4955 v = t4_read_reg(adap, TP_PIO_DATA_A);
4956 t4_write_reg(adap, TP_PIO_DATA_A, v & ~CSUM_HAS_PSEUDO_HDR_F); 4956 t4_write_reg(adap, TP_PIO_DATA_A, v & ~CSUM_HAS_PSEUDO_HDR_F);
4957 4957
4958 /* first 4 Tx modulation queues point to consecutive Tx channels */ 4958 /* first 4 Tx modulation queues point to consecutive Tx channels */
4959 adap->params.tp.tx_modq_map = 0xE4; 4959 adap->params.tp.tx_modq_map = 0xE4;
4960 t4_write_reg(adap, A_TP_TX_MOD_QUEUE_REQ_MAP, 4960 t4_write_reg(adap, TP_TX_MOD_QUEUE_REQ_MAP_A,
4961 V_TX_MOD_QUEUE_REQ_MAP(adap->params.tp.tx_modq_map)); 4961 TX_MOD_QUEUE_REQ_MAP_V(adap->params.tp.tx_modq_map));
4962 4962
4963 /* associate each Tx modulation queue with consecutive Tx channels */ 4963 /* associate each Tx modulation queue with consecutive Tx channels */
4964 v = 0x84218421; 4964 v = 0x84218421;
4965 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, 4965 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
4966 &v, 1, A_TP_TX_SCHED_HDR); 4966 &v, 1, TP_TX_SCHED_HDR_A);
4967 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, 4967 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
4968 &v, 1, A_TP_TX_SCHED_FIFO); 4968 &v, 1, TP_TX_SCHED_FIFO_A);
4969 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, 4969 t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
4970 &v, 1, A_TP_TX_SCHED_PCMD); 4970 &v, 1, TP_TX_SCHED_PCMD_A);
4971 4971
4972#define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */ 4972#define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */
4973 if (is_offload(adap)) { 4973 if (is_offload(adap)) {
4974 t4_write_reg(adap, A_TP_TX_MOD_QUEUE_WEIGHT0, 4974 t4_write_reg(adap, TP_TX_MOD_QUEUE_WEIGHT0_A,
4975 V_TX_MODQ_WEIGHT0(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4975 TX_MODQ_WEIGHT0_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4976 V_TX_MODQ_WEIGHT1(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4976 TX_MODQ_WEIGHT1_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4977 V_TX_MODQ_WEIGHT2(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4977 TX_MODQ_WEIGHT2_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4978 V_TX_MODQ_WEIGHT3(T4_TX_MODQ_10G_WEIGHT_DEFAULT)); 4978 TX_MODQ_WEIGHT3_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT));
4979 t4_write_reg(adap, A_TP_TX_MOD_CHANNEL_WEIGHT, 4979 t4_write_reg(adap, TP_TX_MOD_CHANNEL_WEIGHT_A,
4980 V_TX_MODQ_WEIGHT0(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4980 TX_MODQ_WEIGHT0_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4981 V_TX_MODQ_WEIGHT1(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4981 TX_MODQ_WEIGHT1_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4982 V_TX_MODQ_WEIGHT2(T4_TX_MODQ_10G_WEIGHT_DEFAULT) | 4982 TX_MODQ_WEIGHT2_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT) |
4983 V_TX_MODQ_WEIGHT3(T4_TX_MODQ_10G_WEIGHT_DEFAULT)); 4983 TX_MODQ_WEIGHT3_V(T4_TX_MODQ_10G_WEIGHT_DEFAULT));
4984 } 4984 }
4985 4985
4986 /* get basic stuff going */ 4986 /* get basic stuff going */
@@ -5059,7 +5059,7 @@ static int adap_init0_config(struct adapter *adapter, int reset)
5059 */ 5059 */
5060 if (reset) { 5060 if (reset) {
5061 ret = t4_fw_reset(adapter, adapter->mbox, 5061 ret = t4_fw_reset(adapter, adapter->mbox,
5062 PIORSTMODE | PIORST); 5062 PIORSTMODE_F | PIORST_F);
5063 if (ret < 0) 5063 if (ret < 0)
5064 goto bye; 5064 goto bye;
5065 } 5065 }
@@ -5264,7 +5264,7 @@ static int adap_init0_no_config(struct adapter *adapter, int reset)
5264 */ 5264 */
5265 if (reset) { 5265 if (reset) {
5266 ret = t4_fw_reset(adapter, adapter->mbox, 5266 ret = t4_fw_reset(adapter, adapter->mbox,
5267 PIORSTMODE | PIORST); 5267 PIORSTMODE_F | PIORST_F);
5268 if (ret < 0) 5268 if (ret < 0)
5269 goto bye; 5269 goto bye;
5270 } 5270 }
@@ -6413,7 +6413,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6413 goto out_unmap_bar0; 6413 goto out_unmap_bar0;
6414 6414
6415 /* We control everything through one PF */ 6415 /* We control everything through one PF */
6416 func = SOURCEPF_GET(readl(regs + PL_WHOAMI)); 6416 func = SOURCEPF_G(readl(regs + PL_WHOAMI_A));
6417 if (func != ent->driver_data) { 6417 if (func != ent->driver_data) {
6418 iounmap(regs); 6418 iounmap(regs);
6419 pci_disable_device(pdev); 6419 pci_disable_device(pdev);