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-rw-r--r--drivers/mfd/Kconfig58
-rw-r--r--drivers/mfd/Makefile6
-rw-r--r--drivers/mfd/ab8500-debugfs.c196
-rw-r--r--drivers/mfd/arizona-core.c25
-rw-r--r--drivers/mfd/arizona-i2c.c2
-rw-r--r--drivers/mfd/arizona-irq.c1
-rw-r--r--drivers/mfd/arizona-spi.c2
-rw-r--r--drivers/mfd/axp20x.c30
-rw-r--r--drivers/mfd/da9052-irq.c2
-rw-r--r--drivers/mfd/da9052-spi.c6
-rw-r--r--drivers/mfd/da9150-core.c2
-rw-r--r--drivers/mfd/dln2.c2
-rw-r--r--drivers/mfd/hi6421-pmic-core.c2
-rw-r--r--drivers/mfd/intel_quark_i2c_gpio.c282
-rw-r--r--drivers/mfd/intel_soc_pmic_core.c14
-rw-r--r--drivers/mfd/kempld-core.c11
-rw-r--r--drivers/mfd/lpc_ich.c174
-rw-r--r--drivers/mfd/max77693.c4
-rw-r--r--drivers/mfd/max77843.c243
-rw-r--r--drivers/mfd/mc13xxx-core.c6
-rw-r--r--drivers/mfd/menelaus.c29
-rw-r--r--drivers/mfd/mfd-core.c2
-rw-r--r--drivers/mfd/mt6397-core.c227
-rw-r--r--drivers/mfd/qcom-spmi-pmic.c103
-rw-r--r--drivers/mfd/qcom_rpm.c41
-rw-r--r--drivers/mfd/rk808.c3
-rw-r--r--drivers/mfd/rtl8411.c11
-rw-r--r--drivers/mfd/rts5209.c4
-rw-r--r--drivers/mfd/rts5227.c12
-rw-r--r--drivers/mfd/rts5229.c4
-rw-r--r--drivers/mfd/rts5249.c343
-rw-r--r--drivers/mfd/rtsx_gops.c37
-rw-r--r--drivers/mfd/rtsx_pcr.c109
-rw-r--r--drivers/mfd/rtsx_pcr.h8
-rw-r--r--drivers/mfd/sec-core.c7
-rw-r--r--drivers/mfd/sec-irq.c14
-rw-r--r--drivers/mfd/sky81452.c108
-rw-r--r--drivers/mfd/tc3589x.c9
-rw-r--r--drivers/mfd/ti_am335x_tscadc.c13
-rw-r--r--drivers/mfd/tps65010.c4
-rw-r--r--drivers/mfd/twl4030-power.c2
-rw-r--r--drivers/mfd/twl6040.c1
-rw-r--r--drivers/mfd/vexpress-sysreg.c71
-rw-r--r--drivers/mfd/wm5102-tables.c3
44 files changed, 1778 insertions, 455 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 38356e39adba..d5ad04dad081 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -283,6 +283,18 @@ config HTC_I2CPLD
283 This device provides input and output GPIOs through an I2C 283 This device provides input and output GPIOs through an I2C
284 interface to one or more sub-chips. 284 interface to one or more sub-chips.
285 285
286config MFD_INTEL_QUARK_I2C_GPIO
287 tristate "Intel Quark MFD I2C GPIO"
288 depends on PCI
289 depends on X86
290 depends on COMMON_CLK
291 select MFD_CORE
292 help
293 This MFD provides support for I2C and GPIO that exist only
294 in a single PCI device. It splits the 2 IO devices to
295 their respective IO driver.
296 The GPIO exports a total amount of 8 interrupt-capable GPIOs.
297
286config LPC_ICH 298config LPC_ICH
287 tristate "Intel ICH LPC" 299 tristate "Intel ICH LPC"
288 depends on PCI 300 depends on PCI
@@ -364,6 +376,7 @@ config MFD_KEMPLD
364 * COMe-bIP# 376 * COMe-bIP#
365 * COMe-bPC2 (ETXexpress-PC) 377 * COMe-bPC2 (ETXexpress-PC)
366 * COMe-bSC# (ETXexpress-SC T#) 378 * COMe-bSC# (ETXexpress-SC T#)
379 * COMe-cBL6
367 * COMe-cBT6 380 * COMe-cBT6
368 * COMe-cCT6 381 * COMe-cCT6
369 * COMe-cDC2 (microETXexpress-DC) 382 * COMe-cDC2 (microETXexpress-DC)
@@ -455,6 +468,20 @@ config MFD_MAX77693
455 additional drivers must be enabled in order to use the functionality 468 additional drivers must be enabled in order to use the functionality
456 of the device. 469 of the device.
457 470
471config MFD_MAX77843
472 bool "Maxim Semiconductor MAX77843 PMIC Support"
473 depends on I2C=y
474 select MFD_CORE
475 select REGMAP_I2C
476 select REGMAP_IRQ
477 help
478 Say yes here to add support for Maxim Semiconductor MAX77843.
479 This is companion Power Management IC with LEDs, Haptic, Charger,
480 Fuel Gauge, MUIC(Micro USB Interface Controller) controls on chip.
481 This driver provides common support for accessing the device;
482 additional drivers must be enabled in order to use the functionality
483 of the device.
484
458config MFD_MAX8907 485config MFD_MAX8907
459 tristate "Maxim Semiconductor MAX8907 PMIC Support" 486 tristate "Maxim Semiconductor MAX8907 PMIC Support"
460 select MFD_CORE 487 select MFD_CORE
@@ -502,6 +529,16 @@ config MFD_MAX8998
502 additional drivers must be enabled in order to use the functionality 529 additional drivers must be enabled in order to use the functionality
503 of the device. 530 of the device.
504 531
532config MFD_MT6397
533 tristate "MediaTek MT6397 PMIC Support"
534 select MFD_CORE
535 select IRQ_DOMAIN
536 help
537 Say yes here to add support for MediaTek MT6397 PMIC. This is
538 a Power Management IC. This driver provides common support for
539 accessing the device; additional drivers must be enabled in order
540 to use the functionality of the device.
541
505config MFD_MENF21BMC 542config MFD_MENF21BMC
506 tristate "MEN 14F021P00 Board Management Controller Support" 543 tristate "MEN 14F021P00 Board Management Controller Support"
507 depends on I2C 544 depends on I2C
@@ -655,6 +692,7 @@ config MFD_RT5033
655 depends on I2C=y 692 depends on I2C=y
656 select MFD_CORE 693 select MFD_CORE
657 select REGMAP_I2C 694 select REGMAP_I2C
695 select REGMAP_IRQ
658 help 696 help
659 This driver provides for the Richtek RT5033 Power Management IC, 697 This driver provides for the Richtek RT5033 Power Management IC,
660 which includes the I2C driver and the Core APIs. This driver provides 698 which includes the I2C driver and the Core APIs. This driver provides
@@ -753,6 +791,18 @@ config MFD_SM501_GPIO
753 lines on the SM501. The platform data is used to supply the 791 lines on the SM501. The platform data is used to supply the
754 base number for the first GPIO line to register. 792 base number for the first GPIO line to register.
755 793
794config MFD_SKY81452
795 tristate "Skyworks Solutions SKY81452"
796 select MFD_CORE
797 select REGMAP_I2C
798 depends on I2C
799 help
800 This is the core driver for the Skyworks SKY81452 backlight and
801 voltage regulator device.
802
803 This driver can also be built as a module. If so, the module
804 will be called sky81452.
805
756config MFD_SMSC 806config MFD_SMSC
757 bool "SMSC ECE1099 series chips" 807 bool "SMSC ECE1099 series chips"
758 depends on I2C=y 808 depends on I2C=y
@@ -1210,6 +1260,7 @@ config MFD_TIMBERDALE
1210config MFD_TC3589X 1260config MFD_TC3589X
1211 bool "Toshiba TC35892 and variants" 1261 bool "Toshiba TC35892 and variants"
1212 depends on I2C=y 1262 depends on I2C=y
1263 depends on OF
1213 select MFD_CORE 1264 select MFD_CORE
1214 help 1265 help
1215 Support for the Toshiba TC35892 and variants I/O Expander. 1266 Support for the Toshiba TC35892 and variants I/O Expander.
@@ -1289,10 +1340,11 @@ config MFD_WM5102
1289 Support for Wolfson Microelectronics WM5102 low power audio SoC 1340 Support for Wolfson Microelectronics WM5102 low power audio SoC
1290 1341
1291config MFD_WM5110 1342config MFD_WM5110
1292 bool "Wolfson Microelectronics WM5110" 1343 bool "Wolfson Microelectronics WM5110 and WM8280/WM8281"
1293 depends on MFD_ARIZONA 1344 depends on MFD_ARIZONA
1294 help 1345 help
1295 Support for Wolfson Microelectronics WM5110 low power audio SoC 1346 Support for Wolfson Microelectronics WM5110 and WM8280/WM8281
1347 low power audio SoC
1296 1348
1297config MFD_WM8997 1349config MFD_WM8997
1298 bool "Wolfson Microelectronics WM8997" 1350 bool "Wolfson Microelectronics WM8997"
@@ -1362,7 +1414,7 @@ config MFD_WM8994
1362 depends on I2C 1414 depends on I2C
1363 help 1415 help
1364 The WM8994 is a highly integrated hi-fi CODEC designed for 1416 The WM8994 is a highly integrated hi-fi CODEC designed for
1365 smartphone applicatiosn. As well as audio functionality it 1417 smartphone applications. As well as audio functionality it
1366 has on board GPIO and regulator functionality which is 1418 has on board GPIO and regulator functionality which is
1367 supported via the relevant subsystems. This driver provides 1419 supported via the relevant subsystems. This driver provides
1368 core support for the WM8994, in order to use the actual 1420 core support for the WM8994, in order to use the actual
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 19f3d744e3bd..0e5cfeba107c 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o
13obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o 13obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
14obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o 14obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
15 15
16rtsx_pci-objs := rtsx_pcr.o rtsx_gops.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o 16rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o rts5249.o
17obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o 17obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o
18obj-$(CONFIG_MFD_RTSX_USB) += rtsx_usb.o 18obj-$(CONFIG_MFD_RTSX_USB) += rtsx_usb.o
19 19
@@ -117,6 +117,7 @@ obj-$(CONFIG_MFD_DA9150) += da9150-core.o
117obj-$(CONFIG_MFD_MAX14577) += max14577.o 117obj-$(CONFIG_MFD_MAX14577) += max14577.o
118obj-$(CONFIG_MFD_MAX77686) += max77686.o 118obj-$(CONFIG_MFD_MAX77686) += max77686.o
119obj-$(CONFIG_MFD_MAX77693) += max77693.o 119obj-$(CONFIG_MFD_MAX77693) += max77693.o
120obj-$(CONFIG_MFD_MAX77843) += max77843.o
120obj-$(CONFIG_MFD_MAX8907) += max8907.o 121obj-$(CONFIG_MFD_MAX8907) += max8907.o
121max8925-objs := max8925-core.o max8925-i2c.o 122max8925-objs := max8925-core.o max8925-i2c.o
122obj-$(CONFIG_MFD_MAX8925) += max8925.o 123obj-$(CONFIG_MFD_MAX8925) += max8925.o
@@ -138,6 +139,7 @@ obj-$(CONFIG_AB8500_CORE) += ab8500-core.o ab8500-sysctrl.o
138obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o 139obj-$(CONFIG_MFD_TIMBERDALE) += timberdale.o
139obj-$(CONFIG_PMIC_ADP5520) += adp5520.o 140obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
140obj-$(CONFIG_MFD_KEMPLD) += kempld-core.o 141obj-$(CONFIG_MFD_KEMPLD) += kempld-core.o
142obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o
141obj-$(CONFIG_LPC_SCH) += lpc_sch.o 143obj-$(CONFIG_LPC_SCH) += lpc_sch.o
142obj-$(CONFIG_LPC_ICH) += lpc_ich.o 144obj-$(CONFIG_LPC_ICH) += lpc_ich.o
143obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o 145obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o
@@ -178,6 +180,8 @@ obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o
178obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o 180obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o
179obj-$(CONFIG_MFD_DLN2) += dln2.o 181obj-$(CONFIG_MFD_DLN2) += dln2.o
180obj-$(CONFIG_MFD_RT5033) += rt5033.o 182obj-$(CONFIG_MFD_RT5033) += rt5033.o
183obj-$(CONFIG_MFD_SKY81452) += sky81452.o
181 184
182intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o 185intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o
183obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o 186obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
187obj-$(CONFIG_MFD_MT6397) += mt6397-core.o
diff --git a/drivers/mfd/ab8500-debugfs.c b/drivers/mfd/ab8500-debugfs.c
index 9a8e185f11df..cdd6f3d63314 100644
--- a/drivers/mfd/ab8500-debugfs.c
+++ b/drivers/mfd/ab8500-debugfs.c
@@ -1283,7 +1283,7 @@ static irqreturn_t ab8500_debug_handler(int irq, void *data)
1283 1283
1284/* Prints to seq_file or log_buf */ 1284/* Prints to seq_file or log_buf */
1285static int ab8500_registers_print(struct device *dev, u32 bank, 1285static int ab8500_registers_print(struct device *dev, u32 bank,
1286 struct seq_file *s) 1286 struct seq_file *s)
1287{ 1287{
1288 unsigned int i; 1288 unsigned int i;
1289 1289
@@ -1304,20 +1304,19 @@ static int ab8500_registers_print(struct device *dev, u32 bank,
1304 } 1304 }
1305 1305
1306 if (s) { 1306 if (s) {
1307 err = seq_printf(s, 1307 seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n",
1308 " [0x%02X/0x%02X]: 0x%02X\n", 1308 bank, reg, value);
1309 bank, reg, value); 1309 /* Error is not returned here since
1310 if (err < 0) { 1310 * the output is wanted in any case */
1311 /* Error is not returned here since 1311 if (seq_has_overflowed(s))
1312 * the output is wanted in any case */
1313 return 0; 1312 return 0;
1314 }
1315 } else { 1313 } else {
1316 dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n", 1314 dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n",
1317 bank, reg, value); 1315 bank, reg, value);
1318 } 1316 }
1319 } 1317 }
1320 } 1318 }
1319
1321 return 0; 1320 return 0;
1322} 1321}
1323 1322
@@ -1330,8 +1329,7 @@ static int ab8500_print_bank_registers(struct seq_file *s, void *p)
1330 1329
1331 seq_printf(s, " bank 0x%02X:\n", bank); 1330 seq_printf(s, " bank 0x%02X:\n", bank);
1332 1331
1333 ab8500_registers_print(dev, bank, s); 1332 return ab8500_registers_print(dev, bank, s);
1334 return 0;
1335} 1333}
1336 1334
1337static int ab8500_registers_open(struct inode *inode, struct file *file) 1335static int ab8500_registers_open(struct inode *inode, struct file *file)
@@ -1355,9 +1353,12 @@ static int ab8500_print_all_banks(struct seq_file *s, void *p)
1355 seq_puts(s, AB8500_NAME_STRING " register values:\n"); 1353 seq_puts(s, AB8500_NAME_STRING " register values:\n");
1356 1354
1357 for (i = 0; i < AB8500_NUM_BANKS; i++) { 1355 for (i = 0; i < AB8500_NUM_BANKS; i++) {
1358 seq_printf(s, " bank 0x%02X:\n", i); 1356 int err;
1359 1357
1360 ab8500_registers_print(dev, i, s); 1358 seq_printf(s, " bank 0x%02X:\n", i);
1359 err = ab8500_registers_print(dev, i, s);
1360 if (err)
1361 return err;
1361 } 1362 }
1362 return 0; 1363 return 0;
1363} 1364}
@@ -1458,7 +1459,8 @@ static const struct file_operations ab8500_all_banks_fops = {
1458 1459
1459static int ab8500_bank_print(struct seq_file *s, void *p) 1460static int ab8500_bank_print(struct seq_file *s, void *p)
1460{ 1461{
1461 return seq_printf(s, "0x%02X\n", debug_bank); 1462 seq_printf(s, "0x%02X\n", debug_bank);
1463 return 0;
1462} 1464}
1463 1465
1464static int ab8500_bank_open(struct inode *inode, struct file *file) 1466static int ab8500_bank_open(struct inode *inode, struct file *file)
@@ -1490,7 +1492,8 @@ static ssize_t ab8500_bank_write(struct file *file,
1490 1492
1491static int ab8500_address_print(struct seq_file *s, void *p) 1493static int ab8500_address_print(struct seq_file *s, void *p)
1492{ 1494{
1493 return seq_printf(s, "0x%02X\n", debug_address); 1495 seq_printf(s, "0x%02X\n", debug_address);
1496 return 0;
1494} 1497}
1495 1498
1496static int ab8500_address_open(struct inode *inode, struct file *file) 1499static int ab8500_address_open(struct inode *inode, struct file *file)
@@ -1598,7 +1601,8 @@ static int ab8500_interrupts_print(struct seq_file *s, void *p)
1598 for (line = 0; line < num_interrupt_lines; line++) { 1601 for (line = 0; line < num_interrupt_lines; line++) {
1599 struct irq_desc *desc = irq_to_desc(line + irq_first); 1602 struct irq_desc *desc = irq_to_desc(line + irq_first);
1600 1603
1601 seq_printf(s, "%3i: %6i %4i", line, 1604 seq_printf(s, "%3i: %6i %4i",
1605 line,
1602 num_interrupts[line], 1606 num_interrupts[line],
1603 num_wake_interrupts[line]); 1607 num_wake_interrupts[line]);
1604 1608
@@ -1705,8 +1709,7 @@ static int ab8500_print_modem_registers(struct seq_file *s, void *p)
1705 dev_err(dev, "ab->read fail %d\n", err); 1709 dev_err(dev, "ab->read fail %d\n", err);
1706 return err; 1710 return err;
1707 } 1711 }
1708 err = seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", 1712 seq_printf(s, " [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value);
1709 bank, reg, value);
1710 } 1713 }
1711 err = abx500_set_register_interruptible(dev, 1714 err = abx500_set_register_interruptible(dev,
1712 AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value); 1715 AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value);
@@ -1743,8 +1746,9 @@ static int ab8500_gpadc_bat_ctrl_print(struct seq_file *s, void *p)
1743 bat_ctrl_convert = ab8500_gpadc_ad_to_voltage(gpadc, 1746 bat_ctrl_convert = ab8500_gpadc_ad_to_voltage(gpadc,
1744 BAT_CTRL, bat_ctrl_raw); 1747 BAT_CTRL, bat_ctrl_raw);
1745 1748
1746 return seq_printf(s, "%d,0x%X\n", 1749 seq_printf(s, "%d,0x%X\n", bat_ctrl_convert, bat_ctrl_raw);
1747 bat_ctrl_convert, bat_ctrl_raw); 1750
1751 return 0;
1748} 1752}
1749 1753
1750static int ab8500_gpadc_bat_ctrl_open(struct inode *inode, struct file *file) 1754static int ab8500_gpadc_bat_ctrl_open(struct inode *inode, struct file *file)
@@ -1773,8 +1777,9 @@ static int ab8500_gpadc_btemp_ball_print(struct seq_file *s, void *p)
1773 btemp_ball_convert = ab8500_gpadc_ad_to_voltage(gpadc, BTEMP_BALL, 1777 btemp_ball_convert = ab8500_gpadc_ad_to_voltage(gpadc, BTEMP_BALL,
1774 btemp_ball_raw); 1778 btemp_ball_raw);
1775 1779
1776 return seq_printf(s, 1780 seq_printf(s, "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw);
1777 "%d,0x%X\n", btemp_ball_convert, btemp_ball_raw); 1781
1782 return 0;
1778} 1783}
1779 1784
1780static int ab8500_gpadc_btemp_ball_open(struct inode *inode, 1785static int ab8500_gpadc_btemp_ball_open(struct inode *inode,
@@ -1804,8 +1809,9 @@ static int ab8500_gpadc_main_charger_v_print(struct seq_file *s, void *p)
1804 main_charger_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, 1809 main_charger_v_convert = ab8500_gpadc_ad_to_voltage(gpadc,
1805 MAIN_CHARGER_V, main_charger_v_raw); 1810 MAIN_CHARGER_V, main_charger_v_raw);
1806 1811
1807 return seq_printf(s, "%d,0x%X\n", 1812 seq_printf(s, "%d,0x%X\n", main_charger_v_convert, main_charger_v_raw);
1808 main_charger_v_convert, main_charger_v_raw); 1813
1814 return 0;
1809} 1815}
1810 1816
1811static int ab8500_gpadc_main_charger_v_open(struct inode *inode, 1817static int ab8500_gpadc_main_charger_v_open(struct inode *inode,
@@ -1835,8 +1841,9 @@ static int ab8500_gpadc_acc_detect1_print(struct seq_file *s, void *p)
1835 acc_detect1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ACC_DETECT1, 1841 acc_detect1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ACC_DETECT1,
1836 acc_detect1_raw); 1842 acc_detect1_raw);
1837 1843
1838 return seq_printf(s, "%d,0x%X\n", 1844 seq_printf(s, "%d,0x%X\n", acc_detect1_convert, acc_detect1_raw);
1839 acc_detect1_convert, acc_detect1_raw); 1845
1846 return 0;
1840} 1847}
1841 1848
1842static int ab8500_gpadc_acc_detect1_open(struct inode *inode, 1849static int ab8500_gpadc_acc_detect1_open(struct inode *inode,
@@ -1866,8 +1873,9 @@ static int ab8500_gpadc_acc_detect2_print(struct seq_file *s, void *p)
1866 acc_detect2_convert = ab8500_gpadc_ad_to_voltage(gpadc, 1873 acc_detect2_convert = ab8500_gpadc_ad_to_voltage(gpadc,
1867 ACC_DETECT2, acc_detect2_raw); 1874 ACC_DETECT2, acc_detect2_raw);
1868 1875
1869 return seq_printf(s, "%d,0x%X\n", 1876 seq_printf(s, "%d,0x%X\n", acc_detect2_convert, acc_detect2_raw);
1870 acc_detect2_convert, acc_detect2_raw); 1877
1878 return 0;
1871} 1879}
1872 1880
1873static int ab8500_gpadc_acc_detect2_open(struct inode *inode, 1881static int ab8500_gpadc_acc_detect2_open(struct inode *inode,
@@ -1897,8 +1905,9 @@ static int ab8500_gpadc_aux1_print(struct seq_file *s, void *p)
1897 aux1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX1, 1905 aux1_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX1,
1898 aux1_raw); 1906 aux1_raw);
1899 1907
1900 return seq_printf(s, "%d,0x%X\n", 1908 seq_printf(s, "%d,0x%X\n", aux1_convert, aux1_raw);
1901 aux1_convert, aux1_raw); 1909
1910 return 0;
1902} 1911}
1903 1912
1904static int ab8500_gpadc_aux1_open(struct inode *inode, struct file *file) 1913static int ab8500_gpadc_aux1_open(struct inode *inode, struct file *file)
@@ -1926,8 +1935,9 @@ static int ab8500_gpadc_aux2_print(struct seq_file *s, void *p)
1926 aux2_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX2, 1935 aux2_convert = ab8500_gpadc_ad_to_voltage(gpadc, ADC_AUX2,
1927 aux2_raw); 1936 aux2_raw);
1928 1937
1929 return seq_printf(s, "%d,0x%X\n", 1938 seq_printf(s, "%d,0x%X\n", aux2_convert, aux2_raw);
1930 aux2_convert, aux2_raw); 1939
1940 return 0;
1931} 1941}
1932 1942
1933static int ab8500_gpadc_aux2_open(struct inode *inode, struct file *file) 1943static int ab8500_gpadc_aux2_open(struct inode *inode, struct file *file)
@@ -1955,8 +1965,9 @@ static int ab8500_gpadc_main_bat_v_print(struct seq_file *s, void *p)
1955 main_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_BAT_V, 1965 main_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, MAIN_BAT_V,
1956 main_bat_v_raw); 1966 main_bat_v_raw);
1957 1967
1958 return seq_printf(s, "%d,0x%X\n", 1968 seq_printf(s, "%d,0x%X\n", main_bat_v_convert, main_bat_v_raw);
1959 main_bat_v_convert, main_bat_v_raw); 1969
1970 return 0;
1960} 1971}
1961 1972
1962static int ab8500_gpadc_main_bat_v_open(struct inode *inode, 1973static int ab8500_gpadc_main_bat_v_open(struct inode *inode,
@@ -1986,8 +1997,9 @@ static int ab8500_gpadc_vbus_v_print(struct seq_file *s, void *p)
1986 vbus_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, VBUS_V, 1997 vbus_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, VBUS_V,
1987 vbus_v_raw); 1998 vbus_v_raw);
1988 1999
1989 return seq_printf(s, "%d,0x%X\n", 2000 seq_printf(s, "%d,0x%X\n", vbus_v_convert, vbus_v_raw);
1990 vbus_v_convert, vbus_v_raw); 2001
2002 return 0;
1991} 2003}
1992 2004
1993static int ab8500_gpadc_vbus_v_open(struct inode *inode, struct file *file) 2005static int ab8500_gpadc_vbus_v_open(struct inode *inode, struct file *file)
@@ -2015,8 +2027,9 @@ static int ab8500_gpadc_main_charger_c_print(struct seq_file *s, void *p)
2015 main_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc, 2027 main_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc,
2016 MAIN_CHARGER_C, main_charger_c_raw); 2028 MAIN_CHARGER_C, main_charger_c_raw);
2017 2029
2018 return seq_printf(s, "%d,0x%X\n", 2030 seq_printf(s, "%d,0x%X\n", main_charger_c_convert, main_charger_c_raw);
2019 main_charger_c_convert, main_charger_c_raw); 2031
2032 return 0;
2020} 2033}
2021 2034
2022static int ab8500_gpadc_main_charger_c_open(struct inode *inode, 2035static int ab8500_gpadc_main_charger_c_open(struct inode *inode,
@@ -2046,8 +2059,9 @@ static int ab8500_gpadc_usb_charger_c_print(struct seq_file *s, void *p)
2046 usb_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc, 2059 usb_charger_c_convert = ab8500_gpadc_ad_to_voltage(gpadc,
2047 USB_CHARGER_C, usb_charger_c_raw); 2060 USB_CHARGER_C, usb_charger_c_raw);
2048 2061
2049 return seq_printf(s, "%d,0x%X\n", 2062 seq_printf(s, "%d,0x%X\n", usb_charger_c_convert, usb_charger_c_raw);
2050 usb_charger_c_convert, usb_charger_c_raw); 2063
2064 return 0;
2051} 2065}
2052 2066
2053static int ab8500_gpadc_usb_charger_c_open(struct inode *inode, 2067static int ab8500_gpadc_usb_charger_c_open(struct inode *inode,
@@ -2077,8 +2091,9 @@ static int ab8500_gpadc_bk_bat_v_print(struct seq_file *s, void *p)
2077 bk_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc, 2091 bk_bat_v_convert = ab8500_gpadc_ad_to_voltage(gpadc,
2078 BK_BAT_V, bk_bat_v_raw); 2092 BK_BAT_V, bk_bat_v_raw);
2079 2093
2080 return seq_printf(s, "%d,0x%X\n", 2094 seq_printf(s, "%d,0x%X\n", bk_bat_v_convert, bk_bat_v_raw);
2081 bk_bat_v_convert, bk_bat_v_raw); 2095
2096 return 0;
2082} 2097}
2083 2098
2084static int ab8500_gpadc_bk_bat_v_open(struct inode *inode, struct file *file) 2099static int ab8500_gpadc_bk_bat_v_open(struct inode *inode, struct file *file)
@@ -2107,8 +2122,9 @@ static int ab8500_gpadc_die_temp_print(struct seq_file *s, void *p)
2107 die_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, DIE_TEMP, 2122 die_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, DIE_TEMP,
2108 die_temp_raw); 2123 die_temp_raw);
2109 2124
2110 return seq_printf(s, "%d,0x%X\n", 2125 seq_printf(s, "%d,0x%X\n", die_temp_convert, die_temp_raw);
2111 die_temp_convert, die_temp_raw); 2126
2127 return 0;
2112} 2128}
2113 2129
2114static int ab8500_gpadc_die_temp_open(struct inode *inode, struct file *file) 2130static int ab8500_gpadc_die_temp_open(struct inode *inode, struct file *file)
@@ -2137,8 +2153,9 @@ static int ab8500_gpadc_usb_id_print(struct seq_file *s, void *p)
2137 usb_id_convert = ab8500_gpadc_ad_to_voltage(gpadc, USB_ID, 2153 usb_id_convert = ab8500_gpadc_ad_to_voltage(gpadc, USB_ID,
2138 usb_id_raw); 2154 usb_id_raw);
2139 2155
2140 return seq_printf(s, "%d,0x%X\n", 2156 seq_printf(s, "%d,0x%X\n", usb_id_convert, usb_id_raw);
2141 usb_id_convert, usb_id_raw); 2157
2158 return 0;
2142} 2159}
2143 2160
2144static int ab8500_gpadc_usb_id_open(struct inode *inode, struct file *file) 2161static int ab8500_gpadc_usb_id_open(struct inode *inode, struct file *file)
@@ -2166,8 +2183,9 @@ static int ab8540_gpadc_xtal_temp_print(struct seq_file *s, void *p)
2166 xtal_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, XTAL_TEMP, 2183 xtal_temp_convert = ab8500_gpadc_ad_to_voltage(gpadc, XTAL_TEMP,
2167 xtal_temp_raw); 2184 xtal_temp_raw);
2168 2185
2169 return seq_printf(s, "%d,0x%X\n", 2186 seq_printf(s, "%d,0x%X\n", xtal_temp_convert, xtal_temp_raw);
2170 xtal_temp_convert, xtal_temp_raw); 2187
2188 return 0;
2171} 2189}
2172 2190
2173static int ab8540_gpadc_xtal_temp_open(struct inode *inode, struct file *file) 2191static int ab8540_gpadc_xtal_temp_open(struct inode *inode, struct file *file)
@@ -2197,8 +2215,9 @@ static int ab8540_gpadc_vbat_true_meas_print(struct seq_file *s, void *p)
2197 ab8500_gpadc_ad_to_voltage(gpadc, VBAT_TRUE_MEAS, 2215 ab8500_gpadc_ad_to_voltage(gpadc, VBAT_TRUE_MEAS,
2198 vbat_true_meas_raw); 2216 vbat_true_meas_raw);
2199 2217
2200 return seq_printf(s, "%d,0x%X\n", 2218 seq_printf(s, "%d,0x%X\n", vbat_true_meas_convert, vbat_true_meas_raw);
2201 vbat_true_meas_convert, vbat_true_meas_raw); 2219
2220 return 0;
2202} 2221}
2203 2222
2204static int ab8540_gpadc_vbat_true_meas_open(struct inode *inode, 2223static int ab8540_gpadc_vbat_true_meas_open(struct inode *inode,
@@ -2233,9 +2252,13 @@ static int ab8540_gpadc_bat_ctrl_and_ibat_print(struct seq_file *s, void *p)
2233 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, 2252 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
2234 ibat_raw); 2253 ibat_raw);
2235 2254
2236 return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", 2255 seq_printf(s,
2237 bat_ctrl_convert, bat_ctrl_raw, 2256 "%d,0x%X\n"
2238 ibat_convert, ibat_raw); 2257 "%d,0x%X\n",
2258 bat_ctrl_convert, bat_ctrl_raw,
2259 ibat_convert, ibat_raw);
2260
2261 return 0;
2239} 2262}
2240 2263
2241static int ab8540_gpadc_bat_ctrl_and_ibat_open(struct inode *inode, 2264static int ab8540_gpadc_bat_ctrl_and_ibat_open(struct inode *inode,
@@ -2269,9 +2292,13 @@ static int ab8540_gpadc_vbat_meas_and_ibat_print(struct seq_file *s, void *p)
2269 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, 2292 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
2270 ibat_raw); 2293 ibat_raw);
2271 2294
2272 return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", 2295 seq_printf(s,
2273 vbat_meas_convert, vbat_meas_raw, 2296 "%d,0x%X\n"
2274 ibat_convert, ibat_raw); 2297 "%d,0x%X\n",
2298 vbat_meas_convert, vbat_meas_raw,
2299 ibat_convert, ibat_raw);
2300
2301 return 0;
2275} 2302}
2276 2303
2277static int ab8540_gpadc_vbat_meas_and_ibat_open(struct inode *inode, 2304static int ab8540_gpadc_vbat_meas_and_ibat_open(struct inode *inode,
@@ -2307,9 +2334,13 @@ static int ab8540_gpadc_vbat_true_meas_and_ibat_print(struct seq_file *s,
2307 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, 2334 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
2308 ibat_raw); 2335 ibat_raw);
2309 2336
2310 return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", 2337 seq_printf(s,
2311 vbat_true_meas_convert, vbat_true_meas_raw, 2338 "%d,0x%X\n"
2312 ibat_convert, ibat_raw); 2339 "%d,0x%X\n",
2340 vbat_true_meas_convert, vbat_true_meas_raw,
2341 ibat_convert, ibat_raw);
2342
2343 return 0;
2313} 2344}
2314 2345
2315static int ab8540_gpadc_vbat_true_meas_and_ibat_open(struct inode *inode, 2346static int ab8540_gpadc_vbat_true_meas_and_ibat_open(struct inode *inode,
@@ -2344,9 +2375,13 @@ static int ab8540_gpadc_bat_temp_and_ibat_print(struct seq_file *s, void *p)
2344 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL, 2375 ibat_convert = ab8500_gpadc_ad_to_voltage(gpadc, IBAT_VIRTUAL_CHANNEL,
2345 ibat_raw); 2376 ibat_raw);
2346 2377
2347 return seq_printf(s, "%d,0x%X\n" "%d,0x%X\n", 2378 seq_printf(s,
2348 bat_temp_convert, bat_temp_raw, 2379 "%d,0x%X\n"
2349 ibat_convert, ibat_raw); 2380 "%d,0x%X\n",
2381 bat_temp_convert, bat_temp_raw,
2382 ibat_convert, ibat_raw);
2383
2384 return 0;
2350} 2385}
2351 2386
2352static int ab8540_gpadc_bat_temp_and_ibat_open(struct inode *inode, 2387static int ab8540_gpadc_bat_temp_and_ibat_open(struct inode *inode,
@@ -2373,16 +2408,19 @@ static int ab8540_gpadc_otp_cal_print(struct seq_file *s, void *p)
2373 gpadc = ab8500_gpadc_get("ab8500-gpadc.0"); 2408 gpadc = ab8500_gpadc_get("ab8500-gpadc.0");
2374 ab8540_gpadc_get_otp(gpadc, &vmain_l, &vmain_h, &btemp_l, &btemp_h, 2409 ab8540_gpadc_get_otp(gpadc, &vmain_l, &vmain_h, &btemp_l, &btemp_h,
2375 &vbat_l, &vbat_h, &ibat_l, &ibat_h); 2410 &vbat_l, &vbat_h, &ibat_l, &ibat_h);
2376 return seq_printf(s, "VMAIN_L:0x%X\n" 2411 seq_printf(s,
2377 "VMAIN_H:0x%X\n" 2412 "VMAIN_L:0x%X\n"
2378 "BTEMP_L:0x%X\n" 2413 "VMAIN_H:0x%X\n"
2379 "BTEMP_H:0x%X\n" 2414 "BTEMP_L:0x%X\n"
2380 "VBAT_L:0x%X\n" 2415 "BTEMP_H:0x%X\n"
2381 "VBAT_H:0x%X\n" 2416 "VBAT_L:0x%X\n"
2382 "IBAT_L:0x%X\n" 2417 "VBAT_H:0x%X\n"
2383 "IBAT_H:0x%X\n", 2418 "IBAT_L:0x%X\n"
2384 vmain_l, vmain_h, btemp_l, btemp_h, 2419 "IBAT_H:0x%X\n",
2385 vbat_l, vbat_h, ibat_l, ibat_h); 2420 vmain_l, vmain_h, btemp_l, btemp_h,
2421 vbat_l, vbat_h, ibat_l, ibat_h);
2422
2423 return 0;
2386} 2424}
2387 2425
2388static int ab8540_gpadc_otp_cal_open(struct inode *inode, struct file *file) 2426static int ab8540_gpadc_otp_cal_open(struct inode *inode, struct file *file)
@@ -2400,7 +2438,9 @@ static const struct file_operations ab8540_gpadc_otp_calib_fops = {
2400 2438
2401static int ab8500_gpadc_avg_sample_print(struct seq_file *s, void *p) 2439static int ab8500_gpadc_avg_sample_print(struct seq_file *s, void *p)
2402{ 2440{
2403 return seq_printf(s, "%d\n", avg_sample); 2441 seq_printf(s, "%d\n", avg_sample);
2442
2443 return 0;
2404} 2444}
2405 2445
2406static int ab8500_gpadc_avg_sample_open(struct inode *inode, struct file *file) 2446static int ab8500_gpadc_avg_sample_open(struct inode *inode, struct file *file)
@@ -2445,7 +2485,9 @@ static const struct file_operations ab8500_gpadc_avg_sample_fops = {
2445 2485
2446static int ab8500_gpadc_trig_edge_print(struct seq_file *s, void *p) 2486static int ab8500_gpadc_trig_edge_print(struct seq_file *s, void *p)
2447{ 2487{
2448 return seq_printf(s, "%d\n", trig_edge); 2488 seq_printf(s, "%d\n", trig_edge);
2489
2490 return 0;
2449} 2491}
2450 2492
2451static int ab8500_gpadc_trig_edge_open(struct inode *inode, struct file *file) 2493static int ab8500_gpadc_trig_edge_open(struct inode *inode, struct file *file)
@@ -2490,7 +2532,9 @@ static const struct file_operations ab8500_gpadc_trig_edge_fops = {
2490 2532
2491static int ab8500_gpadc_trig_timer_print(struct seq_file *s, void *p) 2533static int ab8500_gpadc_trig_timer_print(struct seq_file *s, void *p)
2492{ 2534{
2493 return seq_printf(s, "%d\n", trig_timer); 2535 seq_printf(s, "%d\n", trig_timer);
2536
2537 return 0;
2494} 2538}
2495 2539
2496static int ab8500_gpadc_trig_timer_open(struct inode *inode, struct file *file) 2540static int ab8500_gpadc_trig_timer_open(struct inode *inode, struct file *file)
@@ -2533,7 +2577,9 @@ static const struct file_operations ab8500_gpadc_trig_timer_fops = {
2533 2577
2534static int ab8500_gpadc_conv_type_print(struct seq_file *s, void *p) 2578static int ab8500_gpadc_conv_type_print(struct seq_file *s, void *p)
2535{ 2579{
2536 return seq_printf(s, "%d\n", conv_type); 2580 seq_printf(s, "%d\n", conv_type);
2581
2582 return 0;
2537} 2583}
2538 2584
2539static int ab8500_gpadc_conv_type_open(struct inode *inode, struct file *file) 2585static int ab8500_gpadc_conv_type_open(struct inode *inode, struct file *file)
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 09ba8f186e6a..6ca6dfab50eb 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -561,12 +561,23 @@ static int arizona_of_get_core_pdata(struct arizona *arizona)
561 count++; 561 count++;
562 } 562 }
563 563
564 count = 0;
565 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
566 cur, val) {
567 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
568 break;
569
570 arizona->pdata.dmic_ref[count] = val;
571 count++;
572 }
573
564 return 0; 574 return 0;
565} 575}
566 576
567const struct of_device_id arizona_of_match[] = { 577const struct of_device_id arizona_of_match[] = {
568 { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, 578 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
569 { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, 579 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
580 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
570 { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, 581 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
571 {}, 582 {},
572}; 583};
@@ -671,6 +682,7 @@ int arizona_dev_init(struct arizona *arizona)
671 switch (arizona->type) { 682 switch (arizona->type) {
672 case WM5102: 683 case WM5102:
673 case WM5110: 684 case WM5110:
685 case WM8280:
674 case WM8997: 686 case WM8997:
675 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) 687 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
676 arizona->core_supplies[i].supply 688 arizona->core_supplies[i].supply
@@ -834,11 +846,19 @@ int arizona_dev_init(struct arizona *arizona)
834#endif 846#endif
835#ifdef CONFIG_MFD_WM5110 847#ifdef CONFIG_MFD_WM5110
836 case 0x5110: 848 case 0x5110:
837 type_name = "WM5110"; 849 switch (arizona->type) {
838 if (arizona->type != WM5110) { 850 case WM5110:
851 type_name = "WM5110";
852 break;
853 case WM8280:
854 type_name = "WM8280";
855 break;
856 default:
857 type_name = "WM5110";
839 dev_err(arizona->dev, "WM5110 registered as %d\n", 858 dev_err(arizona->dev, "WM5110 registered as %d\n",
840 arizona->type); 859 arizona->type);
841 arizona->type = WM5110; 860 arizona->type = WM5110;
861 break;
842 } 862 }
843 apply_patch = wm5110_patch; 863 apply_patch = wm5110_patch;
844 break; 864 break;
@@ -1010,6 +1030,7 @@ int arizona_dev_init(struct arizona *arizona)
1010 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); 1030 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1011 break; 1031 break;
1012 case WM5110: 1032 case WM5110:
1033 case WM8280:
1013 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, 1034 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1014 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); 1035 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1015 break; 1036 break;
diff --git a/drivers/mfd/arizona-i2c.c b/drivers/mfd/arizona-i2c.c
index 9d4156fb082a..ff782a5de235 100644
--- a/drivers/mfd/arizona-i2c.c
+++ b/drivers/mfd/arizona-i2c.c
@@ -44,6 +44,7 @@ static int arizona_i2c_probe(struct i2c_client *i2c,
44#endif 44#endif
45#ifdef CONFIG_MFD_WM5110 45#ifdef CONFIG_MFD_WM5110
46 case WM5110: 46 case WM5110:
47 case WM8280:
47 regmap_config = &wm5110_i2c_regmap; 48 regmap_config = &wm5110_i2c_regmap;
48 break; 49 break;
49#endif 50#endif
@@ -87,6 +88,7 @@ static int arizona_i2c_remove(struct i2c_client *i2c)
87static const struct i2c_device_id arizona_i2c_id[] = { 88static const struct i2c_device_id arizona_i2c_id[] = {
88 { "wm5102", WM5102 }, 89 { "wm5102", WM5102 },
89 { "wm5110", WM5110 }, 90 { "wm5110", WM5110 },
91 { "wm8280", WM8280 },
90 { "wm8997", WM8997 }, 92 { "wm8997", WM8997 },
91 { } 93 { }
92}; 94};
diff --git a/drivers/mfd/arizona-irq.c b/drivers/mfd/arizona-irq.c
index 3a3fe7cc6d61..d063b94b94b5 100644
--- a/drivers/mfd/arizona-irq.c
+++ b/drivers/mfd/arizona-irq.c
@@ -211,6 +211,7 @@ int arizona_irq_init(struct arizona *arizona)
211#endif 211#endif
212#ifdef CONFIG_MFD_WM5110 212#ifdef CONFIG_MFD_WM5110
213 case WM5110: 213 case WM5110:
214 case WM8280:
214 aod = &wm5110_aod; 215 aod = &wm5110_aod;
215 216
216 switch (arizona->rev) { 217 switch (arizona->rev) {
diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c
index 8ef58bcff193..1e845f6d407b 100644
--- a/drivers/mfd/arizona-spi.c
+++ b/drivers/mfd/arizona-spi.c
@@ -44,6 +44,7 @@ static int arizona_spi_probe(struct spi_device *spi)
44#endif 44#endif
45#ifdef CONFIG_MFD_WM5110 45#ifdef CONFIG_MFD_WM5110
46 case WM5110: 46 case WM5110:
47 case WM8280:
47 regmap_config = &wm5110_spi_regmap; 48 regmap_config = &wm5110_spi_regmap;
48 break; 49 break;
49#endif 50#endif
@@ -84,6 +85,7 @@ static int arizona_spi_remove(struct spi_device *spi)
84static const struct spi_device_id arizona_spi_ids[] = { 85static const struct spi_device_id arizona_spi_ids[] = {
85 { "wm5102", WM5102 }, 86 { "wm5102", WM5102 },
86 { "wm5110", WM5110 }, 87 { "wm5110", WM5110 },
88 { "wm8280", WM8280 },
87 { }, 89 { },
88}; 90};
89MODULE_DEVICE_TABLE(spi, arizona_spi_ids); 91MODULE_DEVICE_TABLE(spi, arizona_spi_ids);
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 0acbe52b2411..d18029be6a78 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -29,7 +29,7 @@
29 29
30#define AXP20X_OFF 0x80 30#define AXP20X_OFF 0x80
31 31
32static const char const *axp20x_model_names[] = { 32static const char * const axp20x_model_names[] = {
33 "AXP202", 33 "AXP202",
34 "AXP209", 34 "AXP209",
35 "AXP288", 35 "AXP288",
@@ -290,6 +290,29 @@ static struct resource axp288_adc_resources[] = {
290 }, 290 },
291}; 291};
292 292
293static struct resource axp288_extcon_resources[] = {
294 {
295 .start = AXP288_IRQ_VBUS_FALL,
296 .end = AXP288_IRQ_VBUS_FALL,
297 .flags = IORESOURCE_IRQ,
298 },
299 {
300 .start = AXP288_IRQ_VBUS_RISE,
301 .end = AXP288_IRQ_VBUS_RISE,
302 .flags = IORESOURCE_IRQ,
303 },
304 {
305 .start = AXP288_IRQ_MV_CHNG,
306 .end = AXP288_IRQ_MV_CHNG,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = AXP288_IRQ_BC_USB_CHNG,
311 .end = AXP288_IRQ_BC_USB_CHNG,
312 .flags = IORESOURCE_IRQ,
313 },
314};
315
293static struct resource axp288_charger_resources[] = { 316static struct resource axp288_charger_resources[] = {
294 { 317 {
295 .start = AXP288_IRQ_OV, 318 .start = AXP288_IRQ_OV,
@@ -345,6 +368,11 @@ static struct mfd_cell axp288_cells[] = {
345 .resources = axp288_adc_resources, 368 .resources = axp288_adc_resources,
346 }, 369 },
347 { 370 {
371 .name = "axp288_extcon",
372 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
373 .resources = axp288_extcon_resources,
374 },
375 {
348 .name = "axp288_charger", 376 .name = "axp288_charger",
349 .num_resources = ARRAY_SIZE(axp288_charger_resources), 377 .num_resources = ARRAY_SIZE(axp288_charger_resources),
350 .resources = axp288_charger_resources, 378 .resources = axp288_charger_resources,
diff --git a/drivers/mfd/da9052-irq.c b/drivers/mfd/da9052-irq.c
index 57ae7841f536..e65ca194fa98 100644
--- a/drivers/mfd/da9052-irq.c
+++ b/drivers/mfd/da9052-irq.c
@@ -262,6 +262,8 @@ int da9052_irq_init(struct da9052 *da9052)
262 goto regmap_err; 262 goto regmap_err;
263 } 263 }
264 264
265 enable_irq_wake(da9052->chip_irq);
266
265 ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq", 267 ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq",
266 da9052_auxadc_irq, da9052); 268 da9052_auxadc_irq, da9052);
267 269
diff --git a/drivers/mfd/da9052-spi.c b/drivers/mfd/da9052-spi.c
index 45ae0b7d13ef..b5de8a6856c0 100644
--- a/drivers/mfd/da9052-spi.c
+++ b/drivers/mfd/da9052-spi.c
@@ -32,7 +32,7 @@ static int da9052_spi_probe(struct spi_device *spi)
32 if (!da9052) 32 if (!da9052)
33 return -ENOMEM; 33 return -ENOMEM;
34 34
35 spi->mode = SPI_MODE_0 | SPI_CPOL; 35 spi->mode = SPI_MODE_0;
36 spi->bits_per_word = 8; 36 spi->bits_per_word = 8;
37 spi_setup(spi); 37 spi_setup(spi);
38 38
@@ -43,6 +43,10 @@ static int da9052_spi_probe(struct spi_device *spi)
43 43
44 config = da9052_regmap_config; 44 config = da9052_regmap_config;
45 config.read_flag_mask = 1; 45 config.read_flag_mask = 1;
46 config.reg_bits = 7;
47 config.pad_bits = 1;
48 config.val_bits = 8;
49 config.use_single_rw = 1;
46 50
47 da9052->regmap = devm_regmap_init_spi(spi, &config); 51 da9052->regmap = devm_regmap_init_spi(spi, &config);
48 if (IS_ERR(da9052->regmap)) { 52 if (IS_ERR(da9052->regmap)) {
diff --git a/drivers/mfd/da9150-core.c b/drivers/mfd/da9150-core.c
index 4d757b97ef9a..5549817df32e 100644
--- a/drivers/mfd/da9150-core.c
+++ b/drivers/mfd/da9150-core.c
@@ -95,7 +95,7 @@ static const struct regmap_range_cfg da9150_range_cfg[] = {
95 }, 95 },
96}; 96};
97 97
98static struct regmap_config da9150_regmap_config = { 98static const struct regmap_config da9150_regmap_config = {
99 .reg_bits = 8, 99 .reg_bits = 8,
100 .val_bits = 8, 100 .val_bits = 8,
101 .ranges = da9150_range_cfg, 101 .ranges = da9150_range_cfg,
diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c
index 1be9bd1c046d..704e189ca162 100644
--- a/drivers/mfd/dln2.c
+++ b/drivers/mfd/dln2.c
@@ -435,7 +435,7 @@ static int _dln2_transfer(struct dln2_dev *dln2, u16 handle, u16 cmd,
435 struct dln2_response *rsp; 435 struct dln2_response *rsp;
436 struct dln2_rx_context *rxc; 436 struct dln2_rx_context *rxc;
437 struct device *dev = &dln2->interface->dev; 437 struct device *dev = &dln2->interface->dev;
438 const unsigned long timeout = DLN2_USB_TIMEOUT * HZ / 1000; 438 const unsigned long timeout = msecs_to_jiffies(DLN2_USB_TIMEOUT);
439 struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle]; 439 struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle];
440 int size; 440 int size;
441 441
diff --git a/drivers/mfd/hi6421-pmic-core.c b/drivers/mfd/hi6421-pmic-core.c
index 7210ae28bf81..95b2ff8f223a 100644
--- a/drivers/mfd/hi6421-pmic-core.c
+++ b/drivers/mfd/hi6421-pmic-core.c
@@ -93,7 +93,7 @@ static int hi6421_pmic_remove(struct platform_device *pdev)
93 return 0; 93 return 0;
94} 94}
95 95
96static struct of_device_id of_hi6421_pmic_match_tbl[] = { 96static const struct of_device_id of_hi6421_pmic_match_tbl[] = {
97 { .compatible = "hisilicon,hi6421-pmic", }, 97 { .compatible = "hisilicon,hi6421-pmic", },
98 { }, 98 { },
99}; 99};
diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c
new file mode 100644
index 000000000000..1ce16037d043
--- /dev/null
+++ b/drivers/mfd/intel_quark_i2c_gpio.c
@@ -0,0 +1,282 @@
1/*
2 * Intel Quark MFD PCI driver for I2C & GPIO
3 *
4 * Copyright(c) 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * Intel Quark PCI device for I2C and GPIO controller sharing the same
16 * PCI function. This PCI driver will split the 2 devices into their
17 * respective drivers.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/mfd/core.h>
24#include <linux/clkdev.h>
25#include <linux/clk-provider.h>
26#include <linux/dmi.h>
27#include <linux/platform_data/gpio-dwapb.h>
28#include <linux/platform_data/i2c-designware.h>
29
30/* PCI BAR for register base address */
31#define MFD_I2C_BAR 0
32#define MFD_GPIO_BAR 1
33
34/* The base GPIO number under GPIOLIB framework */
35#define INTEL_QUARK_MFD_GPIO_BASE 8
36
37/* The default number of South-Cluster GPIO on Quark. */
38#define INTEL_QUARK_MFD_NGPIO 8
39
40/* The DesignWare GPIO ports on Quark. */
41#define INTEL_QUARK_GPIO_NPORTS 1
42
43#define INTEL_QUARK_IORES_MEM 0
44#define INTEL_QUARK_IORES_IRQ 1
45
46#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
47
48/* The Quark I2C controller source clock */
49#define INTEL_QUARK_I2C_CLK_HZ 33000000
50
51#define INTEL_QUARK_I2C_NCLK 1
52
53struct intel_quark_mfd {
54 struct pci_dev *pdev;
55 struct clk *i2c_clk;
56 struct clk_lookup *i2c_clk_lookup;
57};
58
59struct i2c_mode_info {
60 const char *name;
61 unsigned int i2c_scl_freq;
62};
63
64static const struct i2c_mode_info platform_i2c_mode_info[] = {
65 {
66 .name = "Galileo",
67 .i2c_scl_freq = 100000,
68 },
69 {
70 .name = "GalileoGen2",
71 .i2c_scl_freq = 400000,
72 },
73 {}
74};
75
76static struct resource intel_quark_i2c_res[] = {
77 [INTEL_QUARK_IORES_MEM] = {
78 .flags = IORESOURCE_MEM,
79 },
80 [INTEL_QUARK_IORES_IRQ] = {
81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85static struct resource intel_quark_gpio_res[] = {
86 [INTEL_QUARK_IORES_MEM] = {
87 .flags = IORESOURCE_MEM,
88 },
89};
90
91static struct mfd_cell intel_quark_mfd_cells[] = {
92 {
93 .id = MFD_I2C_BAR,
94 .name = "i2c_designware",
95 .num_resources = ARRAY_SIZE(intel_quark_i2c_res),
96 .resources = intel_quark_i2c_res,
97 .ignore_resource_conflicts = true,
98 },
99 {
100 .id = MFD_GPIO_BAR,
101 .name = "gpio-dwapb",
102 .num_resources = ARRAY_SIZE(intel_quark_gpio_res),
103 .resources = intel_quark_gpio_res,
104 .ignore_resource_conflicts = true,
105 },
106};
107
108static const struct pci_device_id intel_quark_mfd_ids[] = {
109 { PCI_VDEVICE(INTEL, 0x0934), },
110 {},
111};
112MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
113
114static int intel_quark_register_i2c_clk(struct intel_quark_mfd *quark_mfd)
115{
116 struct pci_dev *pdev = quark_mfd->pdev;
117 struct clk_lookup *i2c_clk_lookup;
118 struct clk *i2c_clk;
119 int ret;
120
121 i2c_clk_lookup = devm_kcalloc(&pdev->dev, INTEL_QUARK_I2C_NCLK,
122 sizeof(*i2c_clk_lookup), GFP_KERNEL);
123 if (!i2c_clk_lookup)
124 return -ENOMEM;
125
126 i2c_clk_lookup[0].dev_id = INTEL_QUARK_I2C_CONTROLLER_CLK;
127
128 i2c_clk = clk_register_fixed_rate(&pdev->dev,
129 INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
130 CLK_IS_ROOT, INTEL_QUARK_I2C_CLK_HZ);
131
132 quark_mfd->i2c_clk_lookup = i2c_clk_lookup;
133 quark_mfd->i2c_clk = i2c_clk;
134
135 ret = clk_register_clkdevs(i2c_clk, i2c_clk_lookup,
136 INTEL_QUARK_I2C_NCLK);
137 if (ret)
138 dev_err(&pdev->dev, "Fixed clk register failed: %d\n", ret);
139
140 return ret;
141}
142
143static void intel_quark_unregister_i2c_clk(struct pci_dev *pdev)
144{
145 struct intel_quark_mfd *quark_mfd = dev_get_drvdata(&pdev->dev);
146
147 if (!quark_mfd->i2c_clk || !quark_mfd->i2c_clk_lookup)
148 return;
149
150 clkdev_drop(quark_mfd->i2c_clk_lookup);
151 clk_unregister(quark_mfd->i2c_clk);
152}
153
154static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
155{
156 const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
157 const struct i2c_mode_info *info;
158 struct dw_i2c_platform_data *pdata;
159 struct resource *res = (struct resource *)cell->resources;
160 struct device *dev = &pdev->dev;
161
162 res[INTEL_QUARK_IORES_MEM].start =
163 pci_resource_start(pdev, MFD_I2C_BAR);
164 res[INTEL_QUARK_IORES_MEM].end =
165 pci_resource_end(pdev, MFD_I2C_BAR);
166
167 res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
168 res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
169
170 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
171 if (!pdata)
172 return -ENOMEM;
173
174 /* Normal mode by default */
175 pdata->i2c_scl_freq = 100000;
176
177 if (board_name) {
178 for (info = platform_i2c_mode_info; info->name; info++) {
179 if (!strcmp(board_name, info->name)) {
180 pdata->i2c_scl_freq = info->i2c_scl_freq;
181 break;
182 }
183 }
184 }
185
186 cell->platform_data = pdata;
187 cell->pdata_size = sizeof(*pdata);
188
189 return 0;
190}
191
192static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
193{
194 struct dwapb_platform_data *pdata;
195 struct resource *res = (struct resource *)cell->resources;
196 struct device *dev = &pdev->dev;
197
198 res[INTEL_QUARK_IORES_MEM].start =
199 pci_resource_start(pdev, MFD_GPIO_BAR);
200 res[INTEL_QUARK_IORES_MEM].end =
201 pci_resource_end(pdev, MFD_GPIO_BAR);
202
203 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
204 if (!pdata)
205 return -ENOMEM;
206
207 /* For intel quark x1000, it has only one port: portA */
208 pdata->nports = INTEL_QUARK_GPIO_NPORTS;
209 pdata->properties = devm_kcalloc(dev, pdata->nports,
210 sizeof(*pdata->properties),
211 GFP_KERNEL);
212 if (!pdata->properties)
213 return -ENOMEM;
214
215 /* Set the properties for portA */
216 pdata->properties->node = NULL;
217 pdata->properties->name = "intel-quark-x1000-gpio-portA";
218 pdata->properties->idx = 0;
219 pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
220 pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
221 pdata->properties->irq = pdev->irq;
222 pdata->properties->irq_shared = true;
223
224 cell->platform_data = pdata;
225 cell->pdata_size = sizeof(*pdata);
226
227 return 0;
228}
229
230static int intel_quark_mfd_probe(struct pci_dev *pdev,
231 const struct pci_device_id *id)
232{
233 struct intel_quark_mfd *quark_mfd;
234 int ret;
235
236 ret = pcim_enable_device(pdev);
237 if (ret)
238 return ret;
239
240 quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
241 if (!quark_mfd)
242 return -ENOMEM;
243 quark_mfd->pdev = pdev;
244
245 ret = intel_quark_register_i2c_clk(quark_mfd);
246 if (ret)
247 return ret;
248
249 dev_set_drvdata(&pdev->dev, quark_mfd);
250
251 ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[MFD_I2C_BAR]);
252 if (ret)
253 return ret;
254
255 ret = intel_quark_gpio_setup(pdev,
256 &intel_quark_mfd_cells[MFD_GPIO_BAR]);
257 if (ret)
258 return ret;
259
260 return mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
261 ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
262 NULL);
263}
264
265static void intel_quark_mfd_remove(struct pci_dev *pdev)
266{
267 intel_quark_unregister_i2c_clk(pdev);
268 mfd_remove_devices(&pdev->dev);
269}
270
271static struct pci_driver intel_quark_mfd_driver = {
272 .name = "intel_quark_mfd_i2c_gpio",
273 .id_table = intel_quark_mfd_ids,
274 .probe = intel_quark_mfd_probe,
275 .remove = intel_quark_mfd_remove,
276};
277
278module_pci_driver(intel_quark_mfd_driver);
279
280MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
281MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
282MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c
index 80cef048b904..7b50b6b208a5 100644
--- a/drivers/mfd/intel_soc_pmic_core.c
+++ b/drivers/mfd/intel_soc_pmic_core.c
@@ -26,19 +26,14 @@
26#include <linux/mfd/intel_soc_pmic.h> 26#include <linux/mfd/intel_soc_pmic.h>
27#include "intel_soc_pmic_core.h" 27#include "intel_soc_pmic_core.h"
28 28
29/*
30 * On some boards the PMIC interrupt may come from a GPIO line.
31 * Try to lookup the ACPI table and see if such connection exists. If not,
32 * return -ENOENT and use the IRQ provided by I2C.
33 */
34static int intel_soc_pmic_find_gpio_irq(struct device *dev) 29static int intel_soc_pmic_find_gpio_irq(struct device *dev)
35{ 30{
36 struct gpio_desc *desc; 31 struct gpio_desc *desc;
37 int irq; 32 int irq;
38 33
39 desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0); 34 desc = devm_gpiod_get_index(dev, "intel_soc_pmic", 0, GPIOD_IN);
40 if (IS_ERR(desc)) 35 if (IS_ERR(desc))
41 return -ENOENT; 36 return PTR_ERR(desc);
42 37
43 irq = gpiod_to_irq(desc); 38 irq = gpiod_to_irq(desc);
44 if (irq < 0) 39 if (irq < 0)
@@ -71,6 +66,11 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c,
71 66
72 pmic->regmap = devm_regmap_init_i2c(i2c, config->regmap_config); 67 pmic->regmap = devm_regmap_init_i2c(i2c, config->regmap_config);
73 68
69 /*
70 * On some boards the PMIC interrupt may come from a GPIO line. Try to
71 * lookup the ACPI table for a such connection and setup a GPIO
72 * interrupt if it exists. Otherwise use the IRQ provided by I2C
73 */
74 irq = intel_soc_pmic_find_gpio_irq(dev); 74 irq = intel_soc_pmic_find_gpio_irq(dev);
75 pmic->irq = (irq < 0) ? i2c->irq : irq; 75 pmic->irq = (irq < 0) ? i2c->irq : irq;
76 76
diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c
index 5615522f8d62..8057849d51ac 100644
--- a/drivers/mfd/kempld-core.c
+++ b/drivers/mfd/kempld-core.c
@@ -508,8 +508,15 @@ static struct dmi_system_id kempld_dmi_table[] __initdata = {
508 }, 508 },
509 .driver_data = (void *)&kempld_platform_data_generic, 509 .driver_data = (void *)&kempld_platform_data_generic,
510 .callback = kempld_create_platform_device, 510 .callback = kempld_create_platform_device,
511 }, 511 }, {
512 { 512 .ident = "CBL6",
513 .matches = {
514 DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
515 DMI_MATCH(DMI_BOARD_NAME, "COMe-cBL6"),
516 },
517 .driver_data = (void *)&kempld_platform_data_generic,
518 .callback = kempld_create_platform_device,
519 }, {
513 .ident = "CCR2", 520 .ident = "CCR2",
514 .matches = { 521 .matches = {
515 DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"), 522 DMI_MATCH(DMI_BOARD_VENDOR, "Kontron"),
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index f35d4280b2f7..12d960a60ec4 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -539,72 +539,7 @@ static struct lpc_ich_info lpc_chipset_info[] = {
539 * functions that probably will be registered by other drivers. 539 * functions that probably will be registered by other drivers.
540 */ 540 */
541static const struct pci_device_id lpc_ich_ids[] = { 541static const struct pci_device_id lpc_ich_ids[] = {
542 { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH}, 542 { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
543 { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
544 { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
545 { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},
546 { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},
547 { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},
548 { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},
549 { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},
550 { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},
551 { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},
552 { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},
553 { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},
554 { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},
555 { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},
556 { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},
557 { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},
558 { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},
559 { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},
560 { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},
561 { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},
562 { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},
563 { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},
564 { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},
565 { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},
566 { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},
567 { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},
568 { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},
569 { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},
570 { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},
571 { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},
572 { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},
573 { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},
574 { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},
575 { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},
576 { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},
577 { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},
578 { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},
579 { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},
580 { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},
581 { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},
582 { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
583 { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},
584 { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},
585 { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},
586 { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
587 { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
588 { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},
589 { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
590 { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},
591 { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
592 { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},
593 { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},
594 { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},
595 { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},
596 { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},
597 { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},
598 { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},
599 { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},
600 { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},
601 { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},
602 { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},
603 { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},
604 { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},
605 { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
606 { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
607 { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
608 { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT}, 543 { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},
609 { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD}, 544 { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},
610 { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM}, 545 { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},
@@ -638,7 +573,6 @@ static const struct pci_device_id lpc_ich_ids[] = {
638 { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT}, 573 { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},
639 { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG}, 574 { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},
640 { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG}, 575 { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},
641 { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
642 { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT}, 576 { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},
643 { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT}, 577 { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},
644 { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT}, 578 { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},
@@ -671,6 +605,79 @@ static const struct pci_device_id lpc_ich_ids[] = {
671 { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT}, 605 { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},
672 { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT}, 606 { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},
673 { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT}, 607 { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},
608 { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
609 { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
610 { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
611 { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
612 { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
613 { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
614 { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
615 { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},
616 { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
617 { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
618 { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},
619 { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},
620 { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},
621 { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},
622 { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},
623 { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},
624 { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},
625 { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},
626 { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},
627 { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},
628 { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},
629 { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},
630 { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},
631 { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},
632 { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},
633 { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},
634 { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},
635 { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},
636 { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},
637 { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},
638 { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},
639 { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},
640 { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},
641 { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},
642 { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},
643 { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},
644 { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},
645 { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},
646 { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},
647 { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},
648 { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},
649 { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},
650 { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},
651 { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},
652 { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},
653 { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},
654 { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},
655 { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},
656 { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},
657 { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},
658 { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
659 { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
660 { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
661 { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
662 { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
663 { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},
664 { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},
665 { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},
666 { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},
667 { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},
668 { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},
669 { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},
670 { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},
671 { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},
672 { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},
673 { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},
674 { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},
675 { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},
676 { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},
677 { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},
678 { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
679 { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
680 { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
674 { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, 681 { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT},
675 { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, 682 { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT},
676 { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, 683 { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT},
@@ -703,14 +710,11 @@ static const struct pci_device_id lpc_ich_ids[] = {
703 { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, 710 { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT},
704 { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, 711 { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT},
705 { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, 712 { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT},
706 { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, 713 { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
707 { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, 714 { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
708 { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, 715 { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
709 { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, 716 { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
710 { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, 717 { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
711 { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
712 { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
713 { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
714 { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG}, 718 { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG},
715 { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG}, 719 { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG},
716 { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG}, 720 { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG},
@@ -743,12 +747,14 @@ static const struct pci_device_id lpc_ich_ids[] = {
743 { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG}, 747 { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG},
744 { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG}, 748 { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG},
745 { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG}, 749 { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG},
746 { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN}, 750 { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
747 { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN}, 751 { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
748 { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN}, 752 { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
749 { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN}, 753 { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
750 { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL}, 754 { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
751 { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO}, 755 { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
756 { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
757 { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
752 { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP}, 758 { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP},
753 { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP}, 759 { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP},
754 { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP}, 760 { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP},
@@ -756,12 +762,6 @@ static const struct pci_device_id lpc_ich_ids[] = {
756 { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP}, 762 { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP},
757 { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, 763 { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP},
758 { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, 764 { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP},
759 { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
760 { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
761 { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
762 { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
763 { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
764 { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
765 { 0, }, /* End of list */ 765 { 0, }, /* End of list */
766}; 766};
767MODULE_DEVICE_TABLE(pci, lpc_ich_ids); 767MODULE_DEVICE_TABLE(pci, lpc_ich_ids);
diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c
index a159593e27a0..cb14afa97e6f 100644
--- a/drivers/mfd/max77693.c
+++ b/drivers/mfd/max77693.c
@@ -53,8 +53,8 @@ static const struct mfd_cell max77693_devs[] = {
53 .of_compatible = "maxim,max77693-haptic", 53 .of_compatible = "maxim,max77693-haptic",
54 }, 54 },
55 { 55 {
56 .name = "max77693-flash", 56 .name = "max77693-led",
57 .of_compatible = "maxim,max77693-flash", 57 .of_compatible = "maxim,max77693-led",
58 }, 58 },
59}; 59};
60 60
diff --git a/drivers/mfd/max77843.c b/drivers/mfd/max77843.c
new file mode 100644
index 000000000000..a354ac677ec7
--- /dev/null
+++ b/drivers/mfd/max77843.c
@@ -0,0 +1,243 @@
1/*
2 * MFD core driver for the Maxim MAX77843
3 *
4 * Copyright (C) 2015 Samsung Electronics
5 * Author: Jaewon Kim <jaewon02.kim@samsung.com>
6 * Author: Beomho Seo <beomho.seo@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/err.h>
15#include <linux/i2c.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/module.h>
19#include <linux/mfd/core.h>
20#include <linux/mfd/max77843-private.h>
21#include <linux/of_device.h>
22#include <linux/platform_device.h>
23
24static const struct mfd_cell max77843_devs[] = {
25 {
26 .name = "max77843-muic",
27 .of_compatible = "maxim,max77843-muic",
28 }, {
29 .name = "max77843-regulator",
30 .of_compatible = "maxim,max77843-regulator",
31 }, {
32 .name = "max77843-charger",
33 .of_compatible = "maxim,max77843-charger"
34 }, {
35 .name = "max77843-fuelgauge",
36 .of_compatible = "maxim,max77843-fuelgauge",
37 }, {
38 .name = "max77843-haptic",
39 .of_compatible = "maxim,max77843-haptic",
40 },
41};
42
43static const struct regmap_config max77843_charger_regmap_config = {
44 .reg_bits = 8,
45 .val_bits = 8,
46 .max_register = MAX77843_CHG_REG_END,
47};
48
49static const struct regmap_config max77843_regmap_config = {
50 .reg_bits = 8,
51 .val_bits = 8,
52 .max_register = MAX77843_SYS_REG_END,
53};
54
55static const struct regmap_irq max77843_irqs[] = {
56 /* TOPSYS interrupts */
57 { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSUVLO_INT, },
58 { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_SYSOVLO_INT, },
59 { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TSHDN_INT, },
60 { .reg_offset = 0, .mask = MAX77843_SYS_IRQ_TM_INT, },
61};
62
63static const struct regmap_irq_chip max77843_irq_chip = {
64 .name = "max77843",
65 .status_base = MAX77843_SYS_REG_SYSINTSRC,
66 .mask_base = MAX77843_SYS_REG_SYSINTMASK,
67 .mask_invert = false,
68 .num_regs = 1,
69 .irqs = max77843_irqs,
70 .num_irqs = ARRAY_SIZE(max77843_irqs),
71};
72
73/* Charger and Charger regulator use same regmap. */
74static int max77843_chg_init(struct max77843 *max77843)
75{
76 int ret;
77
78 max77843->i2c_chg = i2c_new_dummy(max77843->i2c->adapter, I2C_ADDR_CHG);
79 if (!max77843->i2c_chg) {
80 dev_err(&max77843->i2c->dev,
81 "Cannot allocate I2C device for Charger\n");
82 return PTR_ERR(max77843->i2c_chg);
83 }
84 i2c_set_clientdata(max77843->i2c_chg, max77843);
85
86 max77843->regmap_chg = devm_regmap_init_i2c(max77843->i2c_chg,
87 &max77843_charger_regmap_config);
88 if (IS_ERR(max77843->regmap_chg)) {
89 ret = PTR_ERR(max77843->regmap_chg);
90 goto err_chg_i2c;
91 }
92
93 return 0;
94
95err_chg_i2c:
96 i2c_unregister_device(max77843->i2c_chg);
97
98 return ret;
99}
100
101static int max77843_probe(struct i2c_client *i2c,
102 const struct i2c_device_id *id)
103{
104 struct max77843 *max77843;
105 unsigned int reg_data;
106 int ret;
107
108 max77843 = devm_kzalloc(&i2c->dev, sizeof(*max77843), GFP_KERNEL);
109 if (!max77843)
110 return -ENOMEM;
111
112 i2c_set_clientdata(i2c, max77843);
113 max77843->dev = &i2c->dev;
114 max77843->i2c = i2c;
115 max77843->irq = i2c->irq;
116
117 max77843->regmap = devm_regmap_init_i2c(i2c,
118 &max77843_regmap_config);
119 if (IS_ERR(max77843->regmap)) {
120 dev_err(&i2c->dev, "Failed to allocate topsys register map\n");
121 return PTR_ERR(max77843->regmap);
122 }
123
124 ret = regmap_add_irq_chip(max77843->regmap, max77843->irq,
125 IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
126 0, &max77843_irq_chip, &max77843->irq_data);
127 if (ret) {
128 dev_err(&i2c->dev, "Failed to add TOPSYS IRQ chip\n");
129 return ret;
130 }
131
132 ret = regmap_read(max77843->regmap,
133 MAX77843_SYS_REG_PMICID, &reg_data);
134 if (ret < 0) {
135 dev_err(&i2c->dev, "Failed to read PMIC ID\n");
136 goto err_pmic_id;
137 }
138 dev_info(&i2c->dev, "device ID: 0x%x\n", reg_data);
139
140 ret = max77843_chg_init(max77843);
141 if (ret) {
142 dev_err(&i2c->dev, "Failed to init Charger\n");
143 goto err_pmic_id;
144 }
145
146 ret = regmap_update_bits(max77843->regmap,
147 MAX77843_SYS_REG_INTSRCMASK,
148 MAX77843_INTSRC_MASK_MASK,
149 (unsigned int)~MAX77843_INTSRC_MASK_MASK);
150 if (ret < 0) {
151 dev_err(&i2c->dev, "Failed to unmask interrupt source\n");
152 goto err_pmic_id;
153 }
154
155 ret = mfd_add_devices(max77843->dev, -1, max77843_devs,
156 ARRAY_SIZE(max77843_devs), NULL, 0, NULL);
157 if (ret < 0) {
158 dev_err(&i2c->dev, "Failed to add mfd device\n");
159 goto err_pmic_id;
160 }
161
162 device_init_wakeup(max77843->dev, true);
163
164 return 0;
165
166err_pmic_id:
167 regmap_del_irq_chip(max77843->irq, max77843->irq_data);
168
169 return ret;
170}
171
172static int max77843_remove(struct i2c_client *i2c)
173{
174 struct max77843 *max77843 = i2c_get_clientdata(i2c);
175
176 mfd_remove_devices(max77843->dev);
177
178 regmap_del_irq_chip(max77843->irq, max77843->irq_data);
179
180 i2c_unregister_device(max77843->i2c_chg);
181
182 return 0;
183}
184
185static const struct of_device_id max77843_dt_match[] = {
186 { .compatible = "maxim,max77843", },
187 { },
188};
189
190static const struct i2c_device_id max77843_id[] = {
191 { "max77843", },
192 { },
193};
194MODULE_DEVICE_TABLE(i2c, max77843_id);
195
196static int __maybe_unused max77843_suspend(struct device *dev)
197{
198 struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
199 struct max77843 *max77843 = i2c_get_clientdata(i2c);
200
201 disable_irq(max77843->irq);
202 if (device_may_wakeup(dev))
203 enable_irq_wake(max77843->irq);
204
205 return 0;
206}
207
208static int __maybe_unused max77843_resume(struct device *dev)
209{
210 struct i2c_client *i2c = container_of(dev, struct i2c_client, dev);
211 struct max77843 *max77843 = i2c_get_clientdata(i2c);
212
213 if (device_may_wakeup(dev))
214 disable_irq_wake(max77843->irq);
215 enable_irq(max77843->irq);
216
217 return 0;
218}
219
220static SIMPLE_DEV_PM_OPS(max77843_pm, max77843_suspend, max77843_resume);
221
222static struct i2c_driver max77843_i2c_driver = {
223 .driver = {
224 .name = "max77843",
225 .pm = &max77843_pm,
226 .of_match_table = max77843_dt_match,
227 },
228 .probe = max77843_probe,
229 .remove = max77843_remove,
230 .id_table = max77843_id,
231};
232
233static int __init max77843_i2c_init(void)
234{
235 return i2c_add_driver(&max77843_i2c_driver);
236}
237subsys_initcall(max77843_i2c_init);
238
239static void __exit max77843_i2c_exit(void)
240{
241 i2c_del_driver(&max77843_i2c_driver);
242}
243module_exit(max77843_i2c_exit);
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
index 64dde5d24b32..25fd7116493a 100644
--- a/drivers/mfd/mc13xxx-core.c
+++ b/drivers/mfd/mc13xxx-core.c
@@ -51,19 +51,19 @@
51void mc13xxx_lock(struct mc13xxx *mc13xxx) 51void mc13xxx_lock(struct mc13xxx *mc13xxx)
52{ 52{
53 if (!mutex_trylock(&mc13xxx->lock)) { 53 if (!mutex_trylock(&mc13xxx->lock)) {
54 dev_dbg(mc13xxx->dev, "wait for %s from %pf\n", 54 dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
55 __func__, __builtin_return_address(0)); 55 __func__, __builtin_return_address(0));
56 56
57 mutex_lock(&mc13xxx->lock); 57 mutex_lock(&mc13xxx->lock);
58 } 58 }
59 dev_dbg(mc13xxx->dev, "%s from %pf\n", 59 dev_dbg(mc13xxx->dev, "%s from %ps\n",
60 __func__, __builtin_return_address(0)); 60 __func__, __builtin_return_address(0));
61} 61}
62EXPORT_SYMBOL(mc13xxx_lock); 62EXPORT_SYMBOL(mc13xxx_lock);
63 63
64void mc13xxx_unlock(struct mc13xxx *mc13xxx) 64void mc13xxx_unlock(struct mc13xxx *mc13xxx)
65{ 65{
66 dev_dbg(mc13xxx->dev, "%s from %pf\n", 66 dev_dbg(mc13xxx->dev, "%s from %ps\n",
67 __func__, __builtin_return_address(0)); 67 __func__, __builtin_return_address(0));
68 mutex_unlock(&mc13xxx->lock); 68 mutex_unlock(&mc13xxx->lock);
69} 69}
diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c
index 9f01aef539dd..3ac36f5ccd3e 100644
--- a/drivers/mfd/menelaus.c
+++ b/drivers/mfd/menelaus.c
@@ -532,29 +532,6 @@ static const struct menelaus_vtg_value vcore_values[] = {
532 { 1450, 18 }, 532 { 1450, 18 },
533}; 533};
534 534
535int menelaus_set_vcore_sw(unsigned int mV)
536{
537 int val, ret;
538 struct i2c_client *c = the_menelaus->client;
539
540 val = menelaus_get_vtg_value(mV, vcore_values,
541 ARRAY_SIZE(vcore_values));
542 if (val < 0)
543 return -EINVAL;
544
545 dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val);
546
547 /* Set SW mode and the voltage in one go. */
548 mutex_lock(&the_menelaus->lock);
549 ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val);
550 if (ret == 0)
551 the_menelaus->vcore_hw_mode = 0;
552 mutex_unlock(&the_menelaus->lock);
553 msleep(1);
554
555 return ret;
556}
557
558int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) 535int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV)
559{ 536{
560 int fval, rval, val, ret; 537 int fval, rval, val, ret;
@@ -1239,7 +1216,7 @@ static int menelaus_probe(struct i2c_client *client,
1239 err = menelaus_read_reg(MENELAUS_VCORE_CTRL1); 1216 err = menelaus_read_reg(MENELAUS_VCORE_CTRL1);
1240 if (err < 0) 1217 if (err < 0)
1241 goto fail; 1218 goto fail;
1242 if (err & BIT(7)) 1219 if (err & VCORE_CTRL1_HW_NSW)
1243 menelaus->vcore_hw_mode = 1; 1220 menelaus->vcore_hw_mode = 1;
1244 else 1221 else
1245 menelaus->vcore_hw_mode = 0; 1222 menelaus->vcore_hw_mode = 0;
@@ -1259,7 +1236,7 @@ fail:
1259 return err; 1236 return err;
1260} 1237}
1261 1238
1262static int __exit menelaus_remove(struct i2c_client *client) 1239static int menelaus_remove(struct i2c_client *client)
1263{ 1240{
1264 struct menelaus_chip *menelaus = i2c_get_clientdata(client); 1241 struct menelaus_chip *menelaus = i2c_get_clientdata(client);
1265 1242
@@ -1280,7 +1257,7 @@ static struct i2c_driver menelaus_i2c_driver = {
1280 .name = DRIVER_NAME, 1257 .name = DRIVER_NAME,
1281 }, 1258 },
1282 .probe = menelaus_probe, 1259 .probe = menelaus_probe,
1283 .remove = __exit_p(menelaus_remove), 1260 .remove = menelaus_remove,
1284 .id_table = menelaus_id, 1261 .id_table = menelaus_id,
1285}; 1262};
1286 1263
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
index 2a87f69be53d..1aed3b7b8d9b 100644
--- a/drivers/mfd/mfd-core.c
+++ b/drivers/mfd/mfd-core.c
@@ -128,7 +128,7 @@ static int mfd_add_device(struct device *parent, int id,
128 int platform_id; 128 int platform_id;
129 int r; 129 int r;
130 130
131 if (id < 0) 131 if (id == PLATFORM_DEVID_AUTO)
132 platform_id = id; 132 platform_id = id;
133 else 133 else
134 platform_id = id + cell->id; 134 platform_id = id + cell->id;
diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
new file mode 100644
index 000000000000..09bc7804952a
--- /dev/null
+++ b/drivers/mfd/mt6397-core.c
@@ -0,0 +1,227 @@
1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Flora Fu, MediaTek
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
18#include <linux/of_irq.h>
19#include <linux/regmap.h>
20#include <linux/mfd/core.h>
21#include <linux/mfd/mt6397/core.h>
22#include <linux/mfd/mt6397/registers.h>
23
24static const struct mfd_cell mt6397_devs[] = {
25 {
26 .name = "mt6397-rtc",
27 .of_compatible = "mediatek,mt6397-rtc",
28 }, {
29 .name = "mt6397-regulator",
30 .of_compatible = "mediatek,mt6397-regulator",
31 }, {
32 .name = "mt6397-codec",
33 .of_compatible = "mediatek,mt6397-codec",
34 }, {
35 .name = "mt6397-clk",
36 .of_compatible = "mediatek,mt6397-clk",
37 },
38};
39
40static void mt6397_irq_lock(struct irq_data *data)
41{
42 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
43
44 mutex_lock(&mt6397->irqlock);
45}
46
47static void mt6397_irq_sync_unlock(struct irq_data *data)
48{
49 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
50
51 regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]);
52 regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]);
53
54 mutex_unlock(&mt6397->irqlock);
55}
56
57static void mt6397_irq_disable(struct irq_data *data)
58{
59 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
60 int shift = data->hwirq & 0xf;
61 int reg = data->hwirq >> 4;
62
63 mt6397->irq_masks_cur[reg] &= ~BIT(shift);
64}
65
66static void mt6397_irq_enable(struct irq_data *data)
67{
68 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq);
69 int shift = data->hwirq & 0xf;
70 int reg = data->hwirq >> 4;
71
72 mt6397->irq_masks_cur[reg] |= BIT(shift);
73}
74
75static struct irq_chip mt6397_irq_chip = {
76 .name = "mt6397-irq",
77 .irq_bus_lock = mt6397_irq_lock,
78 .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
79 .irq_enable = mt6397_irq_enable,
80 .irq_disable = mt6397_irq_disable,
81};
82
83static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
84 int irqbase)
85{
86 unsigned int status;
87 int i, irq, ret;
88
89 ret = regmap_read(mt6397->regmap, reg, &status);
90 if (ret) {
91 dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
92 return;
93 }
94
95 for (i = 0; i < 16; i++) {
96 if (status & BIT(i)) {
97 irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
98 if (irq)
99 handle_nested_irq(irq);
100 }
101 }
102
103 regmap_write(mt6397->regmap, reg, status);
104}
105
106static irqreturn_t mt6397_irq_thread(int irq, void *data)
107{
108 struct mt6397_chip *mt6397 = data;
109
110 mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0);
111 mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16);
112
113 return IRQ_HANDLED;
114}
115
116static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
117 irq_hw_number_t hw)
118{
119 struct mt6397_chip *mt6397 = d->host_data;
120
121 irq_set_chip_data(irq, mt6397);
122 irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
123 irq_set_nested_thread(irq, 1);
124#ifdef CONFIG_ARM
125 set_irq_flags(irq, IRQF_VALID);
126#else
127 irq_set_noprobe(irq);
128#endif
129
130 return 0;
131}
132
133static struct irq_domain_ops mt6397_irq_domain_ops = {
134 .map = mt6397_irq_domain_map,
135};
136
137static int mt6397_irq_init(struct mt6397_chip *mt6397)
138{
139 int ret;
140
141 mutex_init(&mt6397->irqlock);
142
143 /* Mask all interrupt sources */
144 regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0);
145 regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0);
146
147 mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
148 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
149 if (!mt6397->irq_domain) {
150 dev_err(mt6397->dev, "could not create irq domain\n");
151 return -ENOMEM;
152 }
153
154 ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL,
155 mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397);
156 if (ret) {
157 dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n",
158 mt6397->irq, ret);
159 return ret;
160 }
161
162 return 0;
163}
164
165static int mt6397_probe(struct platform_device *pdev)
166{
167 int ret;
168 struct mt6397_chip *mt6397;
169
170 mt6397 = devm_kzalloc(&pdev->dev, sizeof(*mt6397), GFP_KERNEL);
171 if (!mt6397)
172 return -ENOMEM;
173
174 mt6397->dev = &pdev->dev;
175 /*
176 * mt6397 MFD is child device of soc pmic wrapper.
177 * Regmap is set from its parent.
178 */
179 mt6397->regmap = dev_get_regmap(pdev->dev.parent, NULL);
180 if (!mt6397->regmap)
181 return -ENODEV;
182
183 platform_set_drvdata(pdev, mt6397);
184
185 mt6397->irq = platform_get_irq(pdev, 0);
186 if (mt6397->irq > 0) {
187 ret = mt6397_irq_init(mt6397);
188 if (ret)
189 return ret;
190 }
191
192 ret = mfd_add_devices(&pdev->dev, -1, mt6397_devs,
193 ARRAY_SIZE(mt6397_devs), NULL, 0, NULL);
194 if (ret)
195 dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
196
197 return ret;
198}
199
200static int mt6397_remove(struct platform_device *pdev)
201{
202 mfd_remove_devices(&pdev->dev);
203
204 return 0;
205}
206
207static const struct of_device_id mt6397_of_match[] = {
208 { .compatible = "mediatek,mt6397" },
209 { }
210};
211MODULE_DEVICE_TABLE(of, mt6397_of_match);
212
213static struct platform_driver mt6397_driver = {
214 .probe = mt6397_probe,
215 .remove = mt6397_remove,
216 .driver = {
217 .name = "mt6397",
218 .of_match_table = of_match_ptr(mt6397_of_match),
219 },
220};
221
222module_platform_driver(mt6397_driver);
223
224MODULE_AUTHOR("Flora Fu, MediaTek");
225MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
226MODULE_LICENSE("GPL");
227MODULE_ALIAS("platform:mt6397");
diff --git a/drivers/mfd/qcom-spmi-pmic.c b/drivers/mfd/qcom-spmi-pmic.c
index 4b8beb2a1579..af6ac1c4b45c 100644
--- a/drivers/mfd/qcom-spmi-pmic.c
+++ b/drivers/mfd/qcom-spmi-pmic.c
@@ -17,6 +17,100 @@
17#include <linux/regmap.h> 17#include <linux/regmap.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19 19
20#define PMIC_REV2 0x101
21#define PMIC_REV3 0x102
22#define PMIC_REV4 0x103
23#define PMIC_TYPE 0x104
24#define PMIC_SUBTYPE 0x105
25
26#define PMIC_TYPE_VALUE 0x51
27
28#define COMMON_SUBTYPE 0x00
29#define PM8941_SUBTYPE 0x01
30#define PM8841_SUBTYPE 0x02
31#define PM8019_SUBTYPE 0x03
32#define PM8226_SUBTYPE 0x04
33#define PM8110_SUBTYPE 0x05
34#define PMA8084_SUBTYPE 0x06
35#define PMI8962_SUBTYPE 0x07
36#define PMD9635_SUBTYPE 0x08
37#define PM8994_SUBTYPE 0x09
38#define PMI8994_SUBTYPE 0x0a
39#define PM8916_SUBTYPE 0x0b
40#define PM8004_SUBTYPE 0x0c
41#define PM8909_SUBTYPE 0x0d
42
43static const struct of_device_id pmic_spmi_id_table[] = {
44 { .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
45 { .compatible = "qcom,pm8941", .data = (void *)PM8941_SUBTYPE },
46 { .compatible = "qcom,pm8841", .data = (void *)PM8841_SUBTYPE },
47 { .compatible = "qcom,pm8019", .data = (void *)PM8019_SUBTYPE },
48 { .compatible = "qcom,pm8226", .data = (void *)PM8226_SUBTYPE },
49 { .compatible = "qcom,pm8110", .data = (void *)PM8110_SUBTYPE },
50 { .compatible = "qcom,pma8084", .data = (void *)PMA8084_SUBTYPE },
51 { .compatible = "qcom,pmi8962", .data = (void *)PMI8962_SUBTYPE },
52 { .compatible = "qcom,pmd9635", .data = (void *)PMD9635_SUBTYPE },
53 { .compatible = "qcom,pm8994", .data = (void *)PM8994_SUBTYPE },
54 { .compatible = "qcom,pmi8994", .data = (void *)PMI8994_SUBTYPE },
55 { .compatible = "qcom,pm8916", .data = (void *)PM8916_SUBTYPE },
56 { .compatible = "qcom,pm8004", .data = (void *)PM8004_SUBTYPE },
57 { .compatible = "qcom,pm8909", .data = (void *)PM8909_SUBTYPE },
58 { }
59};
60
61static void pmic_spmi_show_revid(struct regmap *map, struct device *dev)
62{
63 unsigned int rev2, minor, major, type, subtype;
64 const char *name = "unknown";
65 int ret, i;
66
67 ret = regmap_read(map, PMIC_TYPE, &type);
68 if (ret < 0)
69 return;
70
71 if (type != PMIC_TYPE_VALUE)
72 return;
73
74 ret = regmap_read(map, PMIC_SUBTYPE, &subtype);
75 if (ret < 0)
76 return;
77
78 for (i = 0; i < ARRAY_SIZE(pmic_spmi_id_table); i++) {
79 if (subtype == (unsigned long)pmic_spmi_id_table[i].data)
80 break;
81 }
82
83 if (i != ARRAY_SIZE(pmic_spmi_id_table))
84 name = pmic_spmi_id_table[i].compatible;
85
86 ret = regmap_read(map, PMIC_REV2, &rev2);
87 if (ret < 0)
88 return;
89
90 ret = regmap_read(map, PMIC_REV3, &minor);
91 if (ret < 0)
92 return;
93
94 ret = regmap_read(map, PMIC_REV4, &major);
95 if (ret < 0)
96 return;
97
98 /*
99 * In early versions of PM8941 and PM8226, the major revision number
100 * started incrementing from 0 (eg 0 = v1.0, 1 = v2.0).
101 * Increment the major revision number here if the chip is an early
102 * version of PM8941 or PM8226.
103 */
104 if ((subtype == PM8941_SUBTYPE || subtype == PM8226_SUBTYPE) &&
105 major < 0x02)
106 major++;
107
108 if (subtype == PM8110_SUBTYPE)
109 minor = rev2;
110
111 dev_dbg(dev, "%x: %s v%d.%d\n", subtype, name, major, minor);
112}
113
20static const struct regmap_config spmi_regmap_config = { 114static const struct regmap_config spmi_regmap_config = {
21 .reg_bits = 16, 115 .reg_bits = 16,
22 .val_bits = 8, 116 .val_bits = 8,
@@ -33,6 +127,8 @@ static int pmic_spmi_probe(struct spmi_device *sdev)
33 if (IS_ERR(regmap)) 127 if (IS_ERR(regmap))
34 return PTR_ERR(regmap); 128 return PTR_ERR(regmap);
35 129
130 pmic_spmi_show_revid(regmap, &sdev->dev);
131
36 return of_platform_populate(root, NULL, NULL, &sdev->dev); 132 return of_platform_populate(root, NULL, NULL, &sdev->dev);
37} 133}
38 134
@@ -41,13 +137,6 @@ static void pmic_spmi_remove(struct spmi_device *sdev)
41 of_platform_depopulate(&sdev->dev); 137 of_platform_depopulate(&sdev->dev);
42} 138}
43 139
44static const struct of_device_id pmic_spmi_id_table[] = {
45 { .compatible = "qcom,spmi-pmic" },
46 { .compatible = "qcom,pm8941" },
47 { .compatible = "qcom,pm8841" },
48 { .compatible = "qcom,pma8084" },
49 { }
50};
51MODULE_DEVICE_TABLE(of, pmic_spmi_id_table); 140MODULE_DEVICE_TABLE(of, pmic_spmi_id_table);
52 141
53static struct spmi_driver pmic_spmi_driver = { 142static struct spmi_driver pmic_spmi_driver = {
diff --git a/drivers/mfd/qcom_rpm.c b/drivers/mfd/qcom_rpm.c
index f696328c2933..12e324319573 100644
--- a/drivers/mfd/qcom_rpm.c
+++ b/drivers/mfd/qcom_rpm.c
@@ -323,10 +323,51 @@ static const struct qcom_rpm_data msm8960_template = {
323 .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table), 323 .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
324}; 324};
325 325
326static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
327 [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
328 [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
329 [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
330 [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
331 [QCOM_RPM_NSS_FABRIC_0_CLK] = { 29, 13, 10, 1 },
332 [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
333 [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
334 [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
335 [QCOM_RPM_NSS_FABRIC_1_CLK] = { 33, 17, 14, 1 },
336 [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
337 [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 2 },
338 [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 3 },
339 [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
340 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
341 [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 2 },
342 [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 3 },
343 [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
344 [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 },
345 [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 2 },
346 [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 3 },
347 [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 },
348 [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 2 },
349 [QCOM_RPM_CXO_BUFFERS] = { 209, 33, 31, 1 },
350 [QCOM_RPM_USB_OTG_SWITCH] = { 210, 34, 32, 1 },
351 [QCOM_RPM_HDMI_SWITCH] = { 211, 35, 33, 1 },
352 [QCOM_RPM_DDR_DMM] = { 212, 36, 34, 2 },
353 [QCOM_RPM_VDDMIN_GPIO] = { 215, 40, 39, 1 },
354 [QCOM_RPM_SMB208_S1a] = { 216, 41, 90, 2 },
355 [QCOM_RPM_SMB208_S1b] = { 218, 43, 91, 2 },
356 [QCOM_RPM_SMB208_S2a] = { 220, 45, 92, 2 },
357 [QCOM_RPM_SMB208_S2b] = { 222, 47, 93, 2 },
358};
359
360static const struct qcom_rpm_data ipq806x_template = {
361 .version = 3,
362 .resource_table = ipq806x_rpm_resource_table,
363 .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
364};
365
326static const struct of_device_id qcom_rpm_of_match[] = { 366static const struct of_device_id qcom_rpm_of_match[] = {
327 { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template }, 367 { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
328 { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template }, 368 { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
329 { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template }, 369 { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
370 { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
330 { } 371 { }
331}; 372};
332MODULE_DEVICE_TABLE(of, qcom_rpm_of_match); 373MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index bd0215069875..4b1e4399754b 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -89,6 +89,7 @@ static const struct rk808_reg_data pre_init_reg[] = {
89 { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA }, 89 { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
90 { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA }, 90 { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA },
91 { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA }, 91 { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA },
92 { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
92 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT | 93 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
93 VB_LO_SEL_3500MV }, 94 VB_LO_SEL_3500MV },
94}; 95};
@@ -245,7 +246,7 @@ static int rk808_remove(struct i2c_client *client)
245 return 0; 246 return 0;
246} 247}
247 248
248static struct of_device_id rk808_of_match[] = { 249static const struct of_device_id rk808_of_match[] = {
249 { .compatible = "rockchip,rk808" }, 250 { .compatible = "rockchip,rk808" },
250 { }, 251 { },
251}; 252};
diff --git a/drivers/mfd/rtl8411.c b/drivers/mfd/rtl8411.c
index fdd34c883d86..b3ae6592014a 100644
--- a/drivers/mfd/rtl8411.c
+++ b/drivers/mfd/rtl8411.c
@@ -53,7 +53,7 @@ static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr)
53 u8 reg3 = 0; 53 u8 reg3 = 0;
54 54
55 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg1); 55 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg1);
56 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); 56 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1);
57 57
58 if (!rtsx_vendor_setting_valid(reg1)) 58 if (!rtsx_vendor_setting_valid(reg1))
59 return; 59 return;
@@ -65,7 +65,7 @@ static void rtl8411_fetch_vendor_settings(struct rtsx_pcr *pcr)
65 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1); 65 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg1);
66 66
67 rtsx_pci_read_config_byte(pcr, PCR_SETTING_REG3, &reg3); 67 rtsx_pci_read_config_byte(pcr, PCR_SETTING_REG3, &reg3);
68 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3); 68 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3);
69 pcr->sd30_drive_sel_3v3 = rtl8411_reg_to_sd30_drive_sel_3v3(reg3); 69 pcr->sd30_drive_sel_3v3 = rtl8411_reg_to_sd30_drive_sel_3v3(reg3);
70} 70}
71 71
@@ -74,7 +74,7 @@ static void rtl8411b_fetch_vendor_settings(struct rtsx_pcr *pcr)
74 u32 reg = 0; 74 u32 reg = 0;
75 75
76 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); 76 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
77 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); 77 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
78 78
79 if (!rtsx_vendor_setting_valid(reg)) 79 if (!rtsx_vendor_setting_valid(reg))
80 return; 80 return;
@@ -260,9 +260,8 @@ static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr)
260 rtsx_pci_write_register(pcr, CARD_PWR_CTL, 260 rtsx_pci_write_register(pcr, CARD_PWR_CTL,
261 BPP_POWER_MASK, BPP_POWER_OFF); 261 BPP_POWER_MASK, BPP_POWER_OFF);
262 262
263 dev_dbg(&(pcr->pci->dev), 263 pcr_dbg(pcr, "After CD deglitch, card_exist = 0x%x\n",
264 "After CD deglitch, card_exist = 0x%x\n", 264 card_exist);
265 card_exist);
266 } 265 }
267 266
268 if (card_exist & MS_EXIST) { 267 if (card_exist & MS_EXIST) {
diff --git a/drivers/mfd/rts5209.c b/drivers/mfd/rts5209.c
index cb04174a8924..373e253c33df 100644
--- a/drivers/mfd/rts5209.c
+++ b/drivers/mfd/rts5209.c
@@ -38,7 +38,7 @@ static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
38 u32 reg; 38 u32 reg;
39 39
40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); 40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
41 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); 41 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
42 42
43 if (rts5209_vendor_setting1_valid(reg)) { 43 if (rts5209_vendor_setting1_valid(reg)) {
44 if (rts5209_reg_check_ms_pmos(reg)) 44 if (rts5209_reg_check_ms_pmos(reg))
@@ -47,7 +47,7 @@ static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
47 } 47 }
48 48
49 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); 49 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
50 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); 50 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
51 51
52 if (rts5209_vendor_setting2_valid(reg)) { 52 if (rts5209_vendor_setting2_valid(reg)) {
53 pcr->sd30_drive_sel_1v8 = 53 pcr->sd30_drive_sel_1v8 =
diff --git a/drivers/mfd/rts5227.c b/drivers/mfd/rts5227.c
index 32407404d838..ce012d78ce2a 100644
--- a/drivers/mfd/rts5227.c
+++ b/drivers/mfd/rts5227.c
@@ -63,7 +63,7 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)
63 u32 reg; 63 u32 reg;
64 64
65 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); 65 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
66 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); 66 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
67 67
68 if (!rtsx_vendor_setting_valid(reg)) 68 if (!rtsx_vendor_setting_valid(reg))
69 return; 69 return;
@@ -74,7 +74,7 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)
74 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); 74 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
75 75
76 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); 76 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
77 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); 77 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
78 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); 78 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
79 if (rtsx_reg_check_reverse_socket(reg)) 79 if (rtsx_reg_check_reverse_socket(reg))
80 pcr->flags |= PCR_REVERSE_SOCKET; 80 pcr->flags |= PCR_REVERSE_SOCKET;
@@ -118,11 +118,9 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
118 rts5227_fill_driving(pcr, OUTPUT_3V3); 118 rts5227_fill_driving(pcr, OUTPUT_3V3);
119 /* Configure force_clock_req */ 119 /* Configure force_clock_req */
120 if (pcr->flags & PCR_REVERSE_SOCKET) 120 if (pcr->flags & PCR_REVERSE_SOCKET)
121 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 121 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0xB8);
122 AUTOLOAD_CFG_BASE + 3, 0xB8, 0xB8);
123 else 122 else
124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 123 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB8, 0x88);
125 AUTOLOAD_CFG_BASE + 3, 0xB8, 0x88);
126 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00); 124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00);
127 125
128 return rtsx_pci_send_cmd(pcr, 100); 126 return rtsx_pci_send_cmd(pcr, 100);
@@ -132,7 +130,7 @@ static int rts5227_optimize_phy(struct rtsx_pcr *pcr)
132{ 130{
133 int err; 131 int err;
134 132
135 err = rtsx_gops_pm_reset(pcr); 133 err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
136 if (err < 0) 134 if (err < 0)
137 return err; 135 return err;
138 136
diff --git a/drivers/mfd/rts5229.c b/drivers/mfd/rts5229.c
index 6353f5df087a..ace45384ec8b 100644
--- a/drivers/mfd/rts5229.c
+++ b/drivers/mfd/rts5229.c
@@ -38,7 +38,7 @@ static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
38 u32 reg; 38 u32 reg;
39 39
40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); 40 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
41 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); 41 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
42 42
43 if (!rtsx_vendor_setting_valid(reg)) 43 if (!rtsx_vendor_setting_valid(reg))
44 return; 44 return;
@@ -50,7 +50,7 @@ static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
50 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); 50 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
51 51
52 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); 52 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
53 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); 53 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
54 pcr->sd30_drive_sel_3v3 = 54 pcr->sd30_drive_sel_3v3 =
55 map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg)); 55 map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
56} 56}
diff --git a/drivers/mfd/rts5249.c b/drivers/mfd/rts5249.c
index cf425cc959d5..eb2d5866f719 100644
--- a/drivers/mfd/rts5249.c
+++ b/drivers/mfd/rts5249.c
@@ -36,16 +36,16 @@ static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr)
36static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage) 36static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
37{ 37{
38 u8 driving_3v3[4][3] = { 38 u8 driving_3v3[4][3] = {
39 {0x11, 0x11, 0x11}, 39 {0x11, 0x11, 0x18},
40 {0x55, 0x55, 0x5C}, 40 {0x55, 0x55, 0x5C},
41 {0x99, 0x99, 0x92}, 41 {0xFF, 0xFF, 0xFF},
42 {0x99, 0x99, 0x92}, 42 {0x96, 0x96, 0x96},
43 }; 43 };
44 u8 driving_1v8[4][3] = { 44 u8 driving_1v8[4][3] = {
45 {0xC4, 0xC4, 0xC4},
45 {0x3C, 0x3C, 0x3C}, 46 {0x3C, 0x3C, 0x3C},
46 {0xB3, 0xB3, 0xB3},
47 {0xFE, 0xFE, 0xFE}, 47 {0xFE, 0xFE, 0xFE},
48 {0xC4, 0xC4, 0xC4}, 48 {0xB3, 0xB3, 0xB3},
49 }; 49 };
50 u8 (*driving)[3], drive_sel; 50 u8 (*driving)[3], drive_sel;
51 51
@@ -65,15 +65,17 @@ static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
65 0xFF, driving[drive_sel][2]); 65 0xFF, driving[drive_sel][2]);
66} 66}
67 67
68static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr) 68static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
69{ 69{
70 u32 reg; 70 u32 reg;
71 71
72 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg); 72 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
73 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); 73 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
74 74
75 if (!rtsx_vendor_setting_valid(reg)) 75 if (!rtsx_vendor_setting_valid(reg)) {
76 pcr_dbg(pcr, "skip fetch vendor setting\n");
76 return; 77 return;
78 }
77 79
78 pcr->aspm_en = rtsx_reg_to_aspm(reg); 80 pcr->aspm_en = rtsx_reg_to_aspm(reg);
79 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg); 81 pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);
@@ -81,13 +83,13 @@ static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr)
81 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg); 83 pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
82 84
83 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg); 85 rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
84 dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); 86 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
85 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg); 87 pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
86 if (rtsx_reg_check_reverse_socket(reg)) 88 if (rtsx_reg_check_reverse_socket(reg))
87 pcr->flags |= PCR_REVERSE_SOCKET; 89 pcr->flags |= PCR_REVERSE_SOCKET;
88} 90}
89 91
90static void rts5249_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) 92static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
91{ 93{
92 /* Set relink_time to 0 */ 94 /* Set relink_time to 0 */
93 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, 0xFF, 0); 95 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, 0xFF, 0);
@@ -95,7 +97,8 @@ static void rts5249_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
95 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0); 97 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, 0x01, 0);
96 98
97 if (pm_state == HOST_ENTER_S3) 99 if (pm_state == HOST_ENTER_S3)
98 rtsx_pci_write_register(pcr, PM_CTRL3, 0x10, 0x10); 100 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3,
101 D3_DELINK_MODE_EN, D3_DELINK_MODE_EN);
99 102
100 rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03); 103 rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
101} 104}
@@ -104,6 +107,8 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
104{ 107{
105 rtsx_pci_init_cmd(pcr); 108 rtsx_pci_init_cmd(pcr);
106 109
110 /* Rest L1SUB Config */
111 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00);
107 /* Configure GPIO as output */ 112 /* Configure GPIO as output */
108 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); 113 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
109 /* Reset ASPM state to default value */ 114 /* Reset ASPM state to default value */
@@ -116,12 +121,9 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
116 /* Configure driving */ 121 /* Configure driving */
117 rts5249_fill_driving(pcr, OUTPUT_3V3); 122 rts5249_fill_driving(pcr, OUTPUT_3V3);
118 if (pcr->flags & PCR_REVERSE_SOCKET) 123 if (pcr->flags & PCR_REVERSE_SOCKET)
119 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0);
120 AUTOLOAD_CFG_BASE + 3, 0xB0, 0xB0);
121 else 125 else
122 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, 126 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80);
123 AUTOLOAD_CFG_BASE + 3, 0xB0, 0x80);
124 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x10, 0x00);
125 127
126 return rtsx_pci_send_cmd(pcr, 100); 128 return rtsx_pci_send_cmd(pcr, 100);
127} 129}
@@ -130,15 +132,16 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
130{ 132{
131 int err; 133 int err;
132 134
133 err = rtsx_gops_pm_reset(pcr); 135 err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
134 if (err < 0) 136 if (err < 0)
135 return err; 137 return err;
136 138
137 err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, 139 err = rtsx_pci_write_phy_register(pcr, PHY_REV,
138 PHY_REG_REV_RESV | PHY_REG_REV_RXIDLE_LATCHED | 140 PHY_REV_RESV | PHY_REV_RXIDLE_LATCHED |
139 PHY_REG_REV_P1_EN | PHY_REG_REV_RXIDLE_EN | 141 PHY_REV_P1_EN | PHY_REV_RXIDLE_EN |
140 PHY_REG_REV_RX_PWST | PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 | 142 PHY_REV_CLKREQ_TX_EN | PHY_REV_RX_PWST |
141 PHY_REG_REV_STOP_CLKRD | PHY_REG_REV_STOP_CLKWR); 143 PHY_REV_CLKREQ_DT_1_0 | PHY_REV_STOP_CLKRD |
144 PHY_REV_STOP_CLKWR);
142 if (err < 0) 145 if (err < 0)
143 return err; 146 return err;
144 147
@@ -149,19 +152,21 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
149 PHY_BPCR_IB_FILTER | PHY_BPCR_CMIRROR_EN); 152 PHY_BPCR_IB_FILTER | PHY_BPCR_CMIRROR_EN);
150 if (err < 0) 153 if (err < 0)
151 return err; 154 return err;
155
152 err = rtsx_pci_write_phy_register(pcr, PHY_PCR, 156 err = rtsx_pci_write_phy_register(pcr, PHY_PCR,
153 PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 | 157 PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 |
154 PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | 158 PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 |
155 PHY_PCR_RSSI_EN); 159 PHY_PCR_RSSI_EN | PHY_PCR_RX10K);
156 if (err < 0) 160 if (err < 0)
157 return err; 161 return err;
162
158 err = rtsx_pci_write_phy_register(pcr, PHY_RCR2, 163 err = rtsx_pci_write_phy_register(pcr, PHY_RCR2,
159 PHY_RCR2_EMPHASE_EN | PHY_RCR2_NADJR | 164 PHY_RCR2_EMPHASE_EN | PHY_RCR2_NADJR |
160 PHY_RCR2_CDR_CP_10 | PHY_RCR2_CDR_SR_2 | 165 PHY_RCR2_CDR_SR_2 | PHY_RCR2_FREQSEL_12 |
161 PHY_RCR2_FREQSEL_12 | PHY_RCR2_CPADJEN | 166 PHY_RCR2_CDR_SC_12P | PHY_RCR2_CALIB_LATE);
162 PHY_RCR2_CDR_SC_8 | PHY_RCR2_CALIB_LATE);
163 if (err < 0) 167 if (err < 0)
164 return err; 168 return err;
169
165 err = rtsx_pci_write_phy_register(pcr, PHY_FLD4, 170 err = rtsx_pci_write_phy_register(pcr, PHY_FLD4,
166 PHY_FLD4_FLDEN_SEL | PHY_FLD4_REQ_REF | 171 PHY_FLD4_FLDEN_SEL | PHY_FLD4_REQ_REF |
167 PHY_FLD4_RXAMP_OFF | PHY_FLD4_REQ_ADDA | 172 PHY_FLD4_RXAMP_OFF | PHY_FLD4_REQ_ADDA |
@@ -169,11 +174,12 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
169 PHY_FLD4_BER_CHK_EN); 174 PHY_FLD4_BER_CHK_EN);
170 if (err < 0) 175 if (err < 0)
171 return err; 176 return err;
172 err = rtsx_pci_write_phy_register(pcr, PHY_RDR, PHY_RDR_RXDSEL_1_9); 177 err = rtsx_pci_write_phy_register(pcr, PHY_RDR,
178 PHY_RDR_RXDSEL_1_9 | PHY_SSC_AUTO_PWD);
173 if (err < 0) 179 if (err < 0)
174 return err; 180 return err;
175 err = rtsx_pci_write_phy_register(pcr, PHY_RCR1, 181 err = rtsx_pci_write_phy_register(pcr, PHY_RCR1,
176 PHY_RCR1_ADP_TIME | PHY_RCR1_VCO_COARSE); 182 PHY_RCR1_ADP_TIME_4 | PHY_RCR1_VCO_COARSE);
177 if (err < 0) 183 if (err < 0)
178 return err; 184 return err;
179 err = rtsx_pci_write_phy_register(pcr, PHY_FLD3, 185 err = rtsx_pci_write_phy_register(pcr, PHY_FLD3,
@@ -181,33 +187,34 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
181 PHY_FLD3_RXDELINK); 187 PHY_FLD3_RXDELINK);
182 if (err < 0) 188 if (err < 0)
183 return err; 189 return err;
190
184 return rtsx_pci_write_phy_register(pcr, PHY_TUNE, 191 return rtsx_pci_write_phy_register(pcr, PHY_TUNE,
185 PHY_TUNE_TUNEREF_1_0 | PHY_TUNE_VBGSEL_1252 | 192 PHY_TUNE_TUNEREF_1_0 | PHY_TUNE_VBGSEL_1252 |
186 PHY_TUNE_SDBUS_33 | PHY_TUNE_TUNED18 | 193 PHY_TUNE_SDBUS_33 | PHY_TUNE_TUNED18 |
187 PHY_TUNE_TUNED12); 194 PHY_TUNE_TUNED12 | PHY_TUNE_TUNEA12);
188} 195}
189 196
190static int rts5249_turn_on_led(struct rtsx_pcr *pcr) 197static int rtsx_base_turn_on_led(struct rtsx_pcr *pcr)
191{ 198{
192 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02); 199 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
193} 200}
194 201
195static int rts5249_turn_off_led(struct rtsx_pcr *pcr) 202static int rtsx_base_turn_off_led(struct rtsx_pcr *pcr)
196{ 203{
197 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00); 204 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
198} 205}
199 206
200static int rts5249_enable_auto_blink(struct rtsx_pcr *pcr) 207static int rtsx_base_enable_auto_blink(struct rtsx_pcr *pcr)
201{ 208{
202 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08); 209 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
203} 210}
204 211
205static int rts5249_disable_auto_blink(struct rtsx_pcr *pcr) 212static int rtsx_base_disable_auto_blink(struct rtsx_pcr *pcr)
206{ 213{
207 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00); 214 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
208} 215}
209 216
210static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card) 217static int rtsx_base_card_power_on(struct rtsx_pcr *pcr, int card)
211{ 218{
212 int err; 219 int err;
213 220
@@ -234,7 +241,7 @@ static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card)
234 return 0; 241 return 0;
235} 242}
236 243
237static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card) 244static int rtsx_base_card_power_off(struct rtsx_pcr *pcr, int card)
238{ 245{
239 rtsx_pci_init_cmd(pcr); 246 rtsx_pci_init_cmd(pcr);
240 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, 247 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
@@ -244,22 +251,35 @@ static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card)
244 return rtsx_pci_send_cmd(pcr, 100); 251 return rtsx_pci_send_cmd(pcr, 100);
245} 252}
246 253
247static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) 254static int rtsx_base_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
248{ 255{
249 int err; 256 int err;
257 u16 append;
250 258
251 if (voltage == OUTPUT_3V3) { 259 switch (voltage) {
252 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4FC0 | 0x24); 260 case OUTPUT_3V3:
261 err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK,
262 PHY_TUNE_VOLTAGE_3V3);
253 if (err < 0) 263 if (err < 0)
254 return err; 264 return err;
255 } else if (voltage == OUTPUT_1V8) { 265 break;
256 err = rtsx_pci_write_phy_register(pcr, PHY_BACR, 0x3C02); 266 case OUTPUT_1V8:
267 append = PHY_TUNE_D18_1V8;
268 if (CHK_PCI_PID(pcr, 0x5249)) {
269 err = rtsx_pci_update_phy(pcr, PHY_BACR,
270 PHY_BACR_BASIC_MASK, 0);
271 if (err < 0)
272 return err;
273 append = PHY_TUNE_D18_1V7;
274 }
275
276 err = rtsx_pci_update_phy(pcr, PHY_TUNE, PHY_TUNE_VOLTAGE_MASK,
277 append);
257 if (err < 0) 278 if (err < 0)
258 return err; 279 return err;
259 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4C40 | 0x24); 280 break;
260 if (err < 0) 281 default:
261 return err; 282 pcr_dbg(pcr, "unknown output voltage %d\n", voltage);
262 } else {
263 return -EINVAL; 283 return -EINVAL;
264 } 284 }
265 285
@@ -270,17 +290,17 @@ static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
270} 290}
271 291
272static const struct pcr_ops rts5249_pcr_ops = { 292static const struct pcr_ops rts5249_pcr_ops = {
273 .fetch_vendor_settings = rts5249_fetch_vendor_settings, 293 .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
274 .extra_init_hw = rts5249_extra_init_hw, 294 .extra_init_hw = rts5249_extra_init_hw,
275 .optimize_phy = rts5249_optimize_phy, 295 .optimize_phy = rts5249_optimize_phy,
276 .turn_on_led = rts5249_turn_on_led, 296 .turn_on_led = rtsx_base_turn_on_led,
277 .turn_off_led = rts5249_turn_off_led, 297 .turn_off_led = rtsx_base_turn_off_led,
278 .enable_auto_blink = rts5249_enable_auto_blink, 298 .enable_auto_blink = rtsx_base_enable_auto_blink,
279 .disable_auto_blink = rts5249_disable_auto_blink, 299 .disable_auto_blink = rtsx_base_disable_auto_blink,
280 .card_power_on = rts5249_card_power_on, 300 .card_power_on = rtsx_base_card_power_on,
281 .card_power_off = rts5249_card_power_off, 301 .card_power_off = rtsx_base_card_power_off,
282 .switch_output_voltage = rts5249_switch_output_voltage, 302 .switch_output_voltage = rtsx_base_switch_output_voltage,
283 .force_power_down = rts5249_force_power_down, 303 .force_power_down = rtsx_base_force_power_down,
284}; 304};
285 305
286/* SD Pull Control Enable: 306/* SD Pull Control Enable:
@@ -343,7 +363,7 @@ void rts5249_init_params(struct rtsx_pcr *pcr)
343 363
344 pcr->flags = 0; 364 pcr->flags = 0;
345 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; 365 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
346 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C; 366 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;
347 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; 367 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;
348 pcr->aspm_en = ASPM_L1_EN; 368 pcr->aspm_en = ASPM_L1_EN;
349 pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16); 369 pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16);
@@ -354,4 +374,219 @@ void rts5249_init_params(struct rtsx_pcr *pcr)
354 pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl; 374 pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl;
355 pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl; 375 pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl;
356 pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl; 376 pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl;
377
378 pcr->reg_pm_ctrl3 = PM_CTRL3;
379}
380
381static int rts524a_write_phy(struct rtsx_pcr *pcr, u8 addr, u16 val)
382{
383 addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr;
384
385 return __rtsx_pci_write_phy_register(pcr, addr, val);
386}
387
388static int rts524a_read_phy(struct rtsx_pcr *pcr, u8 addr, u16 *val)
389{
390 addr = addr & 0x80 ? (addr & 0x7F) | 0x40 : addr;
391
392 return __rtsx_pci_read_phy_register(pcr, addr, val);
357} 393}
394
395static int rts524a_optimize_phy(struct rtsx_pcr *pcr)
396{
397 int err;
398
399 err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3,
400 D3_DELINK_MODE_EN, 0x00);
401 if (err < 0)
402 return err;
403
404 rtsx_pci_write_phy_register(pcr, PHY_PCR,
405 PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 |
406 PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | PHY_PCR_RSSI_EN);
407 rtsx_pci_write_phy_register(pcr, PHY_SSCCR3,
408 PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY);
409
410 if (is_version(pcr, 0x524A, IC_VER_A)) {
411 rtsx_pci_write_phy_register(pcr, PHY_SSCCR3,
412 PHY_SSCCR3_STEP_IN | PHY_SSCCR3_CHECK_DELAY);
413 rtsx_pci_write_phy_register(pcr, PHY_SSCCR2,
414 PHY_SSCCR2_PLL_NCODE | PHY_SSCCR2_TIME0 |
415 PHY_SSCCR2_TIME2_WIDTH);
416 rtsx_pci_write_phy_register(pcr, PHY_ANA1A,
417 PHY_ANA1A_TXR_LOOPBACK | PHY_ANA1A_RXT_BIST |
418 PHY_ANA1A_TXR_BIST | PHY_ANA1A_REV);
419 rtsx_pci_write_phy_register(pcr, PHY_ANA1D,
420 PHY_ANA1D_DEBUG_ADDR);
421 rtsx_pci_write_phy_register(pcr, PHY_DIG1E,
422 PHY_DIG1E_REV | PHY_DIG1E_D0_X_D1 |
423 PHY_DIG1E_RX_ON_HOST | PHY_DIG1E_RCLK_REF_HOST |
424 PHY_DIG1E_RCLK_TX_EN_KEEP |
425 PHY_DIG1E_RCLK_TX_TERM_KEEP |
426 PHY_DIG1E_RCLK_RX_EIDLE_ON | PHY_DIG1E_TX_TERM_KEEP |
427 PHY_DIG1E_RX_TERM_KEEP | PHY_DIG1E_TX_EN_KEEP |
428 PHY_DIG1E_RX_EN_KEEP);
429 }
430
431 rtsx_pci_write_phy_register(pcr, PHY_ANA08,
432 PHY_ANA08_RX_EQ_DCGAIN | PHY_ANA08_SEL_RX_EN |
433 PHY_ANA08_RX_EQ_VAL | PHY_ANA08_SCP | PHY_ANA08_SEL_IPI);
434
435 return 0;
436}
437
438static int rts524a_extra_init_hw(struct rtsx_pcr *pcr)
439{
440 rts5249_extra_init_hw(pcr);
441
442 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL,
443 FORCE_ASPM_L1_EN, FORCE_ASPM_L1_EN);
444 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0);
445 rtsx_pci_write_register(pcr, LDO_VCC_CFG1, LDO_VCC_LMT_EN,
446 LDO_VCC_LMT_EN);
447 rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL);
448 if (is_version(pcr, 0x524A, IC_VER_A)) {
449 rtsx_pci_write_register(pcr, LDO_DV18_CFG,
450 LDO_DV18_SR_MASK, LDO_DV18_SR_DF);
451 rtsx_pci_write_register(pcr, LDO_VCC_CFG1,
452 LDO_VCC_REF_TUNE_MASK, LDO_VCC_REF_1V2);
453 rtsx_pci_write_register(pcr, LDO_VIO_CFG,
454 LDO_VIO_REF_TUNE_MASK, LDO_VIO_REF_1V2);
455 rtsx_pci_write_register(pcr, LDO_VIO_CFG,
456 LDO_VIO_SR_MASK, LDO_VIO_SR_DF);
457 rtsx_pci_write_register(pcr, LDO_DV12S_CFG,
458 LDO_REF12_TUNE_MASK, LDO_REF12_TUNE_DF);
459 rtsx_pci_write_register(pcr, SD40_LDO_CTL1,
460 SD40_VIO_TUNE_MASK, SD40_VIO_TUNE_1V7);
461 }
462
463 return 0;
464}
465
466static const struct pcr_ops rts524a_pcr_ops = {
467 .write_phy = rts524a_write_phy,
468 .read_phy = rts524a_read_phy,
469 .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
470 .extra_init_hw = rts524a_extra_init_hw,
471 .optimize_phy = rts524a_optimize_phy,
472 .turn_on_led = rtsx_base_turn_on_led,
473 .turn_off_led = rtsx_base_turn_off_led,
474 .enable_auto_blink = rtsx_base_enable_auto_blink,
475 .disable_auto_blink = rtsx_base_disable_auto_blink,
476 .card_power_on = rtsx_base_card_power_on,
477 .card_power_off = rtsx_base_card_power_off,
478 .switch_output_voltage = rtsx_base_switch_output_voltage,
479 .force_power_down = rtsx_base_force_power_down,
480};
481
482void rts524a_init_params(struct rtsx_pcr *pcr)
483{
484 rts5249_init_params(pcr);
485
486 pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3;
487 pcr->ops = &rts524a_pcr_ops;
488}
489
490static int rts525a_card_power_on(struct rtsx_pcr *pcr, int card)
491{
492 rtsx_pci_write_register(pcr, LDO_VCC_CFG1,
493 LDO_VCC_TUNE_MASK, LDO_VCC_3V3);
494 return rtsx_base_card_power_on(pcr, card);
495}
496
497static int rts525a_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
498{
499 switch (voltage) {
500 case OUTPUT_3V3:
501 rtsx_pci_write_register(pcr, LDO_CONFIG2,
502 LDO_D3318_MASK, LDO_D3318_33V);
503 rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8, 0);
504 break;
505 case OUTPUT_1V8:
506 rtsx_pci_write_register(pcr, LDO_CONFIG2,
507 LDO_D3318_MASK, LDO_D3318_18V);
508 rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8,
509 SD_IO_USING_1V8);
510 break;
511 default:
512 return -EINVAL;
513 }
514
515 rtsx_pci_init_cmd(pcr);
516 rts5249_fill_driving(pcr, voltage);
517 return rtsx_pci_send_cmd(pcr, 100);
518}
519
520static int rts525a_optimize_phy(struct rtsx_pcr *pcr)
521{
522 int err;
523
524 err = rtsx_pci_write_register(pcr, RTS524A_PM_CTRL3,
525 D3_DELINK_MODE_EN, 0x00);
526 if (err < 0)
527 return err;
528
529 rtsx_pci_write_phy_register(pcr, _PHY_FLD0,
530 _PHY_FLD0_CLK_REQ_20C | _PHY_FLD0_RX_IDLE_EN |
531 _PHY_FLD0_BIT_ERR_RSTN | _PHY_FLD0_BER_COUNT |
532 _PHY_FLD0_BER_TIMER | _PHY_FLD0_CHECK_EN);
533
534 rtsx_pci_write_phy_register(pcr, _PHY_ANA03,
535 _PHY_ANA03_TIMER_MAX | _PHY_ANA03_OOBS_DEB_EN |
536 _PHY_CMU_DEBUG_EN);
537
538 if (is_version(pcr, 0x525A, IC_VER_A))
539 rtsx_pci_write_phy_register(pcr, _PHY_REV0,
540 _PHY_REV0_FILTER_OUT | _PHY_REV0_CDR_BYPASS_PFD |
541 _PHY_REV0_CDR_RX_IDLE_BYPASS);
542
543 return 0;
544}
545
546static int rts525a_extra_init_hw(struct rtsx_pcr *pcr)
547{
548 rts5249_extra_init_hw(pcr);
549
550 rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL);
551 if (is_version(pcr, 0x525A, IC_VER_A)) {
552 rtsx_pci_write_register(pcr, L1SUB_CONFIG2,
553 L1SUB_AUTO_CFG, L1SUB_AUTO_CFG);
554 rtsx_pci_write_register(pcr, RREF_CFG,
555 RREF_VBGSEL_MASK, RREF_VBGSEL_1V25);
556 rtsx_pci_write_register(pcr, LDO_VIO_CFG,
557 LDO_VIO_TUNE_MASK, LDO_VIO_1V7);
558 rtsx_pci_write_register(pcr, LDO_DV12S_CFG,
559 LDO_D12_TUNE_MASK, LDO_D12_TUNE_DF);
560 rtsx_pci_write_register(pcr, LDO_AV12S_CFG,
561 LDO_AV12S_TUNE_MASK, LDO_AV12S_TUNE_DF);
562 rtsx_pci_write_register(pcr, LDO_VCC_CFG0,
563 LDO_VCC_LMTVTH_MASK, LDO_VCC_LMTVTH_2A);
564 rtsx_pci_write_register(pcr, OOBS_CONFIG,
565 OOBS_AUTOK_DIS | OOBS_VAL_MASK, 0x89);
566 }
567
568 return 0;
569}
570
571static const struct pcr_ops rts525a_pcr_ops = {
572 .fetch_vendor_settings = rtsx_base_fetch_vendor_settings,
573 .extra_init_hw = rts525a_extra_init_hw,
574 .optimize_phy = rts525a_optimize_phy,
575 .turn_on_led = rtsx_base_turn_on_led,
576 .turn_off_led = rtsx_base_turn_off_led,
577 .enable_auto_blink = rtsx_base_enable_auto_blink,
578 .disable_auto_blink = rtsx_base_disable_auto_blink,
579 .card_power_on = rts525a_card_power_on,
580 .card_power_off = rtsx_base_card_power_off,
581 .switch_output_voltage = rts525a_switch_output_voltage,
582 .force_power_down = rtsx_base_force_power_down,
583};
584
585void rts525a_init_params(struct rtsx_pcr *pcr)
586{
587 rts5249_init_params(pcr);
588
589 pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3;
590 pcr->ops = &rts525a_pcr_ops;
591}
592
diff --git a/drivers/mfd/rtsx_gops.c b/drivers/mfd/rtsx_gops.c
deleted file mode 100644
index b1a98c678593..000000000000
--- a/drivers/mfd/rtsx_gops.c
+++ /dev/null
@@ -1,37 +0,0 @@
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * Micky Ching <micky_ching@realsil.com.cn>
20 */
21
22#include <linux/mfd/rtsx_pci.h>
23#include "rtsx_pcr.h"
24
25int rtsx_gops_pm_reset(struct rtsx_pcr *pcr)
26{
27 int err;
28
29 /* init aspm */
30 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0x00);
31 err = rtsx_pci_update_cfg_byte(pcr, LCTLR, ~LCTLR_ASPM_CTL_MASK, 0x00);
32 if (err < 0)
33 return err;
34
35 /* reset PM_CTRL3 before send buffer cmd */
36 return rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00);
37}
diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
index 30f7ca89a0e6..a66540a49079 100644
--- a/drivers/mfd/rtsx_pcr.c
+++ b/drivers/mfd/rtsx_pcr.c
@@ -58,11 +58,25 @@ static const struct pci_device_id rtsx_pci_ids[] = {
58 { PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 }, 58 { PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
59 { PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 }, 59 { PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 },
60 { PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 }, 60 { PCI_DEVICE(0x10EC, 0x5286), PCI_CLASS_OTHERS << 16, 0xFF0000 },
61 { PCI_DEVICE(0x10EC, 0x524A), PCI_CLASS_OTHERS << 16, 0xFF0000 },
62 { PCI_DEVICE(0x10EC, 0x525A), PCI_CLASS_OTHERS << 16, 0xFF0000 },
61 { 0, } 63 { 0, }
62}; 64};
63 65
64MODULE_DEVICE_TABLE(pci, rtsx_pci_ids); 66MODULE_DEVICE_TABLE(pci, rtsx_pci_ids);
65 67
68static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr)
69{
70 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
71 0xFC, pcr->aspm_en);
72}
73
74static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr)
75{
76 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,
77 0xFC, 0);
78}
79
66void rtsx_pci_start_run(struct rtsx_pcr *pcr) 80void rtsx_pci_start_run(struct rtsx_pcr *pcr)
67{ 81{
68 /* If pci device removed, don't queue idle work any more */ 82 /* If pci device removed, don't queue idle work any more */
@@ -75,7 +89,7 @@ void rtsx_pci_start_run(struct rtsx_pcr *pcr)
75 pcr->ops->enable_auto_blink(pcr); 89 pcr->ops->enable_auto_blink(pcr);
76 90
77 if (pcr->aspm_en) 91 if (pcr->aspm_en)
78 rtsx_pci_write_config_byte(pcr, LCTLR, 0); 92 rtsx_pci_disable_aspm(pcr);
79 } 93 }
80 94
81 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); 95 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200));
@@ -130,7 +144,7 @@ int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data)
130} 144}
131EXPORT_SYMBOL_GPL(rtsx_pci_read_register); 145EXPORT_SYMBOL_GPL(rtsx_pci_read_register);
132 146
133int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) 147int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
134{ 148{
135 int err, i, finished = 0; 149 int err, i, finished = 0;
136 u8 tmp; 150 u8 tmp;
@@ -162,9 +176,17 @@ int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
162 176
163 return 0; 177 return 0;
164} 178}
179
180int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val)
181{
182 if (pcr->ops->write_phy)
183 return pcr->ops->write_phy(pcr, addr, val);
184
185 return __rtsx_pci_write_phy_register(pcr, addr, val);
186}
165EXPORT_SYMBOL_GPL(rtsx_pci_write_phy_register); 187EXPORT_SYMBOL_GPL(rtsx_pci_write_phy_register);
166 188
167int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) 189int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
168{ 190{
169 int err, i, finished = 0; 191 int err, i, finished = 0;
170 u16 data; 192 u16 data;
@@ -210,6 +232,14 @@ int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
210 232
211 return 0; 233 return 0;
212} 234}
235
236int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val)
237{
238 if (pcr->ops->read_phy)
239 return pcr->ops->read_phy(pcr, addr, val);
240
241 return __rtsx_pci_read_phy_register(pcr, addr, val);
242}
213EXPORT_SYMBOL_GPL(rtsx_pci_read_phy_register); 243EXPORT_SYMBOL_GPL(rtsx_pci_read_phy_register);
214 244
215void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) 245void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr)
@@ -286,8 +316,7 @@ int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout)
286 timeleft = wait_for_completion_interruptible_timeout( 316 timeleft = wait_for_completion_interruptible_timeout(
287 &trans_done, msecs_to_jiffies(timeout)); 317 &trans_done, msecs_to_jiffies(timeout));
288 if (timeleft <= 0) { 318 if (timeleft <= 0) {
289 dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", 319 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
290 __func__, __LINE__);
291 err = -ETIMEDOUT; 320 err = -ETIMEDOUT;
292 goto finish_send_cmd; 321 goto finish_send_cmd;
293 } 322 }
@@ -323,8 +352,7 @@ static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr,
323 u64 val; 352 u64 val;
324 u8 option = SG_VALID | SG_TRANS_DATA; 353 u8 option = SG_VALID | SG_TRANS_DATA;
325 354
326 dev_dbg(&(pcr->pci->dev), "DMA addr: 0x%x, Len: 0x%x\n", 355 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len);
327 (unsigned int)addr, len);
328 356
329 if (end) 357 if (end)
330 option |= SG_END; 358 option |= SG_END;
@@ -339,11 +367,11 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
339{ 367{
340 int err = 0, count; 368 int err = 0, count;
341 369
342 dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg); 370 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg);
343 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); 371 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read);
344 if (count < 1) 372 if (count < 1)
345 return -EINVAL; 373 return -EINVAL;
346 dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); 374 pcr_dbg(pcr, "DMA mapping count: %d\n", count);
347 375
348 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); 376 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout);
349 377
@@ -417,8 +445,7 @@ int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
417 timeleft = wait_for_completion_interruptible_timeout( 445 timeleft = wait_for_completion_interruptible_timeout(
418 &trans_done, msecs_to_jiffies(timeout)); 446 &trans_done, msecs_to_jiffies(timeout));
419 if (timeleft <= 0) { 447 if (timeleft <= 0) {
420 dev_dbg(&(pcr->pci->dev), "Timeout (%s %d)\n", 448 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__);
421 __func__, __LINE__);
422 err = -ETIMEDOUT; 449 err = -ETIMEDOUT;
423 goto out; 450 goto out;
424 } 451 }
@@ -592,7 +619,7 @@ static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr)
592 /* Enable Bus Interrupt */ 619 /* Enable Bus Interrupt */
593 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); 620 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier);
594 621
595 dev_dbg(&(pcr->pci->dev), "RTSX_BIER: 0x%08x\n", pcr->bier); 622 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier);
596} 623}
597 624
598static inline u8 double_ssc_depth(u8 depth) 625static inline u8 double_ssc_depth(u8 depth)
@@ -638,14 +665,13 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
638 return err; 665 return err;
639 666
640 card_clock /= 1000000; 667 card_clock /= 1000000;
641 dev_dbg(&(pcr->pci->dev), "Switch card clock to %dMHz\n", card_clock); 668 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock);
642 669
643 clk = card_clock; 670 clk = card_clock;
644 if (!initial_mode && double_clk) 671 if (!initial_mode && double_clk)
645 clk = card_clock * 2; 672 clk = card_clock * 2;
646 dev_dbg(&(pcr->pci->dev), 673 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n",
647 "Internal SSC clock: %dMHz (cur_clock = %d)\n", 674 clk, pcr->cur_clock);
648 clk, pcr->cur_clock);
649 675
650 if (clk == pcr->cur_clock) 676 if (clk == pcr->cur_clock)
651 return 0; 677 return 0;
@@ -674,14 +700,14 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
674 } 700 }
675 div++; 701 div++;
676 } 702 }
677 dev_dbg(&(pcr->pci->dev), "n = %d, div = %d\n", n, div); 703 pcr_dbg(pcr, "n = %d, div = %d\n", n, div);
678 704
679 ssc_depth = depth[ssc_depth]; 705 ssc_depth = depth[ssc_depth];
680 if (double_clk) 706 if (double_clk)
681 ssc_depth = double_ssc_depth(ssc_depth); 707 ssc_depth = double_ssc_depth(ssc_depth);
682 708
683 ssc_depth = revise_ssc_depth(ssc_depth, div); 709 ssc_depth = revise_ssc_depth(ssc_depth, div);
684 dev_dbg(&(pcr->pci->dev), "ssc_depth = %d\n", ssc_depth); 710 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth);
685 711
686 rtsx_pci_init_cmd(pcr); 712 rtsx_pci_init_cmd(pcr);
687 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, 713 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,
@@ -803,13 +829,13 @@ static void rtsx_pci_card_detect(struct work_struct *work)
803 dwork = to_delayed_work(work); 829 dwork = to_delayed_work(work);
804 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); 830 pcr = container_of(dwork, struct rtsx_pcr, carddet_work);
805 831
806 dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); 832 pcr_dbg(pcr, "--> %s\n", __func__);
807 833
808 mutex_lock(&pcr->pcr_mutex); 834 mutex_lock(&pcr->pcr_mutex);
809 spin_lock_irqsave(&pcr->lock, flags); 835 spin_lock_irqsave(&pcr->lock, flags);
810 836
811 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); 837 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR);
812 dev_dbg(&(pcr->pci->dev), "irq_status: 0x%08x\n", irq_status); 838 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status);
813 839
814 irq_status &= CARD_EXIST; 840 irq_status &= CARD_EXIST;
815 card_inserted = pcr->card_inserted & irq_status; 841 card_inserted = pcr->card_inserted & irq_status;
@@ -820,9 +846,8 @@ static void rtsx_pci_card_detect(struct work_struct *work)
820 spin_unlock_irqrestore(&pcr->lock, flags); 846 spin_unlock_irqrestore(&pcr->lock, flags);
821 847
822 if (card_inserted || card_removed) { 848 if (card_inserted || card_removed) {
823 dev_dbg(&(pcr->pci->dev), 849 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n",
824 "card_inserted: 0x%x, card_removed: 0x%x\n", 850 card_inserted, card_removed);
825 card_inserted, card_removed);
826 851
827 if (pcr->ops->cd_deglitch) 852 if (pcr->ops->cd_deglitch)
828 card_inserted = pcr->ops->cd_deglitch(pcr); 853 card_inserted = pcr->ops->cd_deglitch(pcr);
@@ -930,7 +955,7 @@ static void rtsx_pci_idle_work(struct work_struct *work)
930 struct delayed_work *dwork = to_delayed_work(work); 955 struct delayed_work *dwork = to_delayed_work(work);
931 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); 956 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work);
932 957
933 dev_dbg(&(pcr->pci->dev), "--> %s\n", __func__); 958 pcr_dbg(pcr, "--> %s\n", __func__);
934 959
935 mutex_lock(&pcr->pcr_mutex); 960 mutex_lock(&pcr->pcr_mutex);
936 961
@@ -942,7 +967,7 @@ static void rtsx_pci_idle_work(struct work_struct *work)
942 pcr->ops->turn_off_led(pcr); 967 pcr->ops->turn_off_led(pcr);
943 968
944 if (pcr->aspm_en) 969 if (pcr->aspm_en)
945 rtsx_pci_write_config_byte(pcr, LCTLR, pcr->aspm_en); 970 rtsx_pci_enable_aspm(pcr);
946 971
947 mutex_unlock(&pcr->pcr_mutex); 972 mutex_unlock(&pcr->pcr_mutex);
948} 973}
@@ -968,6 +993,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
968{ 993{
969 int err; 994 int err;
970 995
996 pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP);
971 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); 997 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr);
972 998
973 rtsx_pci_enable_bus_int(pcr); 999 rtsx_pci_enable_bus_int(pcr);
@@ -980,6 +1006,7 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
980 /* Wait SSC power stable */ 1006 /* Wait SSC power stable */
981 udelay(200); 1007 udelay(200);
982 1008
1009 rtsx_pci_disable_aspm(pcr);
983 if (pcr->ops->optimize_phy) { 1010 if (pcr->ops->optimize_phy) {
984 err = pcr->ops->optimize_phy(pcr); 1011 err = pcr->ops->optimize_phy(pcr);
985 if (err < 0) 1012 if (err < 0)
@@ -1028,10 +1055,8 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
1028 if (err < 0) 1055 if (err < 0)
1029 return err; 1056 return err;
1030 1057
1031 rtsx_pci_write_config_byte(pcr, LCTLR, 0);
1032
1033 /* Enable clk_request_n to enable clock power management */ 1058 /* Enable clk_request_n to enable clock power management */
1034 rtsx_pci_write_config_byte(pcr, 0x81, 1); 1059 rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1);
1035 /* Enter L1 when host tx idle */ 1060 /* Enter L1 when host tx idle */
1036 rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); 1061 rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B);
1037 1062
@@ -1081,6 +1106,14 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
1081 rts5249_init_params(pcr); 1106 rts5249_init_params(pcr);
1082 break; 1107 break;
1083 1108
1109 case 0x524A:
1110 rts524a_init_params(pcr);
1111 break;
1112
1113 case 0x525A:
1114 rts525a_init_params(pcr);
1115 break;
1116
1084 case 0x5287: 1117 case 0x5287:
1085 rtl8411b_init_params(pcr); 1118 rtl8411b_init_params(pcr);
1086 break; 1119 break;
@@ -1090,7 +1123,7 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
1090 break; 1123 break;
1091 } 1124 }
1092 1125
1093 dev_dbg(&(pcr->pci->dev), "PID: 0x%04x, IC version: 0x%02x\n", 1126 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n",
1094 PCI_PID(pcr), pcr->ic_version); 1127 PCI_PID(pcr), pcr->ic_version);
1095 1128
1096 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), 1129 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot),
@@ -1101,14 +1134,14 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
1101 if (pcr->ops->fetch_vendor_settings) 1134 if (pcr->ops->fetch_vendor_settings)
1102 pcr->ops->fetch_vendor_settings(pcr); 1135 pcr->ops->fetch_vendor_settings(pcr);
1103 1136
1104 dev_dbg(&(pcr->pci->dev), "pcr->aspm_en = 0x%x\n", pcr->aspm_en); 1137 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en);
1105 dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_1v8 = 0x%x\n", 1138 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n",
1106 pcr->sd30_drive_sel_1v8); 1139 pcr->sd30_drive_sel_1v8);
1107 dev_dbg(&(pcr->pci->dev), "pcr->sd30_drive_sel_3v3 = 0x%x\n", 1140 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n",
1108 pcr->sd30_drive_sel_3v3); 1141 pcr->sd30_drive_sel_3v3);
1109 dev_dbg(&(pcr->pci->dev), "pcr->card_drive_sel = 0x%x\n", 1142 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n",
1110 pcr->card_drive_sel); 1143 pcr->card_drive_sel);
1111 dev_dbg(&(pcr->pci->dev), "pcr->flags = 0x%x\n", pcr->flags); 1144 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags);
1112 1145
1113 pcr->state = PDEV_STAT_IDLE; 1146 pcr->state = PDEV_STAT_IDLE;
1114 err = rtsx_pci_init_hw(pcr); 1147 err = rtsx_pci_init_hw(pcr);
@@ -1126,7 +1159,7 @@ static int rtsx_pci_probe(struct pci_dev *pcidev,
1126 struct rtsx_pcr *pcr; 1159 struct rtsx_pcr *pcr;
1127 struct pcr_handle *handle; 1160 struct pcr_handle *handle;
1128 u32 base, len; 1161 u32 base, len;
1129 int ret, i; 1162 int ret, i, bar = 0;
1130 1163
1131 dev_dbg(&(pcidev->dev), 1164 dev_dbg(&(pcidev->dev),
1132 ": Realtek PCI-E Card Reader found at %s [%04x:%04x] (rev %x)\n", 1165 ": Realtek PCI-E Card Reader found at %s [%04x:%04x] (rev %x)\n",
@@ -1171,8 +1204,10 @@ static int rtsx_pci_probe(struct pci_dev *pcidev,
1171 pcr->pci = pcidev; 1204 pcr->pci = pcidev;
1172 dev_set_drvdata(&pcidev->dev, handle); 1205 dev_set_drvdata(&pcidev->dev, handle);
1173 1206
1174 len = pci_resource_len(pcidev, 0); 1207 if (CHK_PCI_PID(pcr, 0x525A))
1175 base = pci_resource_start(pcidev, 0); 1208 bar = 1;
1209 len = pci_resource_len(pcidev, bar);
1210 base = pci_resource_start(pcidev, bar);
1176 pcr->remap_addr = ioremap_nocache(base, len); 1211 pcr->remap_addr = ioremap_nocache(base, len);
1177 if (!pcr->remap_addr) { 1212 if (!pcr->remap_addr) {
1178 ret = -ENOMEM; 1213 ret = -ENOMEM;
diff --git a/drivers/mfd/rtsx_pcr.h b/drivers/mfd/rtsx_pcr.h
index fe2bbb67defc..ce48842570d7 100644
--- a/drivers/mfd/rtsx_pcr.h
+++ b/drivers/mfd/rtsx_pcr.h
@@ -27,12 +27,20 @@
27#define MIN_DIV_N_PCR 80 27#define MIN_DIV_N_PCR 80
28#define MAX_DIV_N_PCR 208 28#define MAX_DIV_N_PCR 208
29 29
30#define RTS524A_PME_FORCE_CTL 0xFF78
31#define RTS524A_PM_CTRL3 0xFF7E
32
33int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
34int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
35
30void rts5209_init_params(struct rtsx_pcr *pcr); 36void rts5209_init_params(struct rtsx_pcr *pcr);
31void rts5229_init_params(struct rtsx_pcr *pcr); 37void rts5229_init_params(struct rtsx_pcr *pcr);
32void rtl8411_init_params(struct rtsx_pcr *pcr); 38void rtl8411_init_params(struct rtsx_pcr *pcr);
33void rtl8402_init_params(struct rtsx_pcr *pcr); 39void rtl8402_init_params(struct rtsx_pcr *pcr);
34void rts5227_init_params(struct rtsx_pcr *pcr); 40void rts5227_init_params(struct rtsx_pcr *pcr);
35void rts5249_init_params(struct rtsx_pcr *pcr); 41void rts5249_init_params(struct rtsx_pcr *pcr);
42void rts524a_init_params(struct rtsx_pcr *pcr);
43void rts525a_init_params(struct rtsx_pcr *pcr);
36void rtl8411b_init_params(struct rtsx_pcr *pcr); 44void rtl8411b_init_params(struct rtsx_pcr *pcr);
37 45
38static inline u8 map_sd_drive(int idx) 46static inline u8 map_sd_drive(int idx)
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 0a7bc43db4e4..4a69afb425ad 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -69,6 +69,8 @@ static const struct mfd_cell s2mps11_devs[] = {
69 { 69 {
70 .name = "s2mps11-pmic", 70 .name = "s2mps11-pmic",
71 }, { 71 }, {
72 .name = "s2mps14-rtc",
73 }, {
72 .name = "s2mps11-clk", 74 .name = "s2mps11-clk",
73 .of_compatible = "samsung,s2mps11-clk", 75 .of_compatible = "samsung,s2mps11-clk",
74 } 76 }
@@ -267,10 +269,8 @@ static struct sec_platform_data *sec_pmic_i2c_parse_dt_pdata(
267 struct sec_platform_data *pd; 269 struct sec_platform_data *pd;
268 270
269 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 271 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
270 if (!pd) { 272 if (!pd)
271 dev_err(dev, "could not allocate memory for pdata\n");
272 return ERR_PTR(-ENOMEM); 273 return ERR_PTR(-ENOMEM);
273 }
274 274
275 /* 275 /*
276 * ToDo: the 'wakeup' member in the platform data is more of a linux 276 * ToDo: the 'wakeup' member in the platform data is more of a linux
@@ -333,7 +333,6 @@ static int sec_pmic_probe(struct i2c_client *i2c,
333 } 333 }
334 if (pdata) { 334 if (pdata) {
335 sec_pmic->device_type = pdata->device_type; 335 sec_pmic->device_type = pdata->device_type;
336 sec_pmic->ono = pdata->ono;
337 sec_pmic->irq_base = pdata->irq_base; 336 sec_pmic->irq_base = pdata->irq_base;
338 sec_pmic->wakeup = pdata->wakeup; 337 sec_pmic->wakeup = pdata->wakeup;
339 sec_pmic->pdata = pdata; 338 sec_pmic->pdata = pdata;
diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index ba86a918c2da..806fa8dbb22d 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -61,14 +61,14 @@ static const struct regmap_irq s2mps11_irqs[] = {
61 .reg_offset = 1, 61 .reg_offset = 1,
62 .mask = S2MPS11_IRQ_RTC60S_MASK, 62 .mask = S2MPS11_IRQ_RTC60S_MASK,
63 }, 63 },
64 [S2MPS11_IRQ_RTCA0] = {
65 .reg_offset = 1,
66 .mask = S2MPS11_IRQ_RTCA0_MASK,
67 },
68 [S2MPS11_IRQ_RTCA1] = { 64 [S2MPS11_IRQ_RTCA1] = {
69 .reg_offset = 1, 65 .reg_offset = 1,
70 .mask = S2MPS11_IRQ_RTCA1_MASK, 66 .mask = S2MPS11_IRQ_RTCA1_MASK,
71 }, 67 },
68 [S2MPS11_IRQ_RTCA0] = {
69 .reg_offset = 1,
70 .mask = S2MPS11_IRQ_RTCA0_MASK,
71 },
72 [S2MPS11_IRQ_SMPL] = { 72 [S2MPS11_IRQ_SMPL] = {
73 .reg_offset = 1, 73 .reg_offset = 1,
74 .mask = S2MPS11_IRQ_SMPL_MASK, 74 .mask = S2MPS11_IRQ_SMPL_MASK,
@@ -484,6 +484,12 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
484 return ret; 484 return ret;
485 } 485 }
486 486
487 /*
488 * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11
489 * so the interrupt number must be consistent.
490 */
491 BUILD_BUG_ON(((enum s2mps14_irq)S2MPS11_IRQ_RTCA0) != S2MPS14_IRQ_RTCA0);
492
487 return 0; 493 return 0;
488} 494}
489 495
diff --git a/drivers/mfd/sky81452.c b/drivers/mfd/sky81452.c
new file mode 100644
index 000000000000..b0c9b0415650
--- /dev/null
+++ b/drivers/mfd/sky81452.c
@@ -0,0 +1,108 @@
1/*
2 * sky81452.c SKY81452 MFD driver
3 *
4 * Copyright 2014 Skyworks Solutions Inc.
5 * Author : Gyungoh Yoo <jack.yoo@skyworksinc.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/i2c.h>
26#include <linux/regmap.h>
27#include <linux/mfd/core.h>
28#include <linux/mfd/sky81452.h>
29
30static const struct regmap_config sky81452_config = {
31 .reg_bits = 8,
32 .val_bits = 8,
33};
34
35static int sky81452_probe(struct i2c_client *client,
36 const struct i2c_device_id *id)
37{
38 struct device *dev = &client->dev;
39 const struct sky81452_platform_data *pdata = dev_get_platdata(dev);
40 struct mfd_cell cells[2];
41 struct regmap *regmap;
42 int ret;
43
44 if (!pdata) {
45 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
46 if (!pdata)
47 return -ENOMEM;
48 }
49
50 regmap = devm_regmap_init_i2c(client, &sky81452_config);
51 if (IS_ERR(regmap)) {
52 dev_err(dev, "failed to initialize.err=%ld\n", PTR_ERR(regmap));
53 return PTR_ERR(regmap);
54 }
55
56 i2c_set_clientdata(client, regmap);
57
58 memset(cells, 0, sizeof(cells));
59 cells[0].name = "sky81452-backlight";
60 cells[0].of_compatible = "skyworks,sky81452-backlight";
61 cells[0].platform_data = pdata->bl_pdata;
62 cells[0].pdata_size = sizeof(*pdata->bl_pdata);
63 cells[1].name = "sky81452-regulator";
64 cells[1].platform_data = pdata->regulator_init_data;
65 cells[1].pdata_size = sizeof(*pdata->regulator_init_data);
66
67 ret = mfd_add_devices(dev, -1, cells, ARRAY_SIZE(cells), NULL, 0, NULL);
68 if (ret)
69 dev_err(dev, "failed to add child devices. err=%d\n", ret);
70
71 return ret;
72}
73
74static int sky81452_remove(struct i2c_client *client)
75{
76 mfd_remove_devices(&client->dev);
77 return 0;
78}
79
80static const struct i2c_device_id sky81452_ids[] = {
81 { "sky81452" },
82 { }
83};
84MODULE_DEVICE_TABLE(i2c, sky81452_ids);
85
86#ifdef CONFIG_OF
87static const struct of_device_id sky81452_of_match[] = {
88 { .compatible = "skyworks,sky81452", },
89 { }
90};
91MODULE_DEVICE_TABLE(of, sky81452_of_match);
92#endif
93
94static struct i2c_driver sky81452_driver = {
95 .driver = {
96 .name = "sky81452",
97 .of_match_table = of_match_ptr(sky81452_of_match),
98 },
99 .probe = sky81452_probe,
100 .remove = sky81452_remove,
101 .id_table = sky81452_ids,
102};
103
104module_i2c_driver(sky81452_driver);
105
106MODULE_DESCRIPTION("Skyworks SKY81452 MFD driver");
107MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@skyworksinc.com>");
108MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/tc3589x.c b/drivers/mfd/tc3589x.c
index aacb3720065c..cf356395c9e9 100644
--- a/drivers/mfd/tc3589x.c
+++ b/drivers/mfd/tc3589x.c
@@ -318,7 +318,6 @@ static int tc3589x_device_init(struct tc3589x *tc3589x)
318 return ret; 318 return ret;
319} 319}
320 320
321#ifdef CONFIG_OF
322static const struct of_device_id tc3589x_match[] = { 321static const struct of_device_id tc3589x_match[] = {
323 /* Legacy compatible string */ 322 /* Legacy compatible string */
324 { .compatible = "tc3589x", .data = (void *) TC3589X_UNKNOWN }, 323 { .compatible = "tc3589x", .data = (void *) TC3589X_UNKNOWN },
@@ -359,14 +358,6 @@ tc3589x_of_probe(struct device *dev, enum tc3589x_version *version)
359 358
360 return pdata; 359 return pdata;
361} 360}
362#else
363static inline struct tc3589x_platform_data *
364tc3589x_of_probe(struct device *dev, enum tc3589x_version *version)
365{
366 dev_err(dev, "no device tree support\n");
367 return ERR_PTR(-ENODEV);
368}
369#endif
370 361
371static int tc3589x_probe(struct i2c_client *i2c, 362static int tc3589x_probe(struct i2c_client *i2c,
372 const struct i2c_device_id *id) 363 const struct i2c_device_id *id)
diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c
index 467c80e1c4ae..e4e4b22eebc9 100644
--- a/drivers/mfd/ti_am335x_tscadc.c
+++ b/drivers/mfd/ti_am335x_tscadc.c
@@ -68,12 +68,6 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
68 DEFINE_WAIT(wait); 68 DEFINE_WAIT(wait);
69 u32 reg; 69 u32 reg;
70 70
71 /*
72 * disable TSC steps so it does not run while the ADC is using it. If
73 * write 0 while it is running (it just started or was already running)
74 * then it completes all steps that were enabled and stops then.
75 */
76 tscadc_writel(tsadc, REG_SE, 0);
77 reg = tscadc_readl(tsadc, REG_ADCFSM); 71 reg = tscadc_readl(tsadc, REG_ADCFSM);
78 if (reg & SEQ_STATUS) { 72 if (reg & SEQ_STATUS) {
79 tsadc->adc_waiting = true; 73 tsadc->adc_waiting = true;
@@ -86,8 +80,12 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
86 spin_lock_irq(&tsadc->reg_lock); 80 spin_lock_irq(&tsadc->reg_lock);
87 finish_wait(&tsadc->reg_se_wait, &wait); 81 finish_wait(&tsadc->reg_se_wait, &wait);
88 82
83 /*
84 * Sequencer should either be idle or
85 * busy applying the charge step.
86 */
89 reg = tscadc_readl(tsadc, REG_ADCFSM); 87 reg = tscadc_readl(tsadc, REG_ADCFSM);
90 WARN_ON(reg & SEQ_STATUS); 88 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
91 tsadc->adc_waiting = false; 89 tsadc->adc_waiting = false;
92 } 90 }
93 tsadc->adc_in_use = true; 91 tsadc->adc_in_use = true;
@@ -96,7 +94,6 @@ static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc)
96void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) 94void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val)
97{ 95{
98 spin_lock_irq(&tsadc->reg_lock); 96 spin_lock_irq(&tsadc->reg_lock);
99 tsadc->reg_se_cache |= val;
100 am335x_tscadc_need_adc(tsadc); 97 am335x_tscadc_need_adc(tsadc);
101 98
102 tscadc_writel(tsadc, REG_SE, val); 99 tscadc_writel(tsadc, REG_SE, val);
diff --git a/drivers/mfd/tps65010.c b/drivers/mfd/tps65010.c
index 743fb524fc8a..448f0a182dc4 100644
--- a/drivers/mfd/tps65010.c
+++ b/drivers/mfd/tps65010.c
@@ -515,7 +515,7 @@ static int tps65010_gpio_get(struct gpio_chip *chip, unsigned offset)
515 515
516static struct tps65010 *the_tps; 516static struct tps65010 *the_tps;
517 517
518static int __exit tps65010_remove(struct i2c_client *client) 518static int tps65010_remove(struct i2c_client *client)
519{ 519{
520 struct tps65010 *tps = i2c_get_clientdata(client); 520 struct tps65010 *tps = i2c_get_clientdata(client);
521 struct tps65010_board *board = dev_get_platdata(&client->dev); 521 struct tps65010_board *board = dev_get_platdata(&client->dev);
@@ -684,7 +684,7 @@ static struct i2c_driver tps65010_driver = {
684 .name = "tps65010", 684 .name = "tps65010",
685 }, 685 },
686 .probe = tps65010_probe, 686 .probe = tps65010_probe,
687 .remove = __exit_p(tps65010_remove), 687 .remove = tps65010_remove,
688 .id_table = tps65010_id, 688 .id_table = tps65010_id,
689}; 689};
690 690
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 393509246037..f440aed61305 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -829,7 +829,7 @@ static struct twl4030_power_data osc_off_idle = {
829 .board_config = osc_off_rconfig, 829 .board_config = osc_off_rconfig,
830}; 830};
831 831
832static struct of_device_id twl4030_power_of_match[] = { 832static const struct of_device_id twl4030_power_of_match[] = {
833 { 833 {
834 .compatible = "ti,twl4030-power", 834 .compatible = "ti,twl4030-power",
835 }, 835 },
diff --git a/drivers/mfd/twl6040.c b/drivers/mfd/twl6040.c
index f71ee3dbc2a2..c5265c1262c5 100644
--- a/drivers/mfd/twl6040.c
+++ b/drivers/mfd/twl6040.c
@@ -814,4 +814,3 @@ MODULE_DESCRIPTION("TWL6040 MFD");
814MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>"); 814MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
815MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>"); 815MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
816MODULE_LICENSE("GPL"); 816MODULE_LICENSE("GPL");
817MODULE_ALIAS("platform:twl6040");
diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c
index 8f43ab8fd2d6..3e628df9280c 100644
--- a/drivers/mfd/vexpress-sysreg.c
+++ b/drivers/mfd/vexpress-sysreg.c
@@ -47,71 +47,26 @@
47#define SYS_HBI_MASK 0xfff 47#define SYS_HBI_MASK 0xfff
48#define SYS_PROCIDx_HBI_SHIFT 0 48#define SYS_PROCIDx_HBI_SHIFT 0
49 49
50#define SYS_MCI_CARDIN (1 << 0)
51#define SYS_MCI_WPROT (1 << 1)
52
53#define SYS_MISC_MASTERSITE (1 << 14) 50#define SYS_MISC_MASTERSITE (1 << 14)
54 51
55 52void vexpress_flags_set(u32 data)
56static void __iomem *__vexpress_sysreg_base;
57
58static void __iomem *vexpress_sysreg_base(void)
59{ 53{
60 if (!__vexpress_sysreg_base) { 54 static void __iomem *base;
55
56 if (!base) {
61 struct device_node *node = of_find_compatible_node(NULL, NULL, 57 struct device_node *node = of_find_compatible_node(NULL, NULL,
62 "arm,vexpress-sysreg"); 58 "arm,vexpress-sysreg");
63 59
64 __vexpress_sysreg_base = of_iomap(node, 0); 60 base = of_iomap(node, 0);
65 } 61 }
66 62
67 WARN_ON(!__vexpress_sysreg_base); 63 if (WARN_ON(!base))
68 64 return;
69 return __vexpress_sysreg_base;
70}
71
72
73static int vexpress_sysreg_get_master(void)
74{
75 if (readl(vexpress_sysreg_base() + SYS_MISC) & SYS_MISC_MASTERSITE)
76 return VEXPRESS_SITE_DB2;
77
78 return VEXPRESS_SITE_DB1;
79}
80
81void vexpress_flags_set(u32 data)
82{
83 writel(~0, vexpress_sysreg_base() + SYS_FLAGSCLR);
84 writel(data, vexpress_sysreg_base() + SYS_FLAGSSET);
85}
86
87unsigned int vexpress_get_mci_cardin(struct device *dev)
88{
89 return readl(vexpress_sysreg_base() + SYS_MCI) & SYS_MCI_CARDIN;
90}
91
92u32 vexpress_get_procid(int site)
93{
94 if (site == VEXPRESS_SITE_MASTER)
95 site = vexpress_sysreg_get_master();
96 65
97 return readl(vexpress_sysreg_base() + (site == VEXPRESS_SITE_DB1 ? 66 writel(~0, base + SYS_FLAGSCLR);
98 SYS_PROCID0 : SYS_PROCID1)); 67 writel(data, base + SYS_FLAGSSET);
99} 68}
100 69
101void __iomem *vexpress_get_24mhz_clock_base(void)
102{
103 return vexpress_sysreg_base() + SYS_24MHZ;
104}
105
106
107void __init vexpress_sysreg_early_init(void __iomem *base)
108{
109 __vexpress_sysreg_base = base;
110
111 vexpress_config_set_master(vexpress_sysreg_get_master());
112}
113
114
115/* The sysreg block is just a random collection of various functions... */ 70/* The sysreg block is just a random collection of various functions... */
116 71
117static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = { 72static struct syscon_platform_data vexpress_sysreg_sys_id_pdata = {
@@ -210,6 +165,7 @@ static int vexpress_sysreg_probe(struct platform_device *pdev)
210 struct resource *mem; 165 struct resource *mem;
211 void __iomem *base; 166 void __iomem *base;
212 struct bgpio_chip *mmc_gpio_chip; 167 struct bgpio_chip *mmc_gpio_chip;
168 int master;
213 u32 dt_hbi; 169 u32 dt_hbi;
214 170
215 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 171 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -220,11 +176,14 @@ static int vexpress_sysreg_probe(struct platform_device *pdev)
220 if (!base) 176 if (!base)
221 return -ENOMEM; 177 return -ENOMEM;
222 178
223 vexpress_config_set_master(vexpress_sysreg_get_master()); 179 master = readl(base + SYS_MISC) & SYS_MISC_MASTERSITE ?
180 VEXPRESS_SITE_DB2 : VEXPRESS_SITE_DB1;
181 vexpress_config_set_master(master);
224 182
225 /* Confirm board type against DT property, if available */ 183 /* Confirm board type against DT property, if available */
226 if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) { 184 if (of_property_read_u32(of_root, "arm,hbi", &dt_hbi) == 0) {
227 u32 id = vexpress_get_procid(VEXPRESS_SITE_MASTER); 185 u32 id = readl(base + (master == VEXPRESS_SITE_DB1 ?
186 SYS_PROCID0 : SYS_PROCID1));
228 u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK; 187 u32 hbi = (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
229 188
230 if (WARN_ON(dt_hbi != hbi)) 189 if (WARN_ON(dt_hbi != hbi))
diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c
index b326a82017ee..aeae6ec123b3 100644
--- a/drivers/mfd/wm5102-tables.c
+++ b/drivers/mfd/wm5102-tables.c
@@ -1172,9 +1172,6 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
1172 case ARIZONA_DAC_DIGITAL_VOLUME_3L: 1172 case ARIZONA_DAC_DIGITAL_VOLUME_3L:
1173 case ARIZONA_DAC_VOLUME_LIMIT_3L: 1173 case ARIZONA_DAC_VOLUME_LIMIT_3L:
1174 case ARIZONA_NOISE_GATE_SELECT_3L: 1174 case ARIZONA_NOISE_GATE_SELECT_3L:
1175 case ARIZONA_OUTPUT_PATH_CONFIG_3R:
1176 case ARIZONA_DAC_DIGITAL_VOLUME_3R:
1177 case ARIZONA_DAC_VOLUME_LIMIT_3R:
1178 case ARIZONA_OUTPUT_PATH_CONFIG_4L: 1175 case ARIZONA_OUTPUT_PATH_CONFIG_4L:
1179 case ARIZONA_DAC_DIGITAL_VOLUME_4L: 1176 case ARIZONA_DAC_DIGITAL_VOLUME_4L:
1180 case ARIZONA_OUT_VOLUME_4L: 1177 case ARIZONA_OUT_VOLUME_4L:
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 07:18:16 -0500