diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_cursor.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_cursor.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c index adfc9b607a50..af4ec7bf3670 100644 --- a/drivers/gpu/drm/nouveau/nv50_cursor.c +++ b/drivers/gpu/drm/nouveau/nv50_cursor.c | |||
@@ -53,15 +53,15 @@ nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update) | |||
53 | } | 53 | } |
54 | 54 | ||
55 | if (dev_priv->chipset != 0x50) { | 55 | if (dev_priv->chipset != 0x50) { |
56 | BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1); | 56 | BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1); |
57 | OUT_RING(evo, NvEvoVRAM); | 57 | OUT_RING(evo, NvEvoVRAM); |
58 | } | 58 | } |
59 | BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2); | 59 | BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2); |
60 | OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW); | 60 | OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW); |
61 | OUT_RING(evo, nv_crtc->cursor.offset >> 8); | 61 | OUT_RING(evo, nv_crtc->cursor.offset >> 8); |
62 | 62 | ||
63 | if (update) { | 63 | if (update) { |
64 | BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1); | 64 | BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1); |
65 | OUT_RING(evo, 0); | 65 | OUT_RING(evo, 0); |
66 | FIRE_RING(evo); | 66 | FIRE_RING(evo); |
67 | nv_crtc->cursor.visible = true; | 67 | nv_crtc->cursor.visible = true; |
@@ -86,16 +86,16 @@ nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update) | |||
86 | NV_ERROR(dev, "no space while hiding cursor\n"); | 86 | NV_ERROR(dev, "no space while hiding cursor\n"); |
87 | return; | 87 | return; |
88 | } | 88 | } |
89 | BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2); | 89 | BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2); |
90 | OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE); | 90 | OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE); |
91 | OUT_RING(evo, 0); | 91 | OUT_RING(evo, 0); |
92 | if (dev_priv->chipset != 0x50) { | 92 | if (dev_priv->chipset != 0x50) { |
93 | BEGIN_RING(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1); | 93 | BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1); |
94 | OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE); | 94 | OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE); |
95 | } | 95 | } |
96 | 96 | ||
97 | if (update) { | 97 | if (update) { |
98 | BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1); | 98 | BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1); |
99 | OUT_RING(evo, 0); | 99 | OUT_RING(evo, 0); |
100 | FIRE_RING(evo); | 100 | FIRE_RING(evo); |
101 | nv_crtc->cursor.visible = false; | 101 | nv_crtc->cursor.visible = false; |