diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 135 |
1 files changed, 90 insertions, 45 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 4756ef639648..de8e9fb51595 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -84,13 +84,15 @@ static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port) | |||
84 | { | 84 | { |
85 | struct drm_encoder *encoder = &intel_dsi->base.base; | 85 | struct drm_encoder *encoder = &intel_dsi->base.base; |
86 | struct drm_device *dev = encoder->dev; | 86 | struct drm_device *dev = encoder->dev; |
87 | struct drm_i915_private *dev_priv = dev->dev_private; | 87 | struct drm_i915_private *dev_priv = to_i915(dev); |
88 | u32 mask; | 88 | u32 mask; |
89 | 89 | ||
90 | mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY | | 90 | mask = LP_CTRL_FIFO_EMPTY | HS_CTRL_FIFO_EMPTY | |
91 | LP_DATA_FIFO_EMPTY | HS_DATA_FIFO_EMPTY; | 91 | LP_DATA_FIFO_EMPTY | HS_DATA_FIFO_EMPTY; |
92 | 92 | ||
93 | if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == mask, 100)) | 93 | if (intel_wait_for_register(dev_priv, |
94 | MIPI_GEN_FIFO_STAT(port), mask, mask, | ||
95 | 100)) | ||
94 | DRM_ERROR("DPI FIFOs are not empty\n"); | 96 | DRM_ERROR("DPI FIFOs are not empty\n"); |
95 | } | 97 | } |
96 | 98 | ||
@@ -129,7 +131,7 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, | |||
129 | { | 131 | { |
130 | struct intel_dsi_host *intel_dsi_host = to_intel_dsi_host(host); | 132 | struct intel_dsi_host *intel_dsi_host = to_intel_dsi_host(host); |
131 | struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; | 133 | struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; |
132 | struct drm_i915_private *dev_priv = dev->dev_private; | 134 | struct drm_i915_private *dev_priv = to_i915(dev); |
133 | enum port port = intel_dsi_host->port; | 135 | enum port port = intel_dsi_host->port; |
134 | struct mipi_dsi_packet packet; | 136 | struct mipi_dsi_packet packet; |
135 | ssize_t ret; | 137 | ssize_t ret; |
@@ -158,8 +160,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, | |||
158 | 160 | ||
159 | /* note: this is never true for reads */ | 161 | /* note: this is never true for reads */ |
160 | if (packet.payload_length) { | 162 | if (packet.payload_length) { |
161 | 163 | if (intel_wait_for_register(dev_priv, | |
162 | if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & data_mask) == 0, 50)) | 164 | MIPI_GEN_FIFO_STAT(port), |
165 | data_mask, 0, | ||
166 | 50)) | ||
163 | DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n"); | 167 | DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n"); |
164 | 168 | ||
165 | write_data(dev_priv, data_reg, packet.payload, | 169 | write_data(dev_priv, data_reg, packet.payload, |
@@ -170,7 +174,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, | |||
170 | I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL); | 174 | I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL); |
171 | } | 175 | } |
172 | 176 | ||
173 | if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & ctrl_mask) == 0, 50)) { | 177 | if (intel_wait_for_register(dev_priv, |
178 | MIPI_GEN_FIFO_STAT(port), | ||
179 | ctrl_mask, 0, | ||
180 | 50)) { | ||
174 | DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n"); | 181 | DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n"); |
175 | } | 182 | } |
176 | 183 | ||
@@ -179,7 +186,10 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, | |||
179 | /* ->rx_len is set only for reads */ | 186 | /* ->rx_len is set only for reads */ |
180 | if (msg->rx_len) { | 187 | if (msg->rx_len) { |
181 | data_mask = GEN_READ_DATA_AVAIL; | 188 | data_mask = GEN_READ_DATA_AVAIL; |
182 | if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & data_mask) == data_mask, 50)) | 189 | if (intel_wait_for_register(dev_priv, |
190 | MIPI_INTR_STAT(port), | ||
191 | data_mask, data_mask, | ||
192 | 50)) | ||
183 | DRM_ERROR("Timeout waiting for read data.\n"); | 193 | DRM_ERROR("Timeout waiting for read data.\n"); |
184 | 194 | ||
185 | read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len); | 195 | read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len); |
@@ -250,7 +260,7 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, | |||
250 | { | 260 | { |
251 | struct drm_encoder *encoder = &intel_dsi->base.base; | 261 | struct drm_encoder *encoder = &intel_dsi->base.base; |
252 | struct drm_device *dev = encoder->dev; | 262 | struct drm_device *dev = encoder->dev; |
253 | struct drm_i915_private *dev_priv = dev->dev_private; | 263 | struct drm_i915_private *dev_priv = to_i915(dev); |
254 | u32 mask; | 264 | u32 mask; |
255 | 265 | ||
256 | /* XXX: pipe, hs */ | 266 | /* XXX: pipe, hs */ |
@@ -269,7 +279,9 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, | |||
269 | I915_WRITE(MIPI_DPI_CONTROL(port), cmd); | 279 | I915_WRITE(MIPI_DPI_CONTROL(port), cmd); |
270 | 280 | ||
271 | mask = SPL_PKT_SENT_INTERRUPT; | 281 | mask = SPL_PKT_SENT_INTERRUPT; |
272 | if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 100)) | 282 | if (intel_wait_for_register(dev_priv, |
283 | MIPI_INTR_STAT(port), mask, mask, | ||
284 | 100)) | ||
273 | DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd); | 285 | DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd); |
274 | 286 | ||
275 | return 0; | 287 | return 0; |
@@ -302,7 +314,7 @@ static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) | |||
302 | static bool intel_dsi_compute_config(struct intel_encoder *encoder, | 314 | static bool intel_dsi_compute_config(struct intel_encoder *encoder, |
303 | struct intel_crtc_state *pipe_config) | 315 | struct intel_crtc_state *pipe_config) |
304 | { | 316 | { |
305 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 317 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
306 | struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, | 318 | struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, |
307 | base); | 319 | base); |
308 | struct intel_connector *intel_connector = intel_dsi->attached_connector; | 320 | struct intel_connector *intel_connector = intel_dsi->attached_connector; |
@@ -313,8 +325,6 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, | |||
313 | 325 | ||
314 | DRM_DEBUG_KMS("\n"); | 326 | DRM_DEBUG_KMS("\n"); |
315 | 327 | ||
316 | pipe_config->has_dsi_encoder = true; | ||
317 | |||
318 | if (fixed_mode) { | 328 | if (fixed_mode) { |
319 | intel_fixed_panel_mode(fixed_mode, adjusted_mode); | 329 | intel_fixed_panel_mode(fixed_mode, adjusted_mode); |
320 | 330 | ||
@@ -348,7 +358,7 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, | |||
348 | 358 | ||
349 | static void bxt_dsi_device_ready(struct intel_encoder *encoder) | 359 | static void bxt_dsi_device_ready(struct intel_encoder *encoder) |
350 | { | 360 | { |
351 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 361 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
352 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 362 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
353 | enum port port; | 363 | enum port port; |
354 | u32 val; | 364 | u32 val; |
@@ -387,7 +397,7 @@ static void bxt_dsi_device_ready(struct intel_encoder *encoder) | |||
387 | 397 | ||
388 | static void vlv_dsi_device_ready(struct intel_encoder *encoder) | 398 | static void vlv_dsi_device_ready(struct intel_encoder *encoder) |
389 | { | 399 | { |
390 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 400 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
391 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 401 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
392 | enum port port; | 402 | enum port port; |
393 | u32 val; | 403 | u32 val; |
@@ -437,7 +447,7 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder) | |||
437 | static void intel_dsi_port_enable(struct intel_encoder *encoder) | 447 | static void intel_dsi_port_enable(struct intel_encoder *encoder) |
438 | { | 448 | { |
439 | struct drm_device *dev = encoder->base.dev; | 449 | struct drm_device *dev = encoder->base.dev; |
440 | struct drm_i915_private *dev_priv = dev->dev_private; | 450 | struct drm_i915_private *dev_priv = to_i915(dev); |
441 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); | 451 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
442 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 452 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
443 | enum port port; | 453 | enum port port; |
@@ -478,7 +488,7 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder) | |||
478 | static void intel_dsi_port_disable(struct intel_encoder *encoder) | 488 | static void intel_dsi_port_disable(struct intel_encoder *encoder) |
479 | { | 489 | { |
480 | struct drm_device *dev = encoder->base.dev; | 490 | struct drm_device *dev = encoder->base.dev; |
481 | struct drm_i915_private *dev_priv = dev->dev_private; | 491 | struct drm_i915_private *dev_priv = to_i915(dev); |
482 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 492 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
483 | enum port port; | 493 | enum port port; |
484 | 494 | ||
@@ -497,7 +507,7 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder) | |||
497 | static void intel_dsi_enable(struct intel_encoder *encoder) | 507 | static void intel_dsi_enable(struct intel_encoder *encoder) |
498 | { | 508 | { |
499 | struct drm_device *dev = encoder->base.dev; | 509 | struct drm_device *dev = encoder->base.dev; |
500 | struct drm_i915_private *dev_priv = dev->dev_private; | 510 | struct drm_i915_private *dev_priv = to_i915(dev); |
501 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 511 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
502 | enum port port; | 512 | enum port port; |
503 | 513 | ||
@@ -528,11 +538,10 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder); | |||
528 | static void intel_dsi_pre_enable(struct intel_encoder *encoder) | 538 | static void intel_dsi_pre_enable(struct intel_encoder *encoder) |
529 | { | 539 | { |
530 | struct drm_device *dev = encoder->base.dev; | 540 | struct drm_device *dev = encoder->base.dev; |
531 | struct drm_i915_private *dev_priv = dev->dev_private; | 541 | struct drm_i915_private *dev_priv = to_i915(dev); |
532 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 542 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
533 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | 543 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
534 | enum port port; | 544 | enum port port; |
535 | u32 tmp; | ||
536 | 545 | ||
537 | DRM_DEBUG_KMS("\n"); | 546 | DRM_DEBUG_KMS("\n"); |
538 | 547 | ||
@@ -551,11 +560,13 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) | |||
551 | 560 | ||
552 | msleep(intel_dsi->panel_on_delay); | 561 | msleep(intel_dsi->panel_on_delay); |
553 | 562 | ||
554 | if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) { | 563 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { |
564 | u32 val; | ||
565 | |||
555 | /* Disable DPOunit clock gating, can stall pipe */ | 566 | /* Disable DPOunit clock gating, can stall pipe */ |
556 | tmp = I915_READ(DSPCLK_GATE_D); | 567 | val = I915_READ(DSPCLK_GATE_D); |
557 | tmp |= DPOUNIT_CLOCK_GATE_DISABLE; | 568 | val |= DPOUNIT_CLOCK_GATE_DISABLE; |
558 | I915_WRITE(DSPCLK_GATE_D, tmp); | 569 | I915_WRITE(DSPCLK_GATE_D, val); |
559 | } | 570 | } |
560 | 571 | ||
561 | /* put device in ready state */ | 572 | /* put device in ready state */ |
@@ -601,7 +612,7 @@ static void intel_dsi_pre_disable(struct intel_encoder *encoder) | |||
601 | static void intel_dsi_disable(struct intel_encoder *encoder) | 612 | static void intel_dsi_disable(struct intel_encoder *encoder) |
602 | { | 613 | { |
603 | struct drm_device *dev = encoder->base.dev; | 614 | struct drm_device *dev = encoder->base.dev; |
604 | struct drm_i915_private *dev_priv = dev->dev_private; | 615 | struct drm_i915_private *dev_priv = to_i915(dev); |
605 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 616 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
606 | enum port port; | 617 | enum port port; |
607 | u32 temp; | 618 | u32 temp; |
@@ -640,7 +651,7 @@ static void intel_dsi_disable(struct intel_encoder *encoder) | |||
640 | static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) | 651 | static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) |
641 | { | 652 | { |
642 | struct drm_device *dev = encoder->base.dev; | 653 | struct drm_device *dev = encoder->base.dev; |
643 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 654 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
644 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 655 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
645 | enum port port; | 656 | enum port port; |
646 | 657 | ||
@@ -666,8 +677,9 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) | |||
666 | /* Wait till Clock lanes are in LP-00 state for MIPI Port A | 677 | /* Wait till Clock lanes are in LP-00 state for MIPI Port A |
667 | * only. MIPI Port C has no similar bit for checking | 678 | * only. MIPI Port C has no similar bit for checking |
668 | */ | 679 | */ |
669 | if (wait_for(((I915_READ(port_ctrl) & AFE_LATCHOUT) | 680 | if (intel_wait_for_register(dev_priv, |
670 | == 0x00000), 30)) | 681 | port_ctrl, AFE_LATCHOUT, 0, |
682 | 30)) | ||
671 | DRM_ERROR("DSI LP not going Low\n"); | 683 | DRM_ERROR("DSI LP not going Low\n"); |
672 | 684 | ||
673 | /* Disable MIPI PHY transparent latch */ | 685 | /* Disable MIPI PHY transparent latch */ |
@@ -684,7 +696,7 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) | |||
684 | 696 | ||
685 | static void intel_dsi_post_disable(struct intel_encoder *encoder) | 697 | static void intel_dsi_post_disable(struct intel_encoder *encoder) |
686 | { | 698 | { |
687 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 699 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
688 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 700 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
689 | 701 | ||
690 | DRM_DEBUG_KMS("\n"); | 702 | DRM_DEBUG_KMS("\n"); |
@@ -693,7 +705,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder) | |||
693 | 705 | ||
694 | intel_dsi_clear_device_ready(encoder); | 706 | intel_dsi_clear_device_ready(encoder); |
695 | 707 | ||
696 | if (!IS_BROXTON(dev_priv)) { | 708 | if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { |
697 | u32 val; | 709 | u32 val; |
698 | 710 | ||
699 | val = I915_READ(DSPCLK_GATE_D); | 711 | val = I915_READ(DSPCLK_GATE_D); |
@@ -719,7 +731,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder) | |||
719 | static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, | 731 | static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, |
720 | enum pipe *pipe) | 732 | enum pipe *pipe) |
721 | { | 733 | { |
722 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | 734 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
723 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 735 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
724 | struct drm_device *dev = encoder->base.dev; | 736 | struct drm_device *dev = encoder->base.dev; |
725 | enum intel_display_power_domain power_domain; | 737 | enum intel_display_power_domain power_domain; |
@@ -793,7 +805,7 @@ static void bxt_dsi_get_pipe_config(struct intel_encoder *encoder, | |||
793 | struct intel_crtc_state *pipe_config) | 805 | struct intel_crtc_state *pipe_config) |
794 | { | 806 | { |
795 | struct drm_device *dev = encoder->base.dev; | 807 | struct drm_device *dev = encoder->base.dev; |
796 | struct drm_i915_private *dev_priv = dev->dev_private; | 808 | struct drm_i915_private *dev_priv = to_i915(dev); |
797 | struct drm_display_mode *adjusted_mode = | 809 | struct drm_display_mode *adjusted_mode = |
798 | &pipe_config->base.adjusted_mode; | 810 | &pipe_config->base.adjusted_mode; |
799 | struct drm_display_mode *adjusted_mode_sw; | 811 | struct drm_display_mode *adjusted_mode_sw; |
@@ -953,8 +965,6 @@ static void intel_dsi_get_config(struct intel_encoder *encoder, | |||
953 | u32 pclk; | 965 | u32 pclk; |
954 | DRM_DEBUG_KMS("\n"); | 966 | DRM_DEBUG_KMS("\n"); |
955 | 967 | ||
956 | pipe_config->has_dsi_encoder = true; | ||
957 | |||
958 | if (IS_BROXTON(dev)) | 968 | if (IS_BROXTON(dev)) |
959 | bxt_dsi_get_pipe_config(encoder, pipe_config); | 969 | bxt_dsi_get_pipe_config(encoder, pipe_config); |
960 | 970 | ||
@@ -1012,7 +1022,7 @@ static void set_dsi_timings(struct drm_encoder *encoder, | |||
1012 | const struct drm_display_mode *adjusted_mode) | 1022 | const struct drm_display_mode *adjusted_mode) |
1013 | { | 1023 | { |
1014 | struct drm_device *dev = encoder->dev; | 1024 | struct drm_device *dev = encoder->dev; |
1015 | struct drm_i915_private *dev_priv = dev->dev_private; | 1025 | struct drm_i915_private *dev_priv = to_i915(dev); |
1016 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); | 1026 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); |
1017 | enum port port; | 1027 | enum port port; |
1018 | unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); | 1028 | unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); |
@@ -1098,7 +1108,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder) | |||
1098 | { | 1108 | { |
1099 | struct drm_encoder *encoder = &intel_encoder->base; | 1109 | struct drm_encoder *encoder = &intel_encoder->base; |
1100 | struct drm_device *dev = encoder->dev; | 1110 | struct drm_device *dev = encoder->dev; |
1101 | struct drm_i915_private *dev_priv = dev->dev_private; | 1111 | struct drm_i915_private *dev_priv = to_i915(dev); |
1102 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 1112 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
1103 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); | 1113 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); |
1104 | const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; | 1114 | const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; |
@@ -1171,6 +1181,12 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder) | |||
1171 | if (intel_dsi->clock_stop) | 1181 | if (intel_dsi->clock_stop) |
1172 | tmp |= CLOCKSTOP; | 1182 | tmp |= CLOCKSTOP; |
1173 | 1183 | ||
1184 | if (IS_BROXTON(dev_priv)) { | ||
1185 | tmp |= BXT_DPHY_DEFEATURE_EN; | ||
1186 | if (!is_cmd_mode(intel_dsi)) | ||
1187 | tmp |= BXT_DEFEATURE_DPI_FIFO_CTR; | ||
1188 | } | ||
1189 | |||
1174 | for_each_dsi_port(port, intel_dsi->ports) { | 1190 | for_each_dsi_port(port, intel_dsi->ports) { |
1175 | I915_WRITE(MIPI_DSI_FUNC_PRG(port), val); | 1191 | I915_WRITE(MIPI_DSI_FUNC_PRG(port), val); |
1176 | 1192 | ||
@@ -1378,12 +1394,13 @@ static const struct drm_encoder_funcs intel_dsi_funcs = { | |||
1378 | static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs = { | 1394 | static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs = { |
1379 | .get_modes = intel_dsi_get_modes, | 1395 | .get_modes = intel_dsi_get_modes, |
1380 | .mode_valid = intel_dsi_mode_valid, | 1396 | .mode_valid = intel_dsi_mode_valid, |
1381 | .best_encoder = intel_best_encoder, | ||
1382 | }; | 1397 | }; |
1383 | 1398 | ||
1384 | static const struct drm_connector_funcs intel_dsi_connector_funcs = { | 1399 | static const struct drm_connector_funcs intel_dsi_connector_funcs = { |
1385 | .dpms = drm_atomic_helper_connector_dpms, | 1400 | .dpms = drm_atomic_helper_connector_dpms, |
1386 | .detect = intel_dsi_detect, | 1401 | .detect = intel_dsi_detect, |
1402 | .late_register = intel_connector_register, | ||
1403 | .early_unregister = intel_connector_unregister, | ||
1387 | .destroy = intel_dsi_connector_destroy, | 1404 | .destroy = intel_dsi_connector_destroy, |
1388 | .fill_modes = drm_helper_probe_single_connector_modes, | 1405 | .fill_modes = drm_helper_probe_single_connector_modes, |
1389 | .set_property = intel_dsi_set_property, | 1406 | .set_property = intel_dsi_set_property, |
@@ -1413,7 +1430,7 @@ void intel_dsi_init(struct drm_device *dev) | |||
1413 | struct intel_connector *intel_connector; | 1430 | struct intel_connector *intel_connector; |
1414 | struct drm_connector *connector; | 1431 | struct drm_connector *connector; |
1415 | struct drm_display_mode *scan, *fixed_mode = NULL; | 1432 | struct drm_display_mode *scan, *fixed_mode = NULL; |
1416 | struct drm_i915_private *dev_priv = dev->dev_private; | 1433 | struct drm_i915_private *dev_priv = to_i915(dev); |
1417 | enum port port; | 1434 | enum port port; |
1418 | unsigned int i; | 1435 | unsigned int i; |
1419 | 1436 | ||
@@ -1449,7 +1466,7 @@ void intel_dsi_init(struct drm_device *dev) | |||
1449 | connector = &intel_connector->base; | 1466 | connector = &intel_connector->base; |
1450 | 1467 | ||
1451 | drm_encoder_init(dev, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI, | 1468 | drm_encoder_init(dev, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI, |
1452 | NULL); | 1469 | "DSI %c", port_name(port)); |
1453 | 1470 | ||
1454 | intel_encoder->compute_config = intel_dsi_compute_config; | 1471 | intel_encoder->compute_config = intel_dsi_compute_config; |
1455 | intel_encoder->pre_enable = intel_dsi_pre_enable; | 1472 | intel_encoder->pre_enable = intel_dsi_pre_enable; |
@@ -1460,7 +1477,6 @@ void intel_dsi_init(struct drm_device *dev) | |||
1460 | intel_encoder->get_config = intel_dsi_get_config; | 1477 | intel_encoder->get_config = intel_dsi_get_config; |
1461 | 1478 | ||
1462 | intel_connector->get_hw_state = intel_connector_get_hw_state; | 1479 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
1463 | intel_connector->unregister = intel_connector_unregister; | ||
1464 | 1480 | ||
1465 | /* | 1481 | /* |
1466 | * On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI | 1482 | * On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI |
@@ -1473,10 +1489,42 @@ void intel_dsi_init(struct drm_device *dev) | |||
1473 | else | 1489 | else |
1474 | intel_encoder->crtc_mask = BIT(PIPE_B); | 1490 | intel_encoder->crtc_mask = BIT(PIPE_B); |
1475 | 1491 | ||
1476 | if (dev_priv->vbt.dsi.config->dual_link) | 1492 | if (dev_priv->vbt.dsi.config->dual_link) { |
1477 | intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C); | 1493 | intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C); |
1478 | else | 1494 | |
1495 | switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { | ||
1496 | case DL_DCS_PORT_A: | ||
1497 | intel_dsi->dcs_backlight_ports = BIT(PORT_A); | ||
1498 | break; | ||
1499 | case DL_DCS_PORT_C: | ||
1500 | intel_dsi->dcs_backlight_ports = BIT(PORT_C); | ||
1501 | break; | ||
1502 | default: | ||
1503 | case DL_DCS_PORT_A_AND_C: | ||
1504 | intel_dsi->dcs_backlight_ports = BIT(PORT_A) | BIT(PORT_C); | ||
1505 | break; | ||
1506 | } | ||
1507 | |||
1508 | switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { | ||
1509 | case DL_DCS_PORT_A: | ||
1510 | intel_dsi->dcs_cabc_ports = BIT(PORT_A); | ||
1511 | break; | ||
1512 | case DL_DCS_PORT_C: | ||
1513 | intel_dsi->dcs_cabc_ports = BIT(PORT_C); | ||
1514 | break; | ||
1515 | default: | ||
1516 | case DL_DCS_PORT_A_AND_C: | ||
1517 | intel_dsi->dcs_cabc_ports = BIT(PORT_A) | BIT(PORT_C); | ||
1518 | break; | ||
1519 | } | ||
1520 | } else { | ||
1479 | intel_dsi->ports = BIT(port); | 1521 | intel_dsi->ports = BIT(port); |
1522 | intel_dsi->dcs_backlight_ports = BIT(port); | ||
1523 | intel_dsi->dcs_cabc_ports = BIT(port); | ||
1524 | } | ||
1525 | |||
1526 | if (!dev_priv->vbt.dsi.config->cabc_supported) | ||
1527 | intel_dsi->dcs_cabc_ports = 0; | ||
1480 | 1528 | ||
1481 | /* Create a DSI host (and a device) for each port. */ | 1529 | /* Create a DSI host (and a device) for each port. */ |
1482 | for_each_dsi_port(port, intel_dsi->ports) { | 1530 | for_each_dsi_port(port, intel_dsi->ports) { |
@@ -1549,13 +1597,10 @@ void intel_dsi_init(struct drm_device *dev) | |||
1549 | connector->display_info.height_mm = fixed_mode->height_mm; | 1597 | connector->display_info.height_mm = fixed_mode->height_mm; |
1550 | 1598 | ||
1551 | intel_panel_init(&intel_connector->panel, fixed_mode, NULL); | 1599 | intel_panel_init(&intel_connector->panel, fixed_mode, NULL); |
1600 | intel_panel_setup_backlight(connector, INVALID_PIPE); | ||
1552 | 1601 | ||
1553 | intel_dsi_add_properties(intel_connector); | 1602 | intel_dsi_add_properties(intel_connector); |
1554 | 1603 | ||
1555 | drm_connector_register(connector); | ||
1556 | |||
1557 | intel_panel_setup_backlight(connector, INVALID_PIPE); | ||
1558 | |||
1559 | return; | 1604 | return; |
1560 | 1605 | ||
1561 | err: | 1606 | err: |