aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_display.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7b1b18d8f45c..8c4e384b8ae1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7951,12 +7951,17 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
7951 else 7951 else
7952 i9xx_clock(refclk, &clock); 7952 i9xx_clock(refclk, &clock);
7953 } else { 7953 } else {
7954 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN); 7954 u32 lvds = I915_READ(LVDS);
7955 bool is_lvds = (pipe == 1) && (lvds & LVDS_PORT_EN);
7955 7956
7956 if (is_lvds) { 7957 if (is_lvds) {
7957 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >> 7958 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
7958 DPLL_FPA01_P1_POST_DIV_SHIFT); 7959 DPLL_FPA01_P1_POST_DIV_SHIFT);
7959 clock.p2 = 14; 7960
7961 if (lvds & LVDS_CLKB_POWER_UP)
7962 clock.p2 = 7;
7963 else
7964 clock.p2 = 14;
7960 } else { 7965 } else {
7961 if (dpll & PLL_P1_DIVIDE_BY_TWO) 7966 if (dpll & PLL_P1_DIVIDE_BY_TWO)
7962 clock.p1 = 2; 7967 clock.p1 = 2;