diff options
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/amd_powerplay.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 264 |
1 files changed, 206 insertions, 58 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index 9d2290044708..aba587cfce81 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c | |||
@@ -37,6 +37,12 @@ | |||
37 | return -EINVAL; \ | 37 | return -EINVAL; \ |
38 | } while (0) | 38 | } while (0) |
39 | 39 | ||
40 | #define PP_CHECK_HW(hwmgr) \ | ||
41 | do { \ | ||
42 | if ((hwmgr) == NULL || (hwmgr)->hwmgr_func == NULL) \ | ||
43 | return -EINVAL; \ | ||
44 | } while (0) | ||
45 | |||
40 | static int pp_early_init(void *handle) | 46 | static int pp_early_init(void *handle) |
41 | { | 47 | { |
42 | return 0; | 48 | return 0; |
@@ -54,8 +60,9 @@ static int pp_sw_init(void *handle) | |||
54 | pp_handle = (struct pp_instance *)handle; | 60 | pp_handle = (struct pp_instance *)handle; |
55 | hwmgr = pp_handle->hwmgr; | 61 | hwmgr = pp_handle->hwmgr; |
56 | 62 | ||
57 | if (hwmgr == NULL || hwmgr->pptable_func == NULL || | 63 | PP_CHECK_HW(hwmgr); |
58 | hwmgr->hwmgr_func == NULL || | 64 | |
65 | if (hwmgr->pptable_func == NULL || | ||
59 | hwmgr->pptable_func->pptable_init == NULL || | 66 | hwmgr->pptable_func->pptable_init == NULL || |
60 | hwmgr->hwmgr_func->backend_init == NULL) | 67 | hwmgr->hwmgr_func->backend_init == NULL) |
61 | return -EINVAL; | 68 | return -EINVAL; |
@@ -66,9 +73,9 @@ static int pp_sw_init(void *handle) | |||
66 | ret = hwmgr->hwmgr_func->backend_init(hwmgr); | 73 | ret = hwmgr->hwmgr_func->backend_init(hwmgr); |
67 | 74 | ||
68 | if (ret) | 75 | if (ret) |
69 | printk("amdgpu: powerplay initialization failed\n"); | 76 | printk(KERN_ERR "amdgpu: powerplay initialization failed\n"); |
70 | else | 77 | else |
71 | printk("amdgpu: powerplay initialized\n"); | 78 | printk(KERN_INFO "amdgpu: powerplay initialized\n"); |
72 | 79 | ||
73 | return ret; | 80 | return ret; |
74 | } | 81 | } |
@@ -85,8 +92,9 @@ static int pp_sw_fini(void *handle) | |||
85 | pp_handle = (struct pp_instance *)handle; | 92 | pp_handle = (struct pp_instance *)handle; |
86 | hwmgr = pp_handle->hwmgr; | 93 | hwmgr = pp_handle->hwmgr; |
87 | 94 | ||
88 | if (hwmgr != NULL || hwmgr->hwmgr_func != NULL || | 95 | PP_CHECK_HW(hwmgr); |
89 | hwmgr->hwmgr_func->backend_fini != NULL) | 96 | |
97 | if (hwmgr->hwmgr_func->backend_fini != NULL) | ||
90 | ret = hwmgr->hwmgr_func->backend_fini(hwmgr); | 98 | ret = hwmgr->hwmgr_func->backend_fini(hwmgr); |
91 | 99 | ||
92 | return ret; | 100 | return ret; |
@@ -172,21 +180,117 @@ static int pp_sw_reset(void *handle) | |||
172 | return 0; | 180 | return 0; |
173 | } | 181 | } |
174 | 182 | ||
175 | static void pp_print_status(void *handle) | ||
176 | { | ||
177 | |||
178 | } | ||
179 | 183 | ||
180 | static int pp_set_clockgating_state(void *handle, | 184 | static int pp_set_clockgating_state(void *handle, |
181 | enum amd_clockgating_state state) | 185 | enum amd_clockgating_state state) |
182 | { | 186 | { |
187 | struct pp_hwmgr *hwmgr; | ||
188 | uint32_t msg_id, pp_state; | ||
189 | |||
190 | if (handle == NULL) | ||
191 | return -EINVAL; | ||
192 | |||
193 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | ||
194 | |||
195 | PP_CHECK_HW(hwmgr); | ||
196 | |||
197 | if (hwmgr->hwmgr_func->update_clock_gatings == NULL) { | ||
198 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | if (state == AMD_CG_STATE_UNGATE) | ||
203 | pp_state = 0; | ||
204 | else | ||
205 | pp_state = PP_STATE_CG | PP_STATE_LS; | ||
206 | |||
207 | /* Enable/disable GFX blocks clock gating through SMU */ | ||
208 | msg_id = PP_CG_MSG_ID(PP_GROUP_GFX, | ||
209 | PP_BLOCK_GFX_CG, | ||
210 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
211 | pp_state); | ||
212 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
213 | msg_id = PP_CG_MSG_ID(PP_GROUP_GFX, | ||
214 | PP_BLOCK_GFX_3D, | ||
215 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
216 | pp_state); | ||
217 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
218 | msg_id = PP_CG_MSG_ID(PP_GROUP_GFX, | ||
219 | PP_BLOCK_GFX_RLC, | ||
220 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
221 | pp_state); | ||
222 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
223 | msg_id = PP_CG_MSG_ID(PP_GROUP_GFX, | ||
224 | PP_BLOCK_GFX_CP, | ||
225 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
226 | pp_state); | ||
227 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
228 | msg_id = PP_CG_MSG_ID(PP_GROUP_GFX, | ||
229 | PP_BLOCK_GFX_MG, | ||
230 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
231 | pp_state); | ||
232 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
233 | |||
234 | /* Enable/disable System blocks clock gating through SMU */ | ||
235 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
236 | PP_BLOCK_SYS_BIF, | ||
237 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
238 | pp_state); | ||
239 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
240 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
241 | PP_BLOCK_SYS_BIF, | ||
242 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
243 | pp_state); | ||
244 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
245 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
246 | PP_BLOCK_SYS_MC, | ||
247 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
248 | pp_state); | ||
249 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
250 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
251 | PP_BLOCK_SYS_ROM, | ||
252 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
253 | pp_state); | ||
254 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
255 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
256 | PP_BLOCK_SYS_DRM, | ||
257 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
258 | pp_state); | ||
259 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
260 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
261 | PP_BLOCK_SYS_HDP, | ||
262 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
263 | pp_state); | ||
264 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
265 | msg_id = PP_CG_MSG_ID(PP_GROUP_SYS, | ||
266 | PP_BLOCK_SYS_SDMA, | ||
267 | PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS, | ||
268 | pp_state); | ||
269 | hwmgr->hwmgr_func->update_clock_gatings(hwmgr, &msg_id); | ||
270 | |||
183 | return 0; | 271 | return 0; |
184 | } | 272 | } |
185 | 273 | ||
186 | static int pp_set_powergating_state(void *handle, | 274 | static int pp_set_powergating_state(void *handle, |
187 | enum amd_powergating_state state) | 275 | enum amd_powergating_state state) |
188 | { | 276 | { |
189 | return 0; | 277 | struct pp_hwmgr *hwmgr; |
278 | |||
279 | if (handle == NULL) | ||
280 | return -EINVAL; | ||
281 | |||
282 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | ||
283 | |||
284 | PP_CHECK_HW(hwmgr); | ||
285 | |||
286 | if (hwmgr->hwmgr_func->enable_per_cu_power_gating == NULL) { | ||
287 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
288 | return 0; | ||
289 | } | ||
290 | |||
291 | /* Enable/disable GFX per cu powergating through SMU */ | ||
292 | return hwmgr->hwmgr_func->enable_per_cu_power_gating(hwmgr, | ||
293 | state == AMD_PG_STATE_GATE ? true : false); | ||
190 | } | 294 | } |
191 | 295 | ||
192 | static int pp_suspend(void *handle) | 296 | static int pp_suspend(void *handle) |
@@ -247,7 +351,6 @@ const struct amd_ip_funcs pp_ip_funcs = { | |||
247 | .is_idle = pp_is_idle, | 351 | .is_idle = pp_is_idle, |
248 | .wait_for_idle = pp_wait_for_idle, | 352 | .wait_for_idle = pp_wait_for_idle, |
249 | .soft_reset = pp_sw_reset, | 353 | .soft_reset = pp_sw_reset, |
250 | .print_status = pp_print_status, | ||
251 | .set_clockgating_state = pp_set_clockgating_state, | 354 | .set_clockgating_state = pp_set_clockgating_state, |
252 | .set_powergating_state = pp_set_powergating_state, | 355 | .set_powergating_state = pp_set_powergating_state, |
253 | }; | 356 | }; |
@@ -275,9 +378,12 @@ static int pp_dpm_force_performance_level(void *handle, | |||
275 | 378 | ||
276 | hwmgr = pp_handle->hwmgr; | 379 | hwmgr = pp_handle->hwmgr; |
277 | 380 | ||
278 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 381 | PP_CHECK_HW(hwmgr); |
279 | hwmgr->hwmgr_func->force_dpm_level == NULL) | 382 | |
280 | return -EINVAL; | 383 | if (hwmgr->hwmgr_func->force_dpm_level == NULL) { |
384 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
385 | return 0; | ||
386 | } | ||
281 | 387 | ||
282 | hwmgr->hwmgr_func->force_dpm_level(hwmgr, level); | 388 | hwmgr->hwmgr_func->force_dpm_level(hwmgr, level); |
283 | 389 | ||
@@ -309,9 +415,12 @@ static int pp_dpm_get_sclk(void *handle, bool low) | |||
309 | 415 | ||
310 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 416 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
311 | 417 | ||
312 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 418 | PP_CHECK_HW(hwmgr); |
313 | hwmgr->hwmgr_func->get_sclk == NULL) | 419 | |
314 | return -EINVAL; | 420 | if (hwmgr->hwmgr_func->get_sclk == NULL) { |
421 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
422 | return 0; | ||
423 | } | ||
315 | 424 | ||
316 | return hwmgr->hwmgr_func->get_sclk(hwmgr, low); | 425 | return hwmgr->hwmgr_func->get_sclk(hwmgr, low); |
317 | } | 426 | } |
@@ -325,9 +434,12 @@ static int pp_dpm_get_mclk(void *handle, bool low) | |||
325 | 434 | ||
326 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 435 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
327 | 436 | ||
328 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 437 | PP_CHECK_HW(hwmgr); |
329 | hwmgr->hwmgr_func->get_mclk == NULL) | 438 | |
330 | return -EINVAL; | 439 | if (hwmgr->hwmgr_func->get_mclk == NULL) { |
440 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
441 | return 0; | ||
442 | } | ||
331 | 443 | ||
332 | return hwmgr->hwmgr_func->get_mclk(hwmgr, low); | 444 | return hwmgr->hwmgr_func->get_mclk(hwmgr, low); |
333 | } | 445 | } |
@@ -341,9 +453,12 @@ static int pp_dpm_powergate_vce(void *handle, bool gate) | |||
341 | 453 | ||
342 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 454 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
343 | 455 | ||
344 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 456 | PP_CHECK_HW(hwmgr); |
345 | hwmgr->hwmgr_func->powergate_vce == NULL) | 457 | |
346 | return -EINVAL; | 458 | if (hwmgr->hwmgr_func->powergate_vce == NULL) { |
459 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
460 | return 0; | ||
461 | } | ||
347 | 462 | ||
348 | return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate); | 463 | return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate); |
349 | } | 464 | } |
@@ -357,9 +472,12 @@ static int pp_dpm_powergate_uvd(void *handle, bool gate) | |||
357 | 472 | ||
358 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 473 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
359 | 474 | ||
360 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 475 | PP_CHECK_HW(hwmgr); |
361 | hwmgr->hwmgr_func->powergate_uvd == NULL) | 476 | |
362 | return -EINVAL; | 477 | if (hwmgr->hwmgr_func->powergate_uvd == NULL) { |
478 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
479 | return 0; | ||
480 | } | ||
363 | 481 | ||
364 | return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate); | 482 | return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate); |
365 | } | 483 | } |
@@ -455,10 +573,14 @@ pp_debugfs_print_current_performance_level(void *handle, | |||
455 | 573 | ||
456 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 574 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
457 | 575 | ||
458 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 576 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL) |
459 | hwmgr->hwmgr_func->print_current_perforce_level == NULL) | ||
460 | return; | 577 | return; |
461 | 578 | ||
579 | if (hwmgr->hwmgr_func->print_current_perforce_level == NULL) { | ||
580 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
581 | return; | ||
582 | } | ||
583 | |||
462 | hwmgr->hwmgr_func->print_current_perforce_level(hwmgr, m); | 584 | hwmgr->hwmgr_func->print_current_perforce_level(hwmgr, m); |
463 | } | 585 | } |
464 | 586 | ||
@@ -471,9 +593,12 @@ static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode) | |||
471 | 593 | ||
472 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 594 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
473 | 595 | ||
474 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 596 | PP_CHECK_HW(hwmgr); |
475 | hwmgr->hwmgr_func->set_fan_control_mode == NULL) | 597 | |
476 | return -EINVAL; | 598 | if (hwmgr->hwmgr_func->set_fan_control_mode == NULL) { |
599 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
600 | return 0; | ||
601 | } | ||
477 | 602 | ||
478 | return hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode); | 603 | return hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode); |
479 | } | 604 | } |
@@ -487,9 +612,12 @@ static int pp_dpm_get_fan_control_mode(void *handle) | |||
487 | 612 | ||
488 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 613 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
489 | 614 | ||
490 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 615 | PP_CHECK_HW(hwmgr); |
491 | hwmgr->hwmgr_func->get_fan_control_mode == NULL) | 616 | |
492 | return -EINVAL; | 617 | if (hwmgr->hwmgr_func->get_fan_control_mode == NULL) { |
618 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
619 | return 0; | ||
620 | } | ||
493 | 621 | ||
494 | return hwmgr->hwmgr_func->get_fan_control_mode(hwmgr); | 622 | return hwmgr->hwmgr_func->get_fan_control_mode(hwmgr); |
495 | } | 623 | } |
@@ -503,9 +631,12 @@ static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent) | |||
503 | 631 | ||
504 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 632 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
505 | 633 | ||
506 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 634 | PP_CHECK_HW(hwmgr); |
507 | hwmgr->hwmgr_func->set_fan_speed_percent == NULL) | 635 | |
508 | return -EINVAL; | 636 | if (hwmgr->hwmgr_func->set_fan_speed_percent == NULL) { |
637 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
638 | return 0; | ||
639 | } | ||
509 | 640 | ||
510 | return hwmgr->hwmgr_func->set_fan_speed_percent(hwmgr, percent); | 641 | return hwmgr->hwmgr_func->set_fan_speed_percent(hwmgr, percent); |
511 | } | 642 | } |
@@ -519,9 +650,12 @@ static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed) | |||
519 | 650 | ||
520 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 651 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
521 | 652 | ||
522 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 653 | PP_CHECK_HW(hwmgr); |
523 | hwmgr->hwmgr_func->get_fan_speed_percent == NULL) | 654 | |
524 | return -EINVAL; | 655 | if (hwmgr->hwmgr_func->get_fan_speed_percent == NULL) { |
656 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
657 | return 0; | ||
658 | } | ||
525 | 659 | ||
526 | return hwmgr->hwmgr_func->get_fan_speed_percent(hwmgr, speed); | 660 | return hwmgr->hwmgr_func->get_fan_speed_percent(hwmgr, speed); |
527 | } | 661 | } |
@@ -535,9 +669,12 @@ static int pp_dpm_get_temperature(void *handle) | |||
535 | 669 | ||
536 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 670 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
537 | 671 | ||
538 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 672 | PP_CHECK_HW(hwmgr); |
539 | hwmgr->hwmgr_func->get_temperature == NULL) | 673 | |
540 | return -EINVAL; | 674 | if (hwmgr->hwmgr_func->get_temperature == NULL) { |
675 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
676 | return 0; | ||
677 | } | ||
541 | 678 | ||
542 | return hwmgr->hwmgr_func->get_temperature(hwmgr); | 679 | return hwmgr->hwmgr_func->get_temperature(hwmgr); |
543 | } | 680 | } |
@@ -591,9 +728,12 @@ static int pp_dpm_get_pp_table(void *handle, char **table) | |||
591 | 728 | ||
592 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 729 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
593 | 730 | ||
594 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 731 | PP_CHECK_HW(hwmgr); |
595 | hwmgr->hwmgr_func->get_pp_table == NULL) | 732 | |
596 | return -EINVAL; | 733 | if (hwmgr->hwmgr_func->get_pp_table == NULL) { |
734 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
735 | return 0; | ||
736 | } | ||
597 | 737 | ||
598 | return hwmgr->hwmgr_func->get_pp_table(hwmgr, table); | 738 | return hwmgr->hwmgr_func->get_pp_table(hwmgr, table); |
599 | } | 739 | } |
@@ -607,15 +747,18 @@ static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size) | |||
607 | 747 | ||
608 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 748 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
609 | 749 | ||
610 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 750 | PP_CHECK_HW(hwmgr); |
611 | hwmgr->hwmgr_func->set_pp_table == NULL) | 751 | |
612 | return -EINVAL; | 752 | if (hwmgr->hwmgr_func->set_pp_table == NULL) { |
753 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
754 | return 0; | ||
755 | } | ||
613 | 756 | ||
614 | return hwmgr->hwmgr_func->set_pp_table(hwmgr, buf, size); | 757 | return hwmgr->hwmgr_func->set_pp_table(hwmgr, buf, size); |
615 | } | 758 | } |
616 | 759 | ||
617 | static int pp_dpm_force_clock_level(void *handle, | 760 | static int pp_dpm_force_clock_level(void *handle, |
618 | enum pp_clock_type type, int level) | 761 | enum pp_clock_type type, uint32_t mask) |
619 | { | 762 | { |
620 | struct pp_hwmgr *hwmgr; | 763 | struct pp_hwmgr *hwmgr; |
621 | 764 | ||
@@ -624,11 +767,14 @@ static int pp_dpm_force_clock_level(void *handle, | |||
624 | 767 | ||
625 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 768 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
626 | 769 | ||
627 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 770 | PP_CHECK_HW(hwmgr); |
628 | hwmgr->hwmgr_func->force_clock_level == NULL) | ||
629 | return -EINVAL; | ||
630 | 771 | ||
631 | return hwmgr->hwmgr_func->force_clock_level(hwmgr, type, level); | 772 | if (hwmgr->hwmgr_func->force_clock_level == NULL) { |
773 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
774 | return 0; | ||
775 | } | ||
776 | |||
777 | return hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask); | ||
632 | } | 778 | } |
633 | 779 | ||
634 | static int pp_dpm_print_clock_levels(void *handle, | 780 | static int pp_dpm_print_clock_levels(void *handle, |
@@ -641,10 +787,12 @@ static int pp_dpm_print_clock_levels(void *handle, | |||
641 | 787 | ||
642 | hwmgr = ((struct pp_instance *)handle)->hwmgr; | 788 | hwmgr = ((struct pp_instance *)handle)->hwmgr; |
643 | 789 | ||
644 | if (hwmgr == NULL || hwmgr->hwmgr_func == NULL || | 790 | PP_CHECK_HW(hwmgr); |
645 | hwmgr->hwmgr_func->print_clock_levels == NULL) | ||
646 | return -EINVAL; | ||
647 | 791 | ||
792 | if (hwmgr->hwmgr_func->print_clock_levels == NULL) { | ||
793 | printk(KERN_INFO "%s was not implemented.\n", __func__); | ||
794 | return 0; | ||
795 | } | ||
648 | return hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf); | 796 | return hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf); |
649 | } | 797 | } |
650 | 798 | ||