aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-versatile/Makefile2
-rw-r--r--arch/arm/mach-versatile/core.c331
-rw-r--r--arch/arm/mach-versatile/core.h41
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h32
-rw-r--r--arch/arm/mach-versatile/include/mach/platform.h242
-rw-r--r--arch/arm/mach-versatile/versatile_dt.c325
6 files changed, 325 insertions, 648 deletions
diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile
index ccef51284d0d..41b124b5107b 100644
--- a/arch/arm/mach-versatile/Makefile
+++ b/arch/arm/mach-versatile/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := core.o versatile_dt.o 5obj-y := versatile_dt.o
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
deleted file mode 100644
index 072ae192421c..000000000000
--- a/arch/arm/mach-versatile/core.c
+++ /dev/null
@@ -1,331 +0,0 @@
1/*
2 * linux/arch/arm/mach-versatile/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/init.h>
22#include <linux/device.h>
23#include <linux/dma-mapping.h>
24#include <linux/platform_device.h>
25#include <linux/interrupt.h>
26#include <linux/of_platform.h>
27#include <linux/amba/bus.h>
28#include <linux/amba/clcd.h>
29#include <linux/platform_data/video-clcd-versatile.h>
30#include <linux/amba/mmci.h>
31#include <linux/io.h>
32#include <linux/mtd/physmap.h>
33#include <linux/reboot.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <mach/hardware.h>
38#include <mach/platform.h>
39
40#include "core.h"
41
42static struct map_desc versatile_io_desc[] __initdata __maybe_unused = {
43 {
44 .virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
45 .pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
46 .length = SZ_4K,
47 .type = MT_DEVICE
48 }, {
49 .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
50 .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
51 .length = SZ_4K * 9,
52 .type = MT_DEVICE
53 },
54 {
55 .virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
56 .pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
57 .length = SZ_64M,
58 .type = MT_DEVICE
59 },
60};
61
62void __init versatile_map_io(void)
63{
64 debug_ll_io_init();
65 iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc));
66}
67
68
69#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)
70
71static void versatile_flash_set_vpp(struct platform_device *pdev, int on)
72{
73 u32 val;
74
75 val = __raw_readl(VERSATILE_FLASHCTRL);
76 if (on)
77 val |= VERSATILE_FLASHPROG_FLVPPEN;
78 else
79 val &= ~VERSATILE_FLASHPROG_FLVPPEN;
80 __raw_writel(val, VERSATILE_FLASHCTRL);
81}
82
83static struct physmap_flash_data versatile_flash_data = {
84 .width = 4,
85 .set_vpp = versatile_flash_set_vpp,
86};
87
88static struct resource versatile_flash_resource = {
89 .start = VERSATILE_FLASH_BASE,
90 .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1,
91 .flags = IORESOURCE_MEM,
92};
93
94struct platform_device versatile_flash_device = {
95 .name = "physmap-flash",
96 .id = 0,
97 .dev = {
98 .platform_data = &versatile_flash_data,
99 },
100 .num_resources = 1,
101 .resource = &versatile_flash_resource,
102};
103
104#define VERSATILE_SYSMCI (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_MCI_OFFSET)
105
106unsigned int mmc_status(struct device *dev)
107{
108 struct amba_device *adev = container_of(dev, struct amba_device, dev);
109 u32 mask;
110
111 if (adev->res.start == VERSATILE_MMCI0_BASE)
112 mask = 1;
113 else
114 mask = 2;
115
116 return readl(VERSATILE_SYSMCI) & mask;
117}
118
119static struct mmci_platform_data mmc0_plat_data = {
120 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
121 .status = mmc_status,
122 .gpio_wp = -1,
123 .gpio_cd = -1,
124};
125
126static struct mmci_platform_data mmc1_plat_data = {
127 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
128 .status = mmc_status,
129 .gpio_wp = -1,
130 .gpio_cd = -1,
131};
132
133/*
134 * CLCD support.
135 */
136#define SYS_CLCD_MODE_MASK (3 << 0)
137#define SYS_CLCD_MODE_888 (0 << 0)
138#define SYS_CLCD_MODE_5551 (1 << 0)
139#define SYS_CLCD_MODE_565_RLSB (2 << 0)
140#define SYS_CLCD_MODE_565_BLSB (3 << 0)
141#define SYS_CLCD_NLCDIOON (1 << 2)
142#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
143#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
144#define SYS_CLCD_ID_MASK (0x1f << 8)
145#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
146#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
147#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
148#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
149#define SYS_CLCD_ID_VGA (0x1f << 8)
150
151static bool is_sanyo_2_5_lcd;
152
153/*
154 * Disable all display connectors on the interface module.
155 */
156static void versatile_clcd_disable(struct clcd_fb *fb)
157{
158 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
159 u32 val;
160
161 val = readl(sys_clcd);
162 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
163 writel(val, sys_clcd);
164
165 /*
166 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
167 */
168 if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) {
169 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
170 unsigned long ctrl;
171
172 ctrl = readl(versatile_ib2_ctrl);
173 ctrl &= ~0x01;
174 writel(ctrl, versatile_ib2_ctrl);
175 }
176}
177
178/*
179 * Enable the relevant connector on the interface module.
180 */
181static void versatile_clcd_enable(struct clcd_fb *fb)
182{
183 struct fb_var_screeninfo *var = &fb->fb.var;
184 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
185 u32 val;
186
187 val = readl(sys_clcd);
188 val &= ~SYS_CLCD_MODE_MASK;
189
190 switch (var->green.length) {
191 case 5:
192 val |= SYS_CLCD_MODE_5551;
193 break;
194 case 6:
195 if (var->red.offset == 0)
196 val |= SYS_CLCD_MODE_565_RLSB;
197 else
198 val |= SYS_CLCD_MODE_565_BLSB;
199 break;
200 case 8:
201 val |= SYS_CLCD_MODE_888;
202 break;
203 }
204
205 /*
206 * Set the MUX
207 */
208 writel(val, sys_clcd);
209
210 /*
211 * And now enable the PSUs
212 */
213 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
214 writel(val, sys_clcd);
215
216 /*
217 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
218 */
219 if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) {
220 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
221 unsigned long ctrl;
222
223 ctrl = readl(versatile_ib2_ctrl);
224 ctrl |= 0x01;
225 writel(ctrl, versatile_ib2_ctrl);
226 }
227}
228
229/*
230 * Detect which LCD panel is connected, and return the appropriate
231 * clcd_panel structure. Note: we do not have any information on
232 * the required timings for the 8.4in panel, so we presently assume
233 * VGA timings.
234 */
235static int versatile_clcd_setup(struct clcd_fb *fb)
236{
237 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
238 const char *panel_name;
239 u32 val;
240
241 is_sanyo_2_5_lcd = false;
242
243 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
244 if (val == SYS_CLCD_ID_SANYO_3_8)
245 panel_name = "Sanyo TM38QV67A02A";
246 else if (val == SYS_CLCD_ID_SANYO_2_5) {
247 panel_name = "Sanyo QVGA Portrait";
248 is_sanyo_2_5_lcd = true;
249 } else if (val == SYS_CLCD_ID_EPSON_2_2)
250 panel_name = "Epson L2F50113T00";
251 else if (val == SYS_CLCD_ID_VGA)
252 panel_name = "VGA";
253 else {
254 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
255 val);
256 panel_name = "VGA";
257 }
258
259 fb->panel = versatile_clcd_get_panel(panel_name);
260 if (!fb->panel)
261 return -EINVAL;
262
263 return versatile_clcd_setup_dma(fb, SZ_1M);
264}
265
266static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs)
267{
268 clcdfb_decode(fb, regs);
269
270 /* Always clear BGR for RGB565: we do the routing externally */
271 if (fb->fb.var.green.length == 6)
272 regs->cntl &= ~CNTL_BGR;
273}
274
275static struct clcd_board clcd_plat_data = {
276 .name = "Versatile",
277 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
278 .check = clcdfb_check,
279 .decode = versatile_clcd_decode,
280 .disable = versatile_clcd_disable,
281 .enable = versatile_clcd_enable,
282 .setup = versatile_clcd_setup,
283 .mmap = versatile_clcd_mmap_dma,
284 .remove = versatile_clcd_remove_dma,
285};
286
287/*
288 * Lookup table for attaching a specific name and platform_data pointer to
289 * devices as they get created by of_platform_populate(). Ideally this table
290 * would not exist, but the current clock implementation depends on some devices
291 * having a specific name.
292 */
293struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = {
294 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data),
295 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", &mmc1_plat_data),
296
297 OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data),
298
299 {}
300};
301
302void versatile_restart(enum reboot_mode mode, const char *cmd)
303{
304 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
305 u32 val;
306
307 val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET);
308 val |= 0x105;
309
310 __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET);
311 __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET);
312 __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET);
313}
314
315/* Early initializations */
316void __init versatile_init_early(void)
317{
318 u32 val;
319
320 /*
321 * set clock frequency:
322 * VERSATILE_REFCLK is 32KHz
323 * VERSATILE_TIMCLK is 1MHz
324 */
325 val = readl(__io_address(VERSATILE_SCTL_BASE));
326 writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |
327 (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
328 (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) |
329 (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val,
330 __io_address(VERSATILE_SCTL_BASE));
331}
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
deleted file mode 100644
index c3d71571fc7a..000000000000
--- a/arch/arm/mach-versatile/core.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * linux/arch/arm/mach-versatile/core.h
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_ARCH_VERSATILE_H
23#define __ASM_ARCH_VERSATILE_H
24
25#include <linux/amba/bus.h>
26#include <linux/of_platform.h>
27#include <linux/reboot.h>
28
29extern struct platform_device versatile_flash_device;
30
31extern void __init versatile_init_early(void);
32extern void __init versatile_init_irq(void);
33extern void __init versatile_map_io(void);
34extern void versatile_timer_init(void);
35extern void versatile_restart(enum reboot_mode, const char *);
36extern unsigned int mmc_status(struct device *dev);
37#ifdef CONFIG_OF
38extern struct of_dev_auxdata versatile_auxdata_lookup[];
39#endif
40
41#endif
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
deleted file mode 100644
index 22a1158b7e27..000000000000
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/hardware.h
3 *
4 * This file contains the hardware definitions of the Versatile boards.
5 *
6 * Copyright (C) 2003 ARM Limited.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
24
25#include <asm/sizes.h>
26
27/* macro to get at MMIO space when running virtually */
28#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
29
30#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
31
32#endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
deleted file mode 100644
index 7fe008bd1509..000000000000
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __address_h
22#define __address_h 1
23
24/*
25 * Memory definitions
26 */
27#define VERSATILE_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define VERSATILE_BOOT_ROM_HI 0x30000000
29#define VERSATILE_BOOT_ROM_BASE VERSATILE_BOOT_ROM_HI /* Normal position */
30#define VERSATILE_BOOT_ROM_SIZE SZ_64M
31
32#define VERSATILE_SSRAM_BASE /* VERSATILE_SSMC_BASE ? */
33#define VERSATILE_SSRAM_SIZE SZ_2M
34
35#define VERSATILE_FLASH_BASE 0x34000000
36#define VERSATILE_FLASH_SIZE SZ_64M
37
38/*
39 * SDRAM
40 */
41#define VERSATILE_SDRAM_BASE 0x00000000
42
43/*
44 * Logic expansion modules
45 *
46 */
47
48
49/* ------------------------------------------------------------------------
50 * Versatile Registers
51 * ------------------------------------------------------------------------
52 *
53 */
54#define VERSATILE_SYS_ID_OFFSET 0x00
55#define VERSATILE_SYS_SW_OFFSET 0x04
56#define VERSATILE_SYS_LED_OFFSET 0x08
57#define VERSATILE_SYS_OSC0_OFFSET 0x0C
58
59#if defined(CONFIG_ARCH_VERSATILE_PB)
60#define VERSATILE_SYS_OSC1_OFFSET 0x10
61#define VERSATILE_SYS_OSC2_OFFSET 0x14
62#define VERSATILE_SYS_OSC3_OFFSET 0x18
63#define VERSATILE_SYS_OSC4_OFFSET 0x1C
64#elif defined(CONFIG_MACH_VERSATILE_AB)
65#define VERSATILE_SYS_OSC1_OFFSET 0x1C
66#endif
67
68#define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c
69
70#define VERSATILE_SYS_LOCK_OFFSET 0x20
71#define VERSATILE_SYS_100HZ_OFFSET 0x24
72#define VERSATILE_SYS_CFGDATA1_OFFSET 0x28
73#define VERSATILE_SYS_CFGDATA2_OFFSET 0x2C
74#define VERSATILE_SYS_FLAGS_OFFSET 0x30
75#define VERSATILE_SYS_FLAGSSET_OFFSET 0x30
76#define VERSATILE_SYS_FLAGSCLR_OFFSET 0x34
77#define VERSATILE_SYS_NVFLAGS_OFFSET 0x38
78#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
79#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
80#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
81#define VERSATILE_SYS_PCICTL_OFFSET 0x44
82#define VERSATILE_SYS_MCI_OFFSET 0x48
83#define VERSATILE_SYS_FLASH_OFFSET 0x4C
84#define VERSATILE_SYS_CLCD_OFFSET 0x50
85#define VERSATILE_SYS_CLCDSER_OFFSET 0x54
86#define VERSATILE_SYS_BOOTCS_OFFSET 0x58
87#define VERSATILE_SYS_24MHz_OFFSET 0x5C
88#define VERSATILE_SYS_MISC_OFFSET 0x60
89#define VERSATILE_SYS_TEST_OSC0_OFFSET 0x80
90#define VERSATILE_SYS_TEST_OSC1_OFFSET 0x84
91#define VERSATILE_SYS_TEST_OSC2_OFFSET 0x88
92#define VERSATILE_SYS_TEST_OSC3_OFFSET 0x8C
93#define VERSATILE_SYS_TEST_OSC4_OFFSET 0x90
94
95#define VERSATILE_SYS_BASE 0x10000000
96#define VERSATILE_SYS_ID (VERSATILE_SYS_BASE + VERSATILE_SYS_ID_OFFSET)
97#define VERSATILE_SYS_SW (VERSATILE_SYS_BASE + VERSATILE_SYS_SW_OFFSET)
98#define VERSATILE_SYS_LED (VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET)
99#define VERSATILE_SYS_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC0_OFFSET)
100#define VERSATILE_SYS_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC1_OFFSET)
101
102#if defined(CONFIG_ARCH_VERSATILE_PB)
103#define VERSATILE_SYS_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC2_OFFSET)
104#define VERSATILE_SYS_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC3_OFFSET)
105#define VERSATILE_SYS_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC4_OFFSET)
106#endif
107
108#define VERSATILE_SYS_LOCK (VERSATILE_SYS_BASE + VERSATILE_SYS_LOCK_OFFSET)
109#define VERSATILE_SYS_100HZ (VERSATILE_SYS_BASE + VERSATILE_SYS_100HZ_OFFSET)
110#define VERSATILE_SYS_CFGDATA1 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA1_OFFSET)
111#define VERSATILE_SYS_CFGDATA2 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA2_OFFSET)
112#define VERSATILE_SYS_FLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGS_OFFSET)
113#define VERSATILE_SYS_FLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSSET_OFFSET)
114#define VERSATILE_SYS_FLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSCLR_OFFSET)
115#define VERSATILE_SYS_NVFLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGS_OFFSET)
116#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
117#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
118#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
119#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
120#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
121#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
122#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
123#define VERSATILE_SYS_CLCDSER (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCDSER_OFFSET)
124#define VERSATILE_SYS_BOOTCS (VERSATILE_SYS_BASE + VERSATILE_SYS_BOOTCS_OFFSET)
125#define VERSATILE_SYS_24MHz (VERSATILE_SYS_BASE + VERSATILE_SYS_24MHz_OFFSET)
126#define VERSATILE_SYS_MISC (VERSATILE_SYS_BASE + VERSATILE_SYS_MISC_OFFSET)
127#define VERSATILE_SYS_TEST_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC0_OFFSET)
128#define VERSATILE_SYS_TEST_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC1_OFFSET)
129#define VERSATILE_SYS_TEST_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC2_OFFSET)
130#define VERSATILE_SYS_TEST_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC3_OFFSET)
131#define VERSATILE_SYS_TEST_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC4_OFFSET)
132
133/*
134 * Values for VERSATILE_SYS_RESET_CTRL
135 */
136#define VERSATILE_SYS_CTRL_RESET_CONFIGCLR 0x01
137#define VERSATILE_SYS_CTRL_RESET_CONFIGINIT 0x02
138#define VERSATILE_SYS_CTRL_RESET_DLLRESET 0x03
139#define VERSATILE_SYS_CTRL_RESET_PLLRESET 0x04
140#define VERSATILE_SYS_CTRL_RESET_POR 0x05
141#define VERSATILE_SYS_CTRL_RESET_DoC 0x06
142
143#define VERSATILE_SYS_CTRL_LED (1 << 0)
144
145
146/* ------------------------------------------------------------------------
147 * Versatile control registers
148 * ------------------------------------------------------------------------
149 */
150
151/*
152 * VERSATILE_IDFIELD
153 *
154 * 31:24 = manufacturer (0x41 = ARM)
155 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
156 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
157 * 11:4 = build value
158 * 3:0 = revision number (0x1 = rev B (AHB))
159 */
160
161/*
162 * VERSATILE_SYS_LOCK
163 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
164 * SYS_CLD, SYS_BOOTCS
165 */
166#define VERSATILE_SYS_LOCK_LOCKED (1 << 16)
167#define VERSATILE_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
168
169/*
170 * VERSATILE_SYS_FLASH
171 */
172#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
173
174/*
175 * VERSATILE_INTREG
176 * - used to acknowledge and control MMCI and UART interrupts
177 */
178#define VERSATILE_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
179#define VERSATILE_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
180#define VERSATILE_INTREG_CARDIN 0x08 /* MMCI card in detect */
181 /* write 1 to acknowledge and clear */
182#define VERSATILE_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
183#define VERSATILE_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
184
185/*
186 * VERSATILE peripheral addresses
187 */
188#define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */
189#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */
190#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */
191#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
192#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
193
194/*
195 * LED settings, bits [7:0]
196 */
197#define VERSATILE_SYS_LED0 (1 << 0)
198#define VERSATILE_SYS_LED1 (1 << 1)
199#define VERSATILE_SYS_LED2 (1 << 2)
200#define VERSATILE_SYS_LED3 (1 << 3)
201#define VERSATILE_SYS_LED4 (1 << 4)
202#define VERSATILE_SYS_LED5 (1 << 5)
203#define VERSATILE_SYS_LED6 (1 << 6)
204#define VERSATILE_SYS_LED7 (1 << 7)
205
206#define ALL_LEDS 0xFF
207
208#define LED_BANK VERSATILE_SYS_LED
209
210/*
211 * Control registers
212 */
213#define VERSATILE_IDFIELD_OFFSET 0x0 /* Versatile build information */
214#define VERSATILE_FLASHPROG_OFFSET 0x4 /* Flash devices */
215#define VERSATILE_INTREG_OFFSET 0x8 /* Interrupt control */
216#define VERSATILE_DECODE_OFFSET 0xC /* Fitted logic modules */
217
218/*
219 * System controller bit assignment
220 */
221#define VERSATILE_REFCLK 0
222#define VERSATILE_TIMCLK 1
223
224#define VERSATILE_TIMER1_EnSel 15
225#define VERSATILE_TIMER2_EnSel 17
226#define VERSATILE_TIMER3_EnSel 19
227#define VERSATILE_TIMER4_EnSel 21
228
229
230/*
231 * IB2 Versatile/AB expansion board definitions
232 */
233/* VICINTSOURCE27 */
234#define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000)
235#define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0)
236#define VERSATILE_IB2_ISR (VERSATILE_IB2_INT_BASE + 4)
237
238#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000)
239#define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0)
240#define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4)
241
242#endif
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 86fa2d35a019..c44871851255 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -28,13 +28,334 @@
28#include <linux/of_irq.h> 28#include <linux/of_irq.h>
29#include <linux/of_platform.h> 29#include <linux/of_platform.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/amba/bus.h>
32#include <linux/amba/clcd.h>
33#include <linux/platform_data/video-clcd-versatile.h>
34#include <linux/amba/mmci.h>
35#include <linux/mtd/physmap.h>
31#include <asm/mach-types.h> 36#include <asm/mach-types.h>
32#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
33 39
34#include "core.h" 40/* macro to get at MMIO space when running virtually */
41#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
42#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
35 43
44/*
45 * Memory definitions
46 */
47#define VERSATILE_FLASH_BASE 0x34000000
48#define VERSATILE_FLASH_SIZE SZ_64M
49
50/*
51 * ------------------------------------------------------------------------
52 * Versatile Registers
53 * ------------------------------------------------------------------------
54 */
55#define VERSATILE_SYS_LOCK_OFFSET 0x20
56#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
36#define VERSATILE_SYS_PCICTL_OFFSET 0x44 57#define VERSATILE_SYS_PCICTL_OFFSET 0x44
58#define VERSATILE_SYS_MCI_OFFSET 0x48
59#define VERSATILE_SYS_FLASH_OFFSET 0x4C
60#define VERSATILE_SYS_CLCD_OFFSET 0x50
61
62/*
63 * VERSATILE_SYS_FLASH
64 */
65#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
66
67/*
68 * VERSATILE peripheral addresses
69 */
70#define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */
71#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */
72#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */
73#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
74#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
75#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000)
76
77/*
78 * System controller bit assignment
79 */
80#define VERSATILE_REFCLK 0
81#define VERSATILE_TIMCLK 1
82
83#define VERSATILE_TIMER1_EnSel 15
84#define VERSATILE_TIMER2_EnSel 17
85#define VERSATILE_TIMER3_EnSel 19
86#define VERSATILE_TIMER4_EnSel 21
87
37static void __iomem *versatile_sys_base; 88static void __iomem *versatile_sys_base;
89static void __iomem *versatile_ib2_ctrl;
90
91static void versatile_flash_set_vpp(struct platform_device *pdev, int on)
92{
93 u32 val;
94
95 val = readl(versatile_sys_base + VERSATILE_SYS_FLASH_OFFSET);
96 if (on)
97 val |= VERSATILE_FLASHPROG_FLVPPEN;
98 else
99 val &= ~VERSATILE_FLASHPROG_FLVPPEN;
100 writel(val, versatile_sys_base + VERSATILE_SYS_FLASH_OFFSET);
101}
102
103static struct physmap_flash_data versatile_flash_data = {
104 .width = 4,
105 .set_vpp = versatile_flash_set_vpp,
106};
107
108static struct resource versatile_flash_resource = {
109 .start = VERSATILE_FLASH_BASE,
110 .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1,
111 .flags = IORESOURCE_MEM,
112};
113
114struct platform_device versatile_flash_device = {
115 .name = "physmap-flash",
116 .id = 0,
117 .dev = {
118 .platform_data = &versatile_flash_data,
119 },
120 .num_resources = 1,
121 .resource = &versatile_flash_resource,
122};
123
124unsigned int mmc_status(struct device *dev)
125{
126 struct amba_device *adev = container_of(dev, struct amba_device, dev);
127 u32 mask;
128
129 if (adev->res.start == VERSATILE_MMCI0_BASE)
130 mask = 1;
131 else
132 mask = 2;
133
134 return readl(versatile_sys_base + VERSATILE_SYS_MCI_OFFSET) & mask;
135}
136
137static struct mmci_platform_data mmc0_plat_data = {
138 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
139 .status = mmc_status,
140 .gpio_wp = -1,
141 .gpio_cd = -1,
142};
143
144static struct mmci_platform_data mmc1_plat_data = {
145 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
146 .status = mmc_status,
147 .gpio_wp = -1,
148 .gpio_cd = -1,
149};
150
151/*
152 * CLCD support.
153 */
154#define SYS_CLCD_MODE_MASK (3 << 0)
155#define SYS_CLCD_MODE_888 (0 << 0)
156#define SYS_CLCD_MODE_5551 (1 << 0)
157#define SYS_CLCD_MODE_565_RLSB (2 << 0)
158#define SYS_CLCD_MODE_565_BLSB (3 << 0)
159#define SYS_CLCD_NLCDIOON (1 << 2)
160#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
161#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
162#define SYS_CLCD_ID_MASK (0x1f << 8)
163#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
164#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
165#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
166#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
167#define SYS_CLCD_ID_VGA (0x1f << 8)
168
169static bool is_sanyo_2_5_lcd;
170
171/*
172 * Disable all display connectors on the interface module.
173 */
174static void versatile_clcd_disable(struct clcd_fb *fb)
175{
176 void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET;
177 u32 val;
178
179 val = readl(sys_clcd);
180 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
181 writel(val, sys_clcd);
182
183 /*
184 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
185 */
186 if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) {
187 unsigned long ctrl;
188
189 ctrl = readl(versatile_ib2_ctrl);
190 ctrl &= ~0x01;
191 writel(ctrl, versatile_ib2_ctrl);
192 }
193}
194
195/*
196 * Enable the relevant connector on the interface module.
197 */
198static void versatile_clcd_enable(struct clcd_fb *fb)
199{
200 struct fb_var_screeninfo *var = &fb->fb.var;
201 void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET;
202 u32 val;
203
204 val = readl(sys_clcd);
205 val &= ~SYS_CLCD_MODE_MASK;
206
207 switch (var->green.length) {
208 case 5:
209 val |= SYS_CLCD_MODE_5551;
210 break;
211 case 6:
212 if (var->red.offset == 0)
213 val |= SYS_CLCD_MODE_565_RLSB;
214 else
215 val |= SYS_CLCD_MODE_565_BLSB;
216 break;
217 case 8:
218 val |= SYS_CLCD_MODE_888;
219 break;
220 }
221
222 /*
223 * Set the MUX
224 */
225 writel(val, sys_clcd);
226
227 /*
228 * And now enable the PSUs
229 */
230 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
231 writel(val, sys_clcd);
232
233 /*
234 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
235 */
236 if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) {
237 unsigned long ctrl;
238
239 ctrl = readl(versatile_ib2_ctrl);
240 ctrl |= 0x01;
241 writel(ctrl, versatile_ib2_ctrl);
242 }
243}
244
245/*
246 * Detect which LCD panel is connected, and return the appropriate
247 * clcd_panel structure. Note: we do not have any information on
248 * the required timings for the 8.4in panel, so we presently assume
249 * VGA timings.
250 */
251static int versatile_clcd_setup(struct clcd_fb *fb)
252{
253 void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET;
254 const char *panel_name;
255 u32 val;
256
257 is_sanyo_2_5_lcd = false;
258
259 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
260 if (val == SYS_CLCD_ID_SANYO_3_8)
261 panel_name = "Sanyo TM38QV67A02A";
262 else if (val == SYS_CLCD_ID_SANYO_2_5) {
263 panel_name = "Sanyo QVGA Portrait";
264 is_sanyo_2_5_lcd = true;
265 } else if (val == SYS_CLCD_ID_EPSON_2_2)
266 panel_name = "Epson L2F50113T00";
267 else if (val == SYS_CLCD_ID_VGA)
268 panel_name = "VGA";
269 else {
270 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
271 val);
272 panel_name = "VGA";
273 }
274
275 fb->panel = versatile_clcd_get_panel(panel_name);
276 if (!fb->panel)
277 return -EINVAL;
278
279 return versatile_clcd_setup_dma(fb, SZ_1M);
280}
281
282static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs)
283{
284 clcdfb_decode(fb, regs);
285
286 /* Always clear BGR for RGB565: we do the routing externally */
287 if (fb->fb.var.green.length == 6)
288 regs->cntl &= ~CNTL_BGR;
289}
290
291static struct clcd_board clcd_plat_data = {
292 .name = "Versatile",
293 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
294 .check = clcdfb_check,
295 .decode = versatile_clcd_decode,
296 .disable = versatile_clcd_disable,
297 .enable = versatile_clcd_enable,
298 .setup = versatile_clcd_setup,
299 .mmap = versatile_clcd_mmap_dma,
300 .remove = versatile_clcd_remove_dma,
301};
302
303/*
304 * Lookup table for attaching a specific name and platform_data pointer to
305 * devices as they get created by of_platform_populate(). Ideally this table
306 * would not exist, but the current clock implementation depends on some devices
307 * having a specific name.
308 */
309struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = {
310 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data),
311 OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", &mmc1_plat_data),
312 OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data),
313 {}
314};
315
316static struct map_desc versatile_io_desc[] __initdata __maybe_unused = {
317 {
318 .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
319 .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
320 .length = SZ_4K * 9,
321 .type = MT_DEVICE
322 }
323};
324
325static void __init versatile_map_io(void)
326{
327 debug_ll_io_init();
328 iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc));
329}
330
331static void __init versatile_init_early(void)
332{
333 u32 val;
334
335 /*
336 * set clock frequency:
337 * VERSATILE_REFCLK is 32KHz
338 * VERSATILE_TIMCLK is 1MHz
339 */
340 val = readl(__io_address(VERSATILE_SCTL_BASE));
341 writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |
342 (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
343 (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) |
344 (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val,
345 __io_address(VERSATILE_SCTL_BASE));
346}
347
348static void versatile_restart(enum reboot_mode mode, const char *cmd)
349{
350 u32 val;
351
352 val = readl(versatile_sys_base + VERSATILE_SYS_RESETCTL_OFFSET);
353 val |= 0x105;
354
355 writel(0xa05f, versatile_sys_base + VERSATILE_SYS_LOCK_OFFSET);
356 writel(val, versatile_sys_base + VERSATILE_SYS_RESETCTL_OFFSET);
357 writel(0, versatile_sys_base + VERSATILE_SYS_LOCK_OFFSET);
358}
38 359
39static void __init versatile_dt_pci_init(void) 360static void __init versatile_dt_pci_init(void)
40{ 361{
@@ -79,6 +400,8 @@ static void __init versatile_dt_init(void)
79 versatile_sys_base = of_iomap(np, 0); 400 versatile_sys_base = of_iomap(np, 0);
80 WARN_ON(!versatile_sys_base); 401 WARN_ON(!versatile_sys_base);
81 402
403 versatile_ib2_ctrl = ioremap(VERSATILE_IB2_CTL_BASE, SZ_4K);
404
82 versatile_dt_pci_init(); 405 versatile_dt_pci_init();
83 406
84 platform_device_register(&versatile_flash_device); 407 platform_device_register(&versatile_flash_device);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 13:25:26 -0500