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-rw-r--r--arch/powerpc/kernel/eeh.c176
1 files changed, 108 insertions, 68 deletions
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 3b2252e7731b..a4c62eb0ee48 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -164,30 +164,34 @@ __setup("eeh=", eeh_setup);
164 */ 164 */
165static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len) 165static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
166{ 166{
167 struct device_node *dn = eeh_dev_to_of_node(edev); 167 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
168 u32 cfg; 168 u32 cfg;
169 int cap, i; 169 int cap, i;
170 int n = 0, l = 0; 170 int n = 0, l = 0;
171 char buffer[128]; 171 char buffer[128];
172 172
173 n += scnprintf(buf+n, len-n, "%s\n", dn->full_name); 173 n += scnprintf(buf+n, len-n, "%04x:%02x:%02x:%01x\n",
174 pr_warn("EEH: of node=%s\n", dn->full_name); 174 edev->phb->global_number, pdn->busno,
175 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
176 pr_warn("EEH: of node=%04x:%02x:%02x:%01x\n",
177 edev->phb->global_number, pdn->busno,
178 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
175 179
176 eeh_ops->read_config(dn, PCI_VENDOR_ID, 4, &cfg); 180 eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg);
177 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg); 181 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
178 pr_warn("EEH: PCI device/vendor: %08x\n", cfg); 182 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
179 183
180 eeh_ops->read_config(dn, PCI_COMMAND, 4, &cfg); 184 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg);
181 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg); 185 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
182 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg); 186 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
183 187
184 /* Gather bridge-specific registers */ 188 /* Gather bridge-specific registers */
185 if (edev->mode & EEH_DEV_BRIDGE) { 189 if (edev->mode & EEH_DEV_BRIDGE) {
186 eeh_ops->read_config(dn, PCI_SEC_STATUS, 2, &cfg); 190 eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
187 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg); 191 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
188 pr_warn("EEH: Bridge secondary status: %04x\n", cfg); 192 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
189 193
190 eeh_ops->read_config(dn, PCI_BRIDGE_CONTROL, 2, &cfg); 194 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
191 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg); 195 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
192 pr_warn("EEH: Bridge control: %04x\n", cfg); 196 pr_warn("EEH: Bridge control: %04x\n", cfg);
193 } 197 }
@@ -195,11 +199,11 @@ static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
195 /* Dump out the PCI-X command and status regs */ 199 /* Dump out the PCI-X command and status regs */
196 cap = edev->pcix_cap; 200 cap = edev->pcix_cap;
197 if (cap) { 201 if (cap) {
198 eeh_ops->read_config(dn, cap, 4, &cfg); 202 eeh_ops->read_config(pdn, cap, 4, &cfg);
199 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg); 203 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
200 pr_warn("EEH: PCI-X cmd: %08x\n", cfg); 204 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
201 205
202 eeh_ops->read_config(dn, cap+4, 4, &cfg); 206 eeh_ops->read_config(pdn, cap+4, 4, &cfg);
203 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg); 207 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
204 pr_warn("EEH: PCI-X status: %08x\n", cfg); 208 pr_warn("EEH: PCI-X status: %08x\n", cfg);
205 } 209 }
@@ -211,7 +215,7 @@ static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
211 pr_warn("EEH: PCI-E capabilities and status follow:\n"); 215 pr_warn("EEH: PCI-E capabilities and status follow:\n");
212 216
213 for (i=0; i<=8; i++) { 217 for (i=0; i<=8; i++) {
214 eeh_ops->read_config(dn, cap+4*i, 4, &cfg); 218 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
215 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); 219 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
216 220
217 if ((i % 4) == 0) { 221 if ((i % 4) == 0) {
@@ -238,7 +242,7 @@ static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
238 pr_warn("EEH: PCI-E AER capability register set follows:\n"); 242 pr_warn("EEH: PCI-E AER capability register set follows:\n");
239 243
240 for (i=0; i<=13; i++) { 244 for (i=0; i<=13; i++) {
241 eeh_ops->read_config(dn, cap+4*i, 4, &cfg); 245 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
242 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg); 246 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
243 247
244 if ((i % 4) == 0) { 248 if ((i % 4) == 0) {
@@ -414,11 +418,11 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
414 int ret; 418 int ret;
415 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE); 419 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
416 unsigned long flags; 420 unsigned long flags;
417 struct device_node *dn; 421 struct pci_dn *pdn;
418 struct pci_dev *dev; 422 struct pci_dev *dev;
419 struct eeh_pe *pe, *parent_pe, *phb_pe; 423 struct eeh_pe *pe, *parent_pe, *phb_pe;
420 int rc = 0; 424 int rc = 0;
421 const char *location; 425 const char *location = NULL;
422 426
423 eeh_stats.total_mmio_ffs++; 427 eeh_stats.total_mmio_ffs++;
424 428
@@ -429,15 +433,14 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
429 eeh_stats.no_dn++; 433 eeh_stats.no_dn++;
430 return 0; 434 return 0;
431 } 435 }
432 dn = eeh_dev_to_of_node(edev);
433 dev = eeh_dev_to_pci_dev(edev); 436 dev = eeh_dev_to_pci_dev(edev);
434 pe = eeh_dev_to_pe(edev); 437 pe = eeh_dev_to_pe(edev);
435 438
436 /* Access to IO BARs might get this far and still not want checking. */ 439 /* Access to IO BARs might get this far and still not want checking. */
437 if (!pe) { 440 if (!pe) {
438 eeh_stats.ignored_check++; 441 eeh_stats.ignored_check++;
439 pr_debug("EEH: Ignored check for %s %s\n", 442 pr_debug("EEH: Ignored check for %s\n",
440 eeh_pci_name(dev), dn->full_name); 443 eeh_pci_name(dev));
441 return 0; 444 return 0;
442 } 445 }
443 446
@@ -473,10 +476,13 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
473 if (pe->state & EEH_PE_ISOLATED) { 476 if (pe->state & EEH_PE_ISOLATED) {
474 pe->check_count++; 477 pe->check_count++;
475 if (pe->check_count % EEH_MAX_FAILS == 0) { 478 if (pe->check_count % EEH_MAX_FAILS == 0) {
476 location = of_get_property(dn, "ibm,loc-code", NULL); 479 pdn = eeh_dev_to_pdn(edev);
480 if (pdn->node)
481 location = of_get_property(pdn->node, "ibm,loc-code", NULL);
477 printk(KERN_ERR "EEH: %d reads ignored for recovering device at " 482 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
478 "location=%s driver=%s pci addr=%s\n", 483 "location=%s driver=%s pci addr=%s\n",
479 pe->check_count, location, 484 pe->check_count,
485 location ? location : "unknown",
480 eeh_driver_name(dev), eeh_pci_name(dev)); 486 eeh_driver_name(dev), eeh_pci_name(dev));
481 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n", 487 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
482 eeh_driver_name(dev)); 488 eeh_driver_name(dev));
@@ -667,6 +673,55 @@ int eeh_pci_enable(struct eeh_pe *pe, int function)
667 return rc; 673 return rc;
668} 674}
669 675
676static void *eeh_disable_and_save_dev_state(void *data, void *userdata)
677{
678 struct eeh_dev *edev = data;
679 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
680 struct pci_dev *dev = userdata;
681
682 /*
683 * The caller should have disabled and saved the
684 * state for the specified device
685 */
686 if (!pdev || pdev == dev)
687 return NULL;
688
689 /* Ensure we have D0 power state */
690 pci_set_power_state(pdev, PCI_D0);
691
692 /* Save device state */
693 pci_save_state(pdev);
694
695 /*
696 * Disable device to avoid any DMA traffic and
697 * interrupt from the device
698 */
699 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
700
701 return NULL;
702}
703
704static void *eeh_restore_dev_state(void *data, void *userdata)
705{
706 struct eeh_dev *edev = data;
707 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
708 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
709 struct pci_dev *dev = userdata;
710
711 if (!pdev)
712 return NULL;
713
714 /* Apply customization from firmware */
715 if (pdn && eeh_ops->restore_config)
716 eeh_ops->restore_config(pdn);
717
718 /* The caller should restore state for the specified device */
719 if (pdev != dev)
720 pci_save_state(pdev);
721
722 return NULL;
723}
724
670/** 725/**
671 * pcibios_set_pcie_slot_reset - Set PCI-E reset state 726 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
672 * @dev: pci device struct 727 * @dev: pci device struct
@@ -689,13 +744,19 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
689 switch (state) { 744 switch (state) {
690 case pcie_deassert_reset: 745 case pcie_deassert_reset:
691 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE); 746 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
747 eeh_unfreeze_pe(pe, false);
692 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED); 748 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
749 eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
693 break; 750 break;
694 case pcie_hot_reset: 751 case pcie_hot_reset:
752 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
753 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
695 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); 754 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
696 eeh_ops->reset(pe, EEH_RESET_HOT); 755 eeh_ops->reset(pe, EEH_RESET_HOT);
697 break; 756 break;
698 case pcie_warm_reset: 757 case pcie_warm_reset:
758 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
759 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
699 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED); 760 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
700 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL); 761 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
701 break; 762 break;
@@ -815,15 +876,15 @@ out:
815 */ 876 */
816void eeh_save_bars(struct eeh_dev *edev) 877void eeh_save_bars(struct eeh_dev *edev)
817{ 878{
879 struct pci_dn *pdn;
818 int i; 880 int i;
819 struct device_node *dn;
820 881
821 if (!edev) 882 pdn = eeh_dev_to_pdn(edev);
883 if (!pdn)
822 return; 884 return;
823 dn = eeh_dev_to_of_node(edev);
824 885
825 for (i = 0; i < 16; i++) 886 for (i = 0; i < 16; i++)
826 eeh_ops->read_config(dn, i * 4, 4, &edev->config_space[i]); 887 eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]);
827 888
828 /* 889 /*
829 * For PCI bridges including root port, we need enable bus 890 * For PCI bridges including root port, we need enable bus
@@ -914,7 +975,7 @@ static struct notifier_block eeh_reboot_nb = {
914int eeh_init(void) 975int eeh_init(void)
915{ 976{
916 struct pci_controller *hose, *tmp; 977 struct pci_controller *hose, *tmp;
917 struct device_node *phb; 978 struct pci_dn *pdn;
918 static int cnt = 0; 979 static int cnt = 0;
919 int ret = 0; 980 int ret = 0;
920 981
@@ -949,20 +1010,9 @@ int eeh_init(void)
949 return ret; 1010 return ret;
950 1011
951 /* Enable EEH for all adapters */ 1012 /* Enable EEH for all adapters */
952 if (eeh_has_flag(EEH_PROBE_MODE_DEVTREE)) { 1013 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
953 list_for_each_entry_safe(hose, tmp, 1014 pdn = hose->pci_data;
954 &hose_list, list_node) { 1015 traverse_pci_dn(pdn, eeh_ops->probe, NULL);
955 phb = hose->dn;
956 traverse_pci_devices(phb, eeh_ops->of_probe, NULL);
957 }
958 } else if (eeh_has_flag(EEH_PROBE_MODE_DEV)) {
959 list_for_each_entry_safe(hose, tmp,
960 &hose_list, list_node)
961 pci_walk_bus(hose->bus, eeh_ops->dev_probe, NULL);
962 } else {
963 pr_warn("%s: Invalid probe mode %x",
964 __func__, eeh_subsystem_flags);
965 return -EINVAL;
966 } 1016 }
967 1017
968 /* 1018 /*
@@ -987,8 +1037,8 @@ int eeh_init(void)
987core_initcall_sync(eeh_init); 1037core_initcall_sync(eeh_init);
988 1038
989/** 1039/**
990 * eeh_add_device_early - Enable EEH for the indicated device_node 1040 * eeh_add_device_early - Enable EEH for the indicated device node
991 * @dn: device node for which to set up EEH 1041 * @pdn: PCI device node for which to set up EEH
992 * 1042 *
993 * This routine must be used to perform EEH initialization for PCI 1043 * This routine must be used to perform EEH initialization for PCI
994 * devices that were added after system boot (e.g. hotplug, dlpar). 1044 * devices that were added after system boot (e.g. hotplug, dlpar).
@@ -998,44 +1048,41 @@ core_initcall_sync(eeh_init);
998 * on the CEC architecture, type of the device, on earlier boot 1048 * on the CEC architecture, type of the device, on earlier boot
999 * command-line arguments & etc. 1049 * command-line arguments & etc.
1000 */ 1050 */
1001void eeh_add_device_early(struct device_node *dn) 1051void eeh_add_device_early(struct pci_dn *pdn)
1002{ 1052{
1003 struct pci_controller *phb; 1053 struct pci_controller *phb;
1054 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
1004 1055
1005 /* 1056 if (!edev || !eeh_enabled())
1006 * If we're doing EEH probe based on PCI device, we
1007 * would delay the probe until late stage because
1008 * the PCI device isn't available this moment.
1009 */
1010 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
1011 return; 1057 return;
1012 1058
1013 if (!of_node_to_eeh_dev(dn))
1014 return;
1015 phb = of_node_to_eeh_dev(dn)->phb;
1016
1017 /* USB Bus children of PCI devices will not have BUID's */ 1059 /* USB Bus children of PCI devices will not have BUID's */
1018 if (NULL == phb || 0 == phb->buid) 1060 phb = edev->phb;
1061 if (NULL == phb ||
1062 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid))
1019 return; 1063 return;
1020 1064
1021 eeh_ops->of_probe(dn, NULL); 1065 eeh_ops->probe(pdn, NULL);
1022} 1066}
1023 1067
1024/** 1068/**
1025 * eeh_add_device_tree_early - Enable EEH for the indicated device 1069 * eeh_add_device_tree_early - Enable EEH for the indicated device
1026 * @dn: device node 1070 * @pdn: PCI device node
1027 * 1071 *
1028 * This routine must be used to perform EEH initialization for the 1072 * This routine must be used to perform EEH initialization for the
1029 * indicated PCI device that was added after system boot (e.g. 1073 * indicated PCI device that was added after system boot (e.g.
1030 * hotplug, dlpar). 1074 * hotplug, dlpar).
1031 */ 1075 */
1032void eeh_add_device_tree_early(struct device_node *dn) 1076void eeh_add_device_tree_early(struct pci_dn *pdn)
1033{ 1077{
1034 struct device_node *sib; 1078 struct pci_dn *n;
1035 1079
1036 for_each_child_of_node(dn, sib) 1080 if (!pdn)
1037 eeh_add_device_tree_early(sib); 1081 return;
1038 eeh_add_device_early(dn); 1082
1083 list_for_each_entry(n, &pdn->child_list, list)
1084 eeh_add_device_tree_early(n);
1085 eeh_add_device_early(pdn);
1039} 1086}
1040EXPORT_SYMBOL_GPL(eeh_add_device_tree_early); 1087EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1041 1088
@@ -1048,7 +1095,7 @@ EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1048 */ 1095 */
1049void eeh_add_device_late(struct pci_dev *dev) 1096void eeh_add_device_late(struct pci_dev *dev)
1050{ 1097{
1051 struct device_node *dn; 1098 struct pci_dn *pdn;
1052 struct eeh_dev *edev; 1099 struct eeh_dev *edev;
1053 1100
1054 if (!dev || !eeh_enabled()) 1101 if (!dev || !eeh_enabled())
@@ -1056,8 +1103,8 @@ void eeh_add_device_late(struct pci_dev *dev)
1056 1103
1057 pr_debug("EEH: Adding device %s\n", pci_name(dev)); 1104 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1058 1105
1059 dn = pci_device_to_OF_node(dev); 1106 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
1060 edev = of_node_to_eeh_dev(dn); 1107 edev = pdn_to_eeh_dev(pdn);
1061 if (edev->pdev == dev) { 1108 if (edev->pdev == dev) {
1062 pr_debug("EEH: Already referenced !\n"); 1109 pr_debug("EEH: Already referenced !\n");
1063 return; 1110 return;
@@ -1089,13 +1136,6 @@ void eeh_add_device_late(struct pci_dev *dev)
1089 edev->pdev = dev; 1136 edev->pdev = dev;
1090 dev->dev.archdata.edev = edev; 1137 dev->dev.archdata.edev = edev;
1091 1138
1092 /*
1093 * We have to do the EEH probe here because the PCI device
1094 * hasn't been created yet in the early stage.
1095 */
1096 if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1097 eeh_ops->dev_probe(dev, NULL);
1098
1099 eeh_addr_cache_insert_dev(dev); 1139 eeh_addr_cache_insert_dev(dev);
1100} 1140}
1101 1141