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-rw-r--r--arch/mips/mti-malta/malta-time.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 185e68261f45..5625b190edc0 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -119,18 +119,24 @@ void read_persistent_clock(struct timespec *ts)
119 119
120int get_c0_fdc_int(void) 120int get_c0_fdc_int(void)
121{ 121{
122 int mips_cpu_fdc_irq; 122 /*
123 * Some cores claim the FDC is routable through the GIC, but it doesn't
124 * actually seem to be connected for those Malta bitstreams.
125 */
126 switch (current_cpu_type()) {
127 case CPU_INTERAPTIV:
128 case CPU_PROAPTIV:
129 return -1;
130 };
123 131
124 if (cpu_has_veic) 132 if (cpu_has_veic)
125 mips_cpu_fdc_irq = -1; 133 return -1;
126 else if (gic_present) 134 else if (gic_present)
127 mips_cpu_fdc_irq = gic_get_c0_fdc_int(); 135 return gic_get_c0_fdc_int();
128 else if (cp0_fdc_irq >= 0) 136 else if (cp0_fdc_irq >= 0)
129 mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq; 137 return MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
130 else 138 else
131 mips_cpu_fdc_irq = -1; 139 return -1;
132
133 return mips_cpu_fdc_irq;
134} 140}
135 141
136int get_c0_perfcount_int(void) 142int get_c0_perfcount_int(void)