diff options
Diffstat (limited to 'arch/arm/mach-bcmring/irq.c')
-rw-r--r-- | arch/arm/mach-bcmring/irq.c | 126 |
1 files changed, 0 insertions, 126 deletions
diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c deleted file mode 100644 index 437fa683bcb2..000000000000 --- a/arch/arm/mach-bcmring/irq.c +++ /dev/null | |||
@@ -1,126 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (C) 1999 ARM Limited | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/stddef.h> | ||
21 | #include <linux/list.h> | ||
22 | #include <linux/timer.h> | ||
23 | #include <linux/io.h> | ||
24 | |||
25 | #include <mach/hardware.h> | ||
26 | #include <asm/irq.h> | ||
27 | |||
28 | #include <asm/mach/irq.h> | ||
29 | #include <mach/csp/intcHw_reg.h> | ||
30 | #include <mach/csp/mm_io.h> | ||
31 | |||
32 | static void bcmring_mask_irq0(struct irq_data *d) | ||
33 | { | ||
34 | writel(1 << (d->irq - IRQ_INTC0_START), | ||
35 | MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR); | ||
36 | } | ||
37 | |||
38 | static void bcmring_unmask_irq0(struct irq_data *d) | ||
39 | { | ||
40 | writel(1 << (d->irq - IRQ_INTC0_START), | ||
41 | MM_IO_BASE_INTC0 + INTCHW_INTENABLE); | ||
42 | } | ||
43 | |||
44 | static void bcmring_mask_irq1(struct irq_data *d) | ||
45 | { | ||
46 | writel(1 << (d->irq - IRQ_INTC1_START), | ||
47 | MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR); | ||
48 | } | ||
49 | |||
50 | static void bcmring_unmask_irq1(struct irq_data *d) | ||
51 | { | ||
52 | writel(1 << (d->irq - IRQ_INTC1_START), | ||
53 | MM_IO_BASE_INTC1 + INTCHW_INTENABLE); | ||
54 | } | ||
55 | |||
56 | static void bcmring_mask_irq2(struct irq_data *d) | ||
57 | { | ||
58 | writel(1 << (d->irq - IRQ_SINTC_START), | ||
59 | MM_IO_BASE_SINTC + INTCHW_INTENCLEAR); | ||
60 | } | ||
61 | |||
62 | static void bcmring_unmask_irq2(struct irq_data *d) | ||
63 | { | ||
64 | writel(1 << (d->irq - IRQ_SINTC_START), | ||
65 | MM_IO_BASE_SINTC + INTCHW_INTENABLE); | ||
66 | } | ||
67 | |||
68 | static struct irq_chip bcmring_irq0_chip = { | ||
69 | .name = "ARM-INTC0", | ||
70 | .irq_ack = bcmring_mask_irq0, | ||
71 | .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */ | ||
72 | .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */ | ||
73 | }; | ||
74 | |||
75 | static struct irq_chip bcmring_irq1_chip = { | ||
76 | .name = "ARM-INTC1", | ||
77 | .irq_ack = bcmring_mask_irq1, | ||
78 | .irq_mask = bcmring_mask_irq1, | ||
79 | .irq_unmask = bcmring_unmask_irq1, | ||
80 | }; | ||
81 | |||
82 | static struct irq_chip bcmring_irq2_chip = { | ||
83 | .name = "ARM-SINTC", | ||
84 | .irq_ack = bcmring_mask_irq2, | ||
85 | .irq_mask = bcmring_mask_irq2, | ||
86 | .irq_unmask = bcmring_unmask_irq2, | ||
87 | }; | ||
88 | |||
89 | static void vic_init(void __iomem *base, struct irq_chip *chip, | ||
90 | unsigned int irq_start, unsigned int vic_sources) | ||
91 | { | ||
92 | unsigned int i; | ||
93 | for (i = 0; i < 32; i++) { | ||
94 | unsigned int irq = irq_start + i; | ||
95 | irq_set_chip(irq, chip); | ||
96 | irq_set_chip_data(irq, base); | ||
97 | |||
98 | if (vic_sources & (1 << i)) { | ||
99 | irq_set_handler(irq, handle_level_irq); | ||
100 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
101 | } | ||
102 | } | ||
103 | writel(0, base + INTCHW_INTSELECT); | ||
104 | writel(0, base + INTCHW_INTENABLE); | ||
105 | writel(~0, base + INTCHW_INTENCLEAR); | ||
106 | writel(0, base + INTCHW_IRQSTATUS); | ||
107 | writel(~0, base + INTCHW_SOFTINTCLEAR); | ||
108 | } | ||
109 | |||
110 | void __init bcmring_init_irq(void) | ||
111 | { | ||
112 | vic_init((void __iomem *)MM_IO_BASE_INTC0, &bcmring_irq0_chip, | ||
113 | IRQ_INTC0_START, IRQ_INTC0_VALID_MASK); | ||
114 | vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip, | ||
115 | IRQ_INTC1_START, IRQ_INTC1_VALID_MASK); | ||
116 | vic_init((void __iomem *)MM_IO_BASE_SINTC, &bcmring_irq2_chip, | ||
117 | IRQ_SINTC_START, IRQ_SINTC_VALID_MASK); | ||
118 | |||
119 | /* special cases */ | ||
120 | if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) { | ||
121 | irq_set_handler(IRQ_GPIO0, handle_simple_irq); | ||
122 | } | ||
123 | if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) { | ||
124 | irq_set_handler(IRQ_GPIO1, handle_simple_irq); | ||
125 | } | ||
126 | } | ||