10 files changed, 41 insertions, 27 deletions

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index b6e65dedfd71..23371b17b23e 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -137,6 +137,11 @@
         disable_irq
         .endm
 
+        .macro  save_and_disable_irqs_notrace, oldcpsr
+        mrs     \oldcpsr, cpsr
+        disable_irq_notrace
+        .endm
+
 /*
  * Restore interrupt state previously stored in a register.  We don't
  * guarantee that this will preserve the flags.
@@ -237,7 +242,7 @@
  */
 #ifdef CONFIG_THUMB2_KERNEL
 
-        .macro  usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T()
+        .macro  usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
 9999:
         .if     \inc == 1
         \instr\cond\()b\()\t\().w \reg, [\ptr, #\off]
@@ -277,7 +282,7 @@
 
 #else   /* !CONFIG_THUMB2_KERNEL */
 
-        .macro  usracc, instr, reg, ptr, inc, cond, rept, abort, t=T()
+        .macro  usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
         .rept   \rept
 9999:
         .if     \inc == 1
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index af18ceaacf5d..b5dc173d336f 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -83,9 +83,9 @@
  * instructions (inline assembly)
  */
 #ifdef CONFIG_CPU_USE_DOMAINS
-#define T(instr)        #instr "t"
+#define TUSER(instr)    #instr "t"
 #else
-#define T(instr)        #instr
+#define TUSER(instr)    #instr
 #endif
 
 #else /* __ASSEMBLY__ */
@@ -95,9 +95,9 @@
  * instructions
  */
 #ifdef CONFIG_CPU_USE_DOMAINS
-#define T(instr)        instr ## t
+#define TUSER(instr)    instr ## t
 #else
-#define T(instr)        instr
+#define TUSER(instr)    instr
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 253cc86318bf..7be54690aeec 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -75,9 +75,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 
 #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldr) "      %1, [%3]\n"                     \
+        "1:     " TUSER(ldr) "  %1, [%3]\n"                     \
         "       " insn "\n"                                     \
-        "2:     " T(str) "      %0, [%3]\n"                     \
+        "2:     " TUSER(str) "  %0, [%3]\n"                     \
         "       mov     %0, #0\n"                               \
         __futex_atomic_ex_table("%5")                           \
         : "=&r" (ret), "=&r" (oldval), "=&r" (tmp)              \
@@ -95,10 +95,10 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
                 return -EFAULT;
 
         __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
-        "1:     " T(ldr) "      %1, [%4]\n"
+        "1:     " TUSER(ldr) "  %1, [%4]\n"
         "       teq     %1, %2\n"
         "       it      eq      @ explicit IT needed for the 2b label\n"
-        "2:     " T(streq) "    %3, [%4]\n"
+        "2:     " TUSER(streq) "        %3, [%4]\n"
         __futex_atomic_ex_table("%5")
         : "+r" (ret), "=&r" (val)
         : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
index 575fa8186ca0..c1821385abfa 100644
--- a/arch/arm/include/asm/hardware/pl330.h
+++ b/arch/arm/include/asm/hardware/pl330.h
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl {
         DCCTRL1, /* Bufferable only */
         DCCTRL2, /* Cacheable, but do not allocate */
         DCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        DINVALID1 = 8,
+        DINVALID1,              /* AWCACHE = 0x1000 */
         DINVALID2,
         DCCTRL6, /* Cacheable write-through, allocate on writes only */
         DCCTRL7, /* Cacheable write-back, allocate on writes only */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b5a5be2536c1..90114faa9f3c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
 
 u64 armpmu_event_update(struct perf_event *event,
                         struct hw_perf_event *hwc,
-                        int idx, int overflow);
+                        int idx);
 
 int armpmu_event_set_period(struct perf_event *event,
                             struct hw_perf_event *hwc,
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index ce280b8d613c..cb8d638924fd 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,6 +22,7 @@
 #include <asm/hw_breakpoint.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
+#include <asm/system.h>
 
 #ifdef __KERNEL__
 #define STACK_TOP       ((current->personality & ADDR_LIMIT_32BIT) ? \
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 1e5717afc4ac..ae29293270a3 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -71,12 +71,6 @@ extern void platform_secondary_init(unsigned int cpu);
 extern void platform_smp_prepare_cpus(unsigned int);
 
 /*
- * Logical CPU mapping.
- */
-extern int __cpu_logical_map[NR_CPUS];
-#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
-
-/*
  * Initial data for bringing up a secondary CPU.
  */
 struct secondary_data {
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index f24c1b9e211d..558d6c80aca9 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -43,4 +43,10 @@ static inline int cache_ops_need_broadcast(void)
 }
 #endif
 
+/*
+ * Logical CPU mapping.
+ */
+extern int __cpu_logical_map[];
+#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
+
 #endif
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 5d3ed7e38561..314d4664eae7 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -198,7 +198,15 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
         unsigned long addr)
 {
         pgtable_page_dtor(pte);
-        tlb_add_flush(tlb, addr);
+
+        /*
+         * With the classic ARM MMU, a pte page has two corresponding pmd
+         * entries, each covering 1MB.
+         */
+        addr &= PMD_MASK;
+        tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
+        tlb_add_flush(tlb, addr + SZ_1M);
+
         tlb_remove_page(tlb, pte);
 }
 
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index b293616a1a1a..2958976d867b 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -227,7 +227,7 @@ do {									\
 
 #define __get_user_asm_byte(x,addr,err)                         \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldrb) "     %1,[%2],#0\n"                   \
+        "1:     " TUSER(ldrb) " %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -263,7 +263,7 @@ do {									\
 
 #define __get_user_asm_word(x,addr,err)                         \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldr) "      %1,[%2],#0\n"                   \
+        "1:     " TUSER(ldr) "  %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -308,7 +308,7 @@ do {									\
 
 #define __put_user_asm_byte(x,__pu_addr,err)                    \
         __asm__ __volatile__(                                   \
-        "1:     " T(strb) "     %1,[%2],#0\n"                   \
+        "1:     " TUSER(strb) " %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -341,7 +341,7 @@ do {									\
 
 #define __put_user_asm_word(x,__pu_addr,err)                    \
         __asm__ __volatile__(                                   \
-        "1:     " T(str) "      %1,[%2],#0\n"                   \
+        "1:     " TUSER(str) "  %1,[%2],#0\n"                   \
         "2:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \
@@ -366,10 +366,10 @@ do {									\
 
 #define __put_user_asm_dword(x,__pu_addr,err)                   \
         __asm__ __volatile__(                                   \
- ARM(   "1:     " T(str) "      " __reg_oper1 ", [%1], #4\n"    )       \
- ARM(   "2:     " T(str) "      " __reg_oper0 ", [%1]\n"        )       \
- THUMB( "1:     " T(str) "      " __reg_oper1 ", [%1]\n"        )       \
- THUMB( "2:     " T(str) "      " __reg_oper0 ", [%1, #4]\n"    )       \
+ ARM(   "1:     " TUSER(str) "  " __reg_oper1 ", [%1], #4\n"    ) \
+ ARM(   "2:     " TUSER(str) "  " __reg_oper0 ", [%1]\n"        ) \
+ THUMB( "1:     " TUSER(str) "  " __reg_oper1 ", [%1]\n"        ) \
+ THUMB( "2:     " TUSER(str) "  " __reg_oper0 ", [%1, #4]\n"    ) \
         "3:\n"                                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
         "       .align  2\n"                                    \