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Diffstat (limited to 'arch/arm/boot/dts/ste-hrefv60plus.dtsi')
-rw-r--r--arch/arm/boot/dts/ste-hrefv60plus.dtsi25
1 files changed, 23 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index a4bc9e77d640..810cda743b6d 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -43,15 +43,26 @@
43 <&vaudio_hf_hrefv60_mode>, 43 <&vaudio_hf_hrefv60_mode>,
44 <&gbf_hrefv60_mode>, 44 <&gbf_hrefv60_mode>,
45 <&hdtv_hrefv60_mode>, 45 <&hdtv_hrefv60_mode>,
46 <&touch_hrefv60_mode>; 46 <&touch_hrefv60_mode>,
47 <&gpios_hrefv60_mode>;
47 48
48 sdi0 { 49 sdi0 {
49 /* SD card detect GPIO pin, extend default state */
50 sdi0_default_mode: sdi0_default { 50 sdi0_default_mode: sdi0_default {
51 /* SD card detect GPIO pin, extend default state */
51 default_hrefv60_cfg1 { 52 default_hrefv60_cfg1 {
52 pins = "GPIO95_E8"; 53 pins = "GPIO95_E8";
53 ste,config = <&gpio_in_pu>; 54 ste,config = <&gpio_in_pu>;
54 }; 55 };
56 /* VMMCI level-shifter enable */
57 default_hrefv60_cfg2 {
58 pins = "GPIO169_D22";
59 ste,config = <&gpio_out_lo>;
60 };
61 /* VMMCI level-shifter voltage select */
62 default_hrefv60_cfg3 {
63 pins = "GPIO5_AG6";
64 ste,config = <&gpio_out_hi>;
65 };
55 }; 66 };
56 }; 67 };
57 ipgpio { 68 ipgpio {
@@ -213,6 +224,16 @@
213 }; 224 };
214 }; 225 };
215 }; 226 };
227 gpios {
228 /* Dangling GPIO pins */
229 gpios_hrefv60_mode: gpios_hrefv60 {
230 default_cfg1 {
231 /* Normally UART1 RXD, now dangling */
232 pins = "GPIO4_AH6";
233 ste,config = <&in_pu>;
234 };
235 };
236 };
216 }; 237 };
217 }; 238 };
218}; 239};