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-rw-r--r--Documentation/devicetree/bindings/net/mdio-mux-gpio.txt8
1 files changed, 0 insertions, 8 deletions
diff --git a/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt b/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt
index 79384113c2b0..694987d3c17a 100644
--- a/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt
+++ b/Documentation/devicetree/bindings/net/mdio-mux-gpio.txt
@@ -38,7 +38,6 @@ Example :
38 38
39 phy11: ethernet-phy@1 { 39 phy11: ethernet-phy@1 {
40 reg = <1>; 40 reg = <1>;
41 compatible = "marvell,88e1149r";
42 marvell,reg-init = <3 0x10 0 0x5777>, 41 marvell,reg-init = <3 0x10 0 0x5777>,
43 <3 0x11 0 0x00aa>, 42 <3 0x11 0 0x00aa>,
44 <3 0x12 0 0x4105>, 43 <3 0x12 0 0x4105>,
@@ -48,7 +47,6 @@ Example :
48 }; 47 };
49 phy12: ethernet-phy@2 { 48 phy12: ethernet-phy@2 {
50 reg = <2>; 49 reg = <2>;
51 compatible = "marvell,88e1149r";
52 marvell,reg-init = <3 0x10 0 0x5777>, 50 marvell,reg-init = <3 0x10 0 0x5777>,
53 <3 0x11 0 0x00aa>, 51 <3 0x11 0 0x00aa>,
54 <3 0x12 0 0x4105>, 52 <3 0x12 0 0x4105>,
@@ -58,7 +56,6 @@ Example :
58 }; 56 };
59 phy13: ethernet-phy@3 { 57 phy13: ethernet-phy@3 {
60 reg = <3>; 58 reg = <3>;
61 compatible = "marvell,88e1149r";
62 marvell,reg-init = <3 0x10 0 0x5777>, 59 marvell,reg-init = <3 0x10 0 0x5777>,
63 <3 0x11 0 0x00aa>, 60 <3 0x11 0 0x00aa>,
64 <3 0x12 0 0x4105>, 61 <3 0x12 0 0x4105>,
@@ -68,7 +65,6 @@ Example :
68 }; 65 };
69 phy14: ethernet-phy@4 { 66 phy14: ethernet-phy@4 {
70 reg = <4>; 67 reg = <4>;
71 compatible = "marvell,88e1149r";
72 marvell,reg-init = <3 0x10 0 0x5777>, 68 marvell,reg-init = <3 0x10 0 0x5777>,
73 <3 0x11 0 0x00aa>, 69 <3 0x11 0 0x00aa>,
74 <3 0x12 0 0x4105>, 70 <3 0x12 0 0x4105>,
@@ -85,7 +81,6 @@ Example :
85 81
86 phy21: ethernet-phy@1 { 82 phy21: ethernet-phy@1 {
87 reg = <1>; 83 reg = <1>;
88 compatible = "marvell,88e1149r";
89 marvell,reg-init = <3 0x10 0 0x5777>, 84 marvell,reg-init = <3 0x10 0 0x5777>,
90 <3 0x11 0 0x00aa>, 85 <3 0x11 0 0x00aa>,
91 <3 0x12 0 0x4105>, 86 <3 0x12 0 0x4105>,
@@ -95,7 +90,6 @@ Example :
95 }; 90 };
96 phy22: ethernet-phy@2 { 91 phy22: ethernet-phy@2 {
97 reg = <2>; 92 reg = <2>;
98 compatible = "marvell,88e1149r";
99 marvell,reg-init = <3 0x10 0 0x5777>, 93 marvell,reg-init = <3 0x10 0 0x5777>,
100 <3 0x11 0 0x00aa>, 94 <3 0x11 0 0x00aa>,
101 <3 0x12 0 0x4105>, 95 <3 0x12 0 0x4105>,
@@ -105,7 +99,6 @@ Example :
105 }; 99 };
106 phy23: ethernet-phy@3 { 100 phy23: ethernet-phy@3 {
107 reg = <3>; 101 reg = <3>;
108 compatible = "marvell,88e1149r";
109 marvell,reg-init = <3 0x10 0 0x5777>, 102 marvell,reg-init = <3 0x10 0 0x5777>,
110 <3 0x11 0 0x00aa>, 103 <3 0x11 0 0x00aa>,
111 <3 0x12 0 0x4105>, 104 <3 0x12 0 0x4105>,
@@ -115,7 +108,6 @@ Example :
115 }; 108 };
116 phy24: ethernet-phy@4 { 109 phy24: ethernet-phy@4 {
117 reg = <4>; 110 reg = <4>;
118 compatible = "marvell,88e1149r";
119 marvell,reg-init = <3 0x10 0 0x5777>, 111 marvell,reg-init = <3 0x10 0 0x5777>,
120 <3 0x11 0 0x00aa>, 112 <3 0x11 0 0x00aa>,
121 <3 0x12 0 0x4105>, 113 <3 0x12 0 0x4105>,