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-rw-r--r--drivers/gpu/drm/i915/intel_display.c190
1 files changed, 134 insertions, 56 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c4db59521cf5..ed187e94b02d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5154,6 +5154,123 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask
5154 intel_frontbuffer_flip(to_i915(dev), INTEL_FRONTBUFFER_ALL_MASK(pipe)); 5154 intel_frontbuffer_flip(to_i915(dev), INTEL_FRONTBUFFER_ALL_MASK(pipe));
5155} 5155}
5156 5156
5157static void intel_encoders_pre_pll_enable(struct drm_crtc *crtc,
5158 struct drm_atomic_state *old_state)
5159{
5160 struct drm_connector_state *old_conn_state;
5161 struct drm_connector *conn;
5162 int i;
5163
5164 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5165 struct drm_connector_state *conn_state = conn->state;
5166 struct intel_encoder *encoder =
5167 to_intel_encoder(conn_state->best_encoder);
5168
5169 if (conn_state->crtc != crtc)
5170 continue;
5171
5172 if (encoder->pre_pll_enable)
5173 encoder->pre_pll_enable(encoder);
5174 }
5175}
5176
5177static void intel_encoders_pre_enable(struct drm_crtc *crtc,
5178 struct drm_atomic_state *old_state)
5179{
5180 struct drm_connector_state *old_conn_state;
5181 struct drm_connector *conn;
5182 int i;
5183
5184 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5185 struct drm_connector_state *conn_state = conn->state;
5186 struct intel_encoder *encoder =
5187 to_intel_encoder(conn_state->best_encoder);
5188
5189 if (conn_state->crtc != crtc)
5190 continue;
5191
5192 if (encoder->pre_enable)
5193 encoder->pre_enable(encoder);
5194 }
5195}
5196
5197static void intel_encoders_enable(struct drm_crtc *crtc,
5198 struct drm_atomic_state *old_state)
5199{
5200 struct drm_connector_state *old_conn_state;
5201 struct drm_connector *conn;
5202 int i;
5203
5204 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5205 struct drm_connector_state *conn_state = conn->state;
5206 struct intel_encoder *encoder =
5207 to_intel_encoder(conn_state->best_encoder);
5208
5209 if (conn_state->crtc != crtc)
5210 continue;
5211
5212 encoder->enable(encoder);
5213 intel_opregion_notify_encoder(encoder, true);
5214 }
5215}
5216
5217static void intel_encoders_disable(struct drm_crtc *crtc,
5218 struct drm_atomic_state *old_state)
5219{
5220 struct drm_connector_state *old_conn_state;
5221 struct drm_connector *conn;
5222 int i;
5223
5224 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5225 struct intel_encoder *encoder =
5226 to_intel_encoder(old_conn_state->best_encoder);
5227
5228 if (old_conn_state->crtc != crtc)
5229 continue;
5230
5231 intel_opregion_notify_encoder(encoder, false);
5232 encoder->disable(encoder);
5233 }
5234}
5235
5236static void intel_encoders_post_disable(struct drm_crtc *crtc,
5237 struct drm_atomic_state *old_state)
5238{
5239 struct drm_connector_state *old_conn_state;
5240 struct drm_connector *conn;
5241 int i;
5242
5243 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5244 struct intel_encoder *encoder =
5245 to_intel_encoder(old_conn_state->best_encoder);
5246
5247 if (old_conn_state->crtc != crtc)
5248 continue;
5249
5250 if (encoder->post_disable)
5251 encoder->post_disable(encoder);
5252 }
5253}
5254
5255static void intel_encoders_post_pll_disable(struct drm_crtc *crtc,
5256 struct drm_atomic_state *old_state)
5257{
5258 struct drm_connector_state *old_conn_state;
5259 struct drm_connector *conn;
5260 int i;
5261
5262 for_each_connector_in_state(old_state, conn, old_conn_state, i) {
5263 struct intel_encoder *encoder =
5264 to_intel_encoder(old_conn_state->best_encoder);
5265
5266 if (old_conn_state->crtc != crtc)
5267 continue;
5268
5269 if (encoder->post_pll_disable)
5270 encoder->post_pll_disable(encoder);
5271 }
5272}
5273
5157static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, 5274static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
5158 struct drm_atomic_state *old_state) 5275 struct drm_atomic_state *old_state)
5159{ 5276{
@@ -5161,7 +5278,6 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
5161 struct drm_device *dev = crtc->dev; 5278 struct drm_device *dev = crtc->dev;
5162 struct drm_i915_private *dev_priv = to_i915(dev); 5279 struct drm_i915_private *dev_priv = to_i915(dev);
5163 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5280 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5164 struct intel_encoder *encoder;
5165 int pipe = intel_crtc->pipe; 5281 int pipe = intel_crtc->pipe;
5166 5282
5167 if (WARN_ON(intel_crtc->active)) 5283 if (WARN_ON(intel_crtc->active))
@@ -5200,9 +5316,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
5200 5316
5201 intel_crtc->active = true; 5317 intel_crtc->active = true;
5202 5318
5203 for_each_encoder_on_crtc(dev, crtc, encoder) 5319 intel_encoders_pre_enable(crtc, old_state);
5204 if (encoder->pre_enable)
5205 encoder->pre_enable(encoder);
5206 5320
5207 if (intel_crtc->config->has_pch_encoder) { 5321 if (intel_crtc->config->has_pch_encoder) {
5208 /* Note: FDI PLL enabling _must_ be done before we enable the 5322 /* Note: FDI PLL enabling _must_ be done before we enable the
@@ -5232,8 +5346,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
5232 assert_vblank_disabled(crtc); 5346 assert_vblank_disabled(crtc);
5233 drm_crtc_vblank_on(crtc); 5347 drm_crtc_vblank_on(crtc);
5234 5348
5235 for_each_encoder_on_crtc(dev, crtc, encoder) 5349 intel_encoders_enable(crtc, old_state);
5236 encoder->enable(encoder);
5237 5350
5238 if (HAS_PCH_CPT(dev)) 5351 if (HAS_PCH_CPT(dev))
5239 cpt_verify_modeset(dev, intel_crtc->pipe); 5352 cpt_verify_modeset(dev, intel_crtc->pipe);
@@ -5258,7 +5371,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
5258 struct drm_device *dev = crtc->dev; 5371 struct drm_device *dev = crtc->dev;
5259 struct drm_i915_private *dev_priv = to_i915(dev); 5372 struct drm_i915_private *dev_priv = to_i915(dev);
5260 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5373 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5261 struct intel_encoder *encoder;
5262 int pipe = intel_crtc->pipe, hsw_workaround_pipe; 5374 int pipe = intel_crtc->pipe, hsw_workaround_pipe;
5263 enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; 5375 enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
5264 5376
@@ -5269,9 +5381,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
5269 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, 5381 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
5270 false); 5382 false);
5271 5383
5272 for_each_encoder_on_crtc(dev, crtc, encoder) 5384 intel_encoders_pre_pll_enable(crtc, old_state);
5273 if (encoder->pre_pll_enable)
5274 encoder->pre_pll_enable(encoder);
5275 5385
5276 if (intel_crtc->config->shared_dpll) 5386 if (intel_crtc->config->shared_dpll)
5277 intel_enable_shared_dpll(intel_crtc); 5387 intel_enable_shared_dpll(intel_crtc);
@@ -5309,10 +5419,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
5309 else 5419 else
5310 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); 5420 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
5311 5421
5312 for_each_encoder_on_crtc(dev, crtc, encoder) { 5422 intel_encoders_pre_enable(crtc, old_state);
5313 if (encoder->pre_enable)
5314 encoder->pre_enable(encoder);
5315 }
5316 5423
5317 if (intel_crtc->config->has_pch_encoder) 5424 if (intel_crtc->config->has_pch_encoder)
5318 dev_priv->display.fdi_link_train(crtc); 5425 dev_priv->display.fdi_link_train(crtc);
@@ -5353,10 +5460,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
5353 assert_vblank_disabled(crtc); 5460 assert_vblank_disabled(crtc);
5354 drm_crtc_vblank_on(crtc); 5461 drm_crtc_vblank_on(crtc);
5355 5462
5356 for_each_encoder_on_crtc(dev, crtc, encoder) { 5463 intel_encoders_enable(crtc, old_state);
5357 encoder->enable(encoder);
5358 intel_opregion_notify_encoder(encoder, true);
5359 }
5360 5464
5361 if (intel_crtc->config->has_pch_encoder) { 5465 if (intel_crtc->config->has_pch_encoder) {
5362 intel_wait_for_vblank(dev, pipe); 5466 intel_wait_for_vblank(dev, pipe);
@@ -5397,7 +5501,6 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
5397 struct drm_device *dev = crtc->dev; 5501 struct drm_device *dev = crtc->dev;
5398 struct drm_i915_private *dev_priv = to_i915(dev); 5502 struct drm_i915_private *dev_priv = to_i915(dev);
5399 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5503 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5400 struct intel_encoder *encoder;
5401 int pipe = intel_crtc->pipe; 5504 int pipe = intel_crtc->pipe;
5402 5505
5403 /* 5506 /*
@@ -5410,8 +5513,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
5410 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false); 5513 intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
5411 } 5514 }
5412 5515
5413 for_each_encoder_on_crtc(dev, crtc, encoder) 5516 intel_encoders_disable(crtc, old_state);
5414 encoder->disable(encoder);
5415 5517
5416 drm_crtc_vblank_off(crtc); 5518 drm_crtc_vblank_off(crtc);
5417 assert_vblank_disabled(crtc); 5519 assert_vblank_disabled(crtc);
@@ -5423,9 +5525,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
5423 if (intel_crtc->config->has_pch_encoder) 5525 if (intel_crtc->config->has_pch_encoder)
5424 ironlake_fdi_disable(crtc); 5526 ironlake_fdi_disable(crtc);
5425 5527
5426 for_each_encoder_on_crtc(dev, crtc, encoder) 5528 intel_encoders_post_disable(crtc, old_state);
5427 if (encoder->post_disable)
5428 encoder->post_disable(encoder);
5429 5529
5430 if (intel_crtc->config->has_pch_encoder) { 5530 if (intel_crtc->config->has_pch_encoder) {
5431 ironlake_disable_pch_transcoder(dev_priv, pipe); 5531 ironlake_disable_pch_transcoder(dev_priv, pipe);
@@ -5462,17 +5562,13 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
5462 struct drm_device *dev = crtc->dev; 5562 struct drm_device *dev = crtc->dev;
5463 struct drm_i915_private *dev_priv = to_i915(dev); 5563 struct drm_i915_private *dev_priv = to_i915(dev);
5464 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5564 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5465 struct intel_encoder *encoder;
5466 enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; 5565 enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
5467 5566
5468 if (intel_crtc->config->has_pch_encoder) 5567 if (intel_crtc->config->has_pch_encoder)
5469 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A, 5568 intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
5470 false); 5569 false);
5471 5570
5472 for_each_encoder_on_crtc(dev, crtc, encoder) { 5571 intel_encoders_disable(crtc, old_state);
5473 intel_opregion_notify_encoder(encoder, false);
5474 encoder->disable(encoder);
5475 }
5476 5572
5477 drm_crtc_vblank_off(crtc); 5573 drm_crtc_vblank_off(crtc);
5478 assert_vblank_disabled(crtc); 5574 assert_vblank_disabled(crtc);
@@ -5495,9 +5591,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
5495 if (!transcoder_is_dsi(cpu_transcoder)) 5591 if (!transcoder_is_dsi(cpu_transcoder))
5496 intel_ddi_disable_pipe_clock(intel_crtc); 5592 intel_ddi_disable_pipe_clock(intel_crtc);
5497 5593
5498 for_each_encoder_on_crtc(dev, crtc, encoder) 5594 intel_encoders_post_disable(crtc, old_state);
5499 if (encoder->post_disable)
5500 encoder->post_disable(encoder);
5501 5595
5502 if (intel_crtc->config->has_pch_encoder) { 5596 if (intel_crtc->config->has_pch_encoder) {
5503 lpt_disable_pch_transcoder(dev_priv); 5597 lpt_disable_pch_transcoder(dev_priv);
@@ -6569,7 +6663,6 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
6569 struct drm_device *dev = crtc->dev; 6663 struct drm_device *dev = crtc->dev;
6570 struct drm_i915_private *dev_priv = to_i915(dev); 6664 struct drm_i915_private *dev_priv = to_i915(dev);
6571 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 6665 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6572 struct intel_encoder *encoder;
6573 int pipe = intel_crtc->pipe; 6666 int pipe = intel_crtc->pipe;
6574 6667
6575 if (WARN_ON(intel_crtc->active)) 6668 if (WARN_ON(intel_crtc->active))
@@ -6594,9 +6687,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
6594 6687
6595 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); 6688 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
6596 6689
6597 for_each_encoder_on_crtc(dev, crtc, encoder) 6690 intel_encoders_pre_pll_enable(crtc, old_state);
6598 if (encoder->pre_pll_enable)
6599 encoder->pre_pll_enable(encoder);
6600 6691
6601 if (IS_CHERRYVIEW(dev)) { 6692 if (IS_CHERRYVIEW(dev)) {
6602 chv_prepare_pll(intel_crtc, intel_crtc->config); 6693 chv_prepare_pll(intel_crtc, intel_crtc->config);
@@ -6606,9 +6697,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
6606 vlv_enable_pll(intel_crtc, intel_crtc->config); 6697 vlv_enable_pll(intel_crtc, intel_crtc->config);
6607 } 6698 }
6608 6699
6609 for_each_encoder_on_crtc(dev, crtc, encoder) 6700 intel_encoders_pre_enable(crtc, old_state);
6610 if (encoder->pre_enable)
6611 encoder->pre_enable(encoder);
6612 6701
6613 i9xx_pfit_enable(intel_crtc); 6702 i9xx_pfit_enable(intel_crtc);
6614 6703
@@ -6620,8 +6709,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
6620 assert_vblank_disabled(crtc); 6709 assert_vblank_disabled(crtc);
6621 drm_crtc_vblank_on(crtc); 6710 drm_crtc_vblank_on(crtc);
6622 6711
6623 for_each_encoder_on_crtc(dev, crtc, encoder) 6712 intel_encoders_enable(crtc, old_state);
6624 encoder->enable(encoder);
6625} 6713}
6626 6714
6627static void i9xx_set_pll_dividers(struct intel_crtc *crtc) 6715static void i9xx_set_pll_dividers(struct intel_crtc *crtc)
@@ -6640,7 +6728,6 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
6640 struct drm_device *dev = crtc->dev; 6728 struct drm_device *dev = crtc->dev;
6641 struct drm_i915_private *dev_priv = to_i915(dev); 6729 struct drm_i915_private *dev_priv = to_i915(dev);
6642 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 6730 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6643 struct intel_encoder *encoder;
6644 enum pipe pipe = intel_crtc->pipe; 6731 enum pipe pipe = intel_crtc->pipe;
6645 6732
6646 if (WARN_ON(intel_crtc->active)) 6733 if (WARN_ON(intel_crtc->active))
@@ -6661,9 +6748,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
6661 if (!IS_GEN2(dev)) 6748 if (!IS_GEN2(dev))
6662 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); 6749 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
6663 6750
6664 for_each_encoder_on_crtc(dev, crtc, encoder) 6751 intel_encoders_pre_enable(crtc, old_state);
6665 if (encoder->pre_enable)
6666 encoder->pre_enable(encoder);
6667 6752
6668 i9xx_enable_pll(intel_crtc); 6753 i9xx_enable_pll(intel_crtc);
6669 6754
@@ -6677,8 +6762,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
6677 assert_vblank_disabled(crtc); 6762 assert_vblank_disabled(crtc);
6678 drm_crtc_vblank_on(crtc); 6763 drm_crtc_vblank_on(crtc);
6679 6764
6680 for_each_encoder_on_crtc(dev, crtc, encoder) 6765 intel_encoders_enable(crtc, old_state);
6681 encoder->enable(encoder);
6682} 6766}
6683 6767
6684static void i9xx_pfit_disable(struct intel_crtc *crtc) 6768static void i9xx_pfit_disable(struct intel_crtc *crtc)
@@ -6703,7 +6787,6 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
6703 struct drm_device *dev = crtc->dev; 6787 struct drm_device *dev = crtc->dev;
6704 struct drm_i915_private *dev_priv = to_i915(dev); 6788 struct drm_i915_private *dev_priv = to_i915(dev);
6705 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 6789 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6706 struct intel_encoder *encoder;
6707 int pipe = intel_crtc->pipe; 6790 int pipe = intel_crtc->pipe;
6708 6791
6709 /* 6792 /*
@@ -6713,8 +6796,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
6713 if (IS_GEN2(dev)) 6796 if (IS_GEN2(dev))
6714 intel_wait_for_vblank(dev, pipe); 6797 intel_wait_for_vblank(dev, pipe);
6715 6798
6716 for_each_encoder_on_crtc(dev, crtc, encoder) 6799 intel_encoders_disable(crtc, old_state);
6717 encoder->disable(encoder);
6718 6800
6719 drm_crtc_vblank_off(crtc); 6801 drm_crtc_vblank_off(crtc);
6720 assert_vblank_disabled(crtc); 6802 assert_vblank_disabled(crtc);
@@ -6723,9 +6805,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
6723 6805
6724 i9xx_pfit_disable(intel_crtc); 6806 i9xx_pfit_disable(intel_crtc);
6725 6807
6726 for_each_encoder_on_crtc(dev, crtc, encoder) 6808 intel_encoders_post_disable(crtc, old_state);
6727 if (encoder->post_disable)
6728 encoder->post_disable(encoder);
6729 6809
6730 if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) { 6810 if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) {
6731 if (IS_CHERRYVIEW(dev)) 6811 if (IS_CHERRYVIEW(dev))
@@ -6736,9 +6816,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
6736 i9xx_disable_pll(intel_crtc); 6816 i9xx_disable_pll(intel_crtc);
6737 } 6817 }
6738 6818
6739 for_each_encoder_on_crtc(dev, crtc, encoder) 6819 intel_encoders_post_pll_disable(crtc, old_state);
6740 if (encoder->post_pll_disable)
6741 encoder->post_pll_disable(encoder);
6742 6820
6743 if (!IS_GEN2(dev)) 6821 if (!IS_GEN2(dev))
6744 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); 6822 intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);