diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 35 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.h | 1 |
4 files changed, 46 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 9496fb5f2fe1..84d2aa21435a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -4013,12 +4013,21 @@ static int i915_gem_init_rings(struct drm_device *dev) | |||
4013 | goto cleanup_bsd_ring; | 4013 | goto cleanup_bsd_ring; |
4014 | } | 4014 | } |
4015 | 4015 | ||
4016 | if (HAS_VEBOX(dev)) { | ||
4017 | ret = intel_init_vebox_ring_buffer(dev); | ||
4018 | if (ret) | ||
4019 | goto cleanup_blt_ring; | ||
4020 | } | ||
4021 | |||
4022 | |||
4016 | ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000)); | 4023 | ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000)); |
4017 | if (ret) | 4024 | if (ret) |
4018 | goto cleanup_blt_ring; | 4025 | goto cleanup_vebox_ring; |
4019 | 4026 | ||
4020 | return 0; | 4027 | return 0; |
4021 | 4028 | ||
4029 | cleanup_vebox_ring: | ||
4030 | intel_cleanup_ring_buffer(&dev_priv->ring[VECS]); | ||
4022 | cleanup_blt_ring: | 4031 | cleanup_blt_ring: |
4023 | intel_cleanup_ring_buffer(&dev_priv->ring[BCS]); | 4032 | intel_cleanup_ring_buffer(&dev_priv->ring[BCS]); |
4024 | cleanup_bsd_ring: | 4033 | cleanup_bsd_ring: |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 41c5d45362b2..a5717f179332 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -620,6 +620,7 @@ | |||
620 | #define DONE_REG 0x40b0 | 620 | #define DONE_REG 0x40b0 |
621 | #define BSD_HWS_PGA_GEN7 (0x04180) | 621 | #define BSD_HWS_PGA_GEN7 (0x04180) |
622 | #define BLT_HWS_PGA_GEN7 (0x04280) | 622 | #define BLT_HWS_PGA_GEN7 (0x04280) |
623 | #define VEBOX_HWS_PGA_GEN7 (0x04380) | ||
623 | #define RING_ACTHD(base) ((base)+0x74) | 624 | #define RING_ACTHD(base) ((base)+0x74) |
624 | #define RING_NOPID(base) ((base)+0x94) | 625 | #define RING_NOPID(base) ((base)+0x94) |
625 | #define RING_IMR(base) ((base)+0xa8) | 626 | #define RING_IMR(base) ((base)+0xa8) |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 3022e1579e58..89dfc63677ad 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -916,7 +916,8 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring) | |||
916 | mmio = BSD_HWS_PGA_GEN7; | 916 | mmio = BSD_HWS_PGA_GEN7; |
917 | break; | 917 | break; |
918 | case VECS: | 918 | case VECS: |
919 | BUG(); | 919 | mmio = VEBOX_HWS_PGA_GEN7; |
920 | break; | ||
920 | } | 921 | } |
921 | } else if (IS_GEN6(ring->dev)) { | 922 | } else if (IS_GEN6(ring->dev)) { |
922 | mmio = RING_HWS_PGA_GEN6(ring->mmio_base); | 923 | mmio = RING_HWS_PGA_GEN6(ring->mmio_base); |
@@ -1909,6 +1910,38 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) | |||
1909 | return intel_init_ring_buffer(dev, ring); | 1910 | return intel_init_ring_buffer(dev, ring); |
1910 | } | 1911 | } |
1911 | 1912 | ||
1913 | int intel_init_vebox_ring_buffer(struct drm_device *dev) | ||
1914 | { | ||
1915 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
1916 | struct intel_ring_buffer *ring = &dev_priv->ring[VECS]; | ||
1917 | |||
1918 | ring->name = "video enhancement ring"; | ||
1919 | ring->id = VECS; | ||
1920 | |||
1921 | ring->mmio_base = VEBOX_RING_BASE; | ||
1922 | ring->write_tail = ring_write_tail; | ||
1923 | ring->flush = gen6_ring_flush; | ||
1924 | ring->add_request = gen6_add_request; | ||
1925 | ring->get_seqno = gen6_ring_get_seqno; | ||
1926 | ring->set_seqno = ring_set_seqno; | ||
1927 | ring->irq_enable_mask = 0; | ||
1928 | ring->irq_get = NULL; | ||
1929 | ring->irq_put = NULL; | ||
1930 | ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer; | ||
1931 | ring->sync_to = gen6_ring_sync; | ||
1932 | ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VER; | ||
1933 | ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_VEV; | ||
1934 | ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VEB; | ||
1935 | ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_INVALID; | ||
1936 | ring->signal_mbox[RCS] = GEN6_RVESYNC; | ||
1937 | ring->signal_mbox[VCS] = GEN6_VVESYNC; | ||
1938 | ring->signal_mbox[BCS] = GEN6_BVESYNC; | ||
1939 | ring->signal_mbox[VECS] = GEN6_NOSYNC; | ||
1940 | ring->init = init_ring_common; | ||
1941 | |||
1942 | return intel_init_ring_buffer(dev, ring); | ||
1943 | } | ||
1944 | |||
1912 | int | 1945 | int |
1913 | intel_ring_flush_all_caches(struct intel_ring_buffer *ring) | 1946 | intel_ring_flush_all_caches(struct intel_ring_buffer *ring) |
1914 | { | 1947 | { |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 73619cb34631..1c79520c7e45 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h | |||
@@ -234,6 +234,7 @@ int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring); | |||
234 | int intel_init_render_ring_buffer(struct drm_device *dev); | 234 | int intel_init_render_ring_buffer(struct drm_device *dev); |
235 | int intel_init_bsd_ring_buffer(struct drm_device *dev); | 235 | int intel_init_bsd_ring_buffer(struct drm_device *dev); |
236 | int intel_init_blt_ring_buffer(struct drm_device *dev); | 236 | int intel_init_blt_ring_buffer(struct drm_device *dev); |
237 | int intel_init_vebox_ring_buffer(struct drm_device *dev); | ||
237 | 238 | ||
238 | u32 intel_ring_get_active_head(struct intel_ring_buffer *ring); | 239 | u32 intel_ring_get_active_head(struct intel_ring_buffer *ring); |
239 | void intel_ring_setup_status_page(struct intel_ring_buffer *ring); | 240 | void intel_ring_setup_status_page(struct intel_ring_buffer *ring); |