diff options
| -rw-r--r-- | arch/x86/include/asm/xen/interface.h | 123 | ||||
| -rw-r--r-- | arch/x86/xen/Makefile | 2 | ||||
| -rw-r--r-- | arch/x86/xen/apic.c | 3 | ||||
| -rw-r--r-- | arch/x86/xen/enlighten.c | 12 | ||||
| -rw-r--r-- | arch/x86/xen/pmu.c | 170 | ||||
| -rw-r--r-- | arch/x86/xen/pmu.h | 11 | ||||
| -rw-r--r-- | arch/x86/xen/smp.c | 29 | ||||
| -rw-r--r-- | arch/x86/xen/suspend.c | 23 | ||||
| -rw-r--r-- | include/xen/interface/xen.h | 1 | ||||
| -rw-r--r-- | include/xen/interface/xenpmu.h | 33 |
10 files changed, 398 insertions, 9 deletions
diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h index 3b88eeacdbda..62ca03ef5c65 100644 --- a/arch/x86/include/asm/xen/interface.h +++ b/arch/x86/include/asm/xen/interface.h | |||
| @@ -250,6 +250,129 @@ struct vcpu_guest_context { | |||
| 250 | #endif | 250 | #endif |
| 251 | }; | 251 | }; |
| 252 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); | 252 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); |
| 253 | |||
| 254 | /* AMD PMU registers and structures */ | ||
| 255 | struct xen_pmu_amd_ctxt { | ||
| 256 | /* | ||
| 257 | * Offsets to counter and control MSRs (relative to xen_pmu_arch.c.amd). | ||
| 258 | * For PV(H) guests these fields are RO. | ||
| 259 | */ | ||
| 260 | uint32_t counters; | ||
| 261 | uint32_t ctrls; | ||
| 262 | |||
| 263 | /* Counter MSRs */ | ||
| 264 | #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L | ||
| 265 | uint64_t regs[]; | ||
| 266 | #elif defined(__GNUC__) | ||
| 267 | uint64_t regs[0]; | ||
| 268 | #endif | ||
| 269 | }; | ||
| 270 | |||
| 271 | /* Intel PMU registers and structures */ | ||
| 272 | struct xen_pmu_cntr_pair { | ||
| 273 | uint64_t counter; | ||
| 274 | uint64_t control; | ||
| 275 | }; | ||
| 276 | |||
| 277 | struct xen_pmu_intel_ctxt { | ||
| 278 | /* | ||
| 279 | * Offsets to fixed and architectural counter MSRs (relative to | ||
| 280 | * xen_pmu_arch.c.intel). | ||
| 281 | * For PV(H) guests these fields are RO. | ||
| 282 | */ | ||
| 283 | uint32_t fixed_counters; | ||
| 284 | uint32_t arch_counters; | ||
| 285 | |||
| 286 | /* PMU registers */ | ||
| 287 | uint64_t global_ctrl; | ||
| 288 | uint64_t global_ovf_ctrl; | ||
| 289 | uint64_t global_status; | ||
| 290 | uint64_t fixed_ctrl; | ||
| 291 | uint64_t ds_area; | ||
| 292 | uint64_t pebs_enable; | ||
| 293 | uint64_t debugctl; | ||
| 294 | |||
| 295 | /* Fixed and architectural counter MSRs */ | ||
| 296 | #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L | ||
| 297 | uint64_t regs[]; | ||
| 298 | #elif defined(__GNUC__) | ||
| 299 | uint64_t regs[0]; | ||
| 300 | #endif | ||
| 301 | }; | ||
| 302 | |||
| 303 | /* Sampled domain's registers */ | ||
| 304 | struct xen_pmu_regs { | ||
| 305 | uint64_t ip; | ||
| 306 | uint64_t sp; | ||
| 307 | uint64_t flags; | ||
| 308 | uint16_t cs; | ||
| 309 | uint16_t ss; | ||
| 310 | uint8_t cpl; | ||
| 311 | uint8_t pad[3]; | ||
| 312 | }; | ||
| 313 | |||
| 314 | /* PMU flags */ | ||
| 315 | #define PMU_CACHED (1<<0) /* PMU MSRs are cached in the context */ | ||
| 316 | #define PMU_SAMPLE_USER (1<<1) /* Sample is from user or kernel mode */ | ||
| 317 | #define PMU_SAMPLE_REAL (1<<2) /* Sample is from realmode */ | ||
| 318 | #define PMU_SAMPLE_PV (1<<3) /* Sample from a PV guest */ | ||
| 319 | |||
| 320 | /* | ||
| 321 | * Architecture-specific information describing state of the processor at | ||
| 322 | * the time of PMU interrupt. | ||
| 323 | * Fields of this structure marked as RW for guest should only be written by | ||
| 324 | * the guest when PMU_CACHED bit in pmu_flags is set (which is done by the | ||
| 325 | * hypervisor during PMU interrupt). Hypervisor will read updated data in | ||
| 326 | * XENPMU_flush hypercall and clear PMU_CACHED bit. | ||
| 327 | */ | ||
| 328 | struct xen_pmu_arch { | ||
| 329 | union { | ||
| 330 | /* | ||
| 331 | * Processor's registers at the time of interrupt. | ||
| 332 | * WO for hypervisor, RO for guests. | ||
| 333 | */ | ||
| 334 | struct xen_pmu_regs regs; | ||
| 335 | /* | ||
| 336 | * Padding for adding new registers to xen_pmu_regs in | ||
| 337 | * the future | ||
| 338 | */ | ||
| 339 | #define XENPMU_REGS_PAD_SZ 64 | ||
| 340 | uint8_t pad[XENPMU_REGS_PAD_SZ]; | ||
| 341 | } r; | ||
| 342 | |||
| 343 | /* WO for hypervisor, RO for guest */ | ||
| 344 | uint64_t pmu_flags; | ||
| 345 | |||
| 346 | /* | ||
| 347 | * APIC LVTPC register. | ||
| 348 | * RW for both hypervisor and guest. | ||
| 349 | * Only APIC_LVT_MASKED bit is loaded by the hypervisor into hardware | ||
| 350 | * during XENPMU_flush or XENPMU_lvtpc_set. | ||
| 351 | */ | ||
| 352 | union { | ||
| 353 | uint32_t lapic_lvtpc; | ||
| 354 | uint64_t pad; | ||
| 355 | } l; | ||
| 356 | |||
| 357 | /* | ||
| 358 | * Vendor-specific PMU registers. | ||
| 359 | * RW for both hypervisor and guest (see exceptions above). | ||
| 360 | * Guest's updates to this field are verified and then loaded by the | ||
| 361 | * hypervisor into hardware during XENPMU_flush | ||
| 362 | */ | ||
| 363 | union { | ||
| 364 | struct xen_pmu_amd_ctxt amd; | ||
| 365 | struct xen_pmu_intel_ctxt intel; | ||
| 366 | |||
| 367 | /* | ||
| 368 | * Padding for contexts (fixed parts only, does not include | ||
| 369 | * MSR banks that are specified by offsets) | ||
| 370 | */ | ||
| 371 | #define XENPMU_CTXT_PAD_SZ 128 | ||
| 372 | uint8_t pad[XENPMU_CTXT_PAD_SZ]; | ||
| 373 | } c; | ||
| 374 | }; | ||
| 375 | |||
| 253 | #endif /* !__ASSEMBLY__ */ | 376 | #endif /* !__ASSEMBLY__ */ |
| 254 | 377 | ||
| 255 | /* | 378 | /* |
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile index 4b6e29ac0968..e47e52787d32 100644 --- a/arch/x86/xen/Makefile +++ b/arch/x86/xen/Makefile | |||
| @@ -13,7 +13,7 @@ CFLAGS_mmu.o := $(nostackp) | |||
| 13 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ | 13 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ |
| 14 | time.o xen-asm.o xen-asm_$(BITS).o \ | 14 | time.o xen-asm.o xen-asm_$(BITS).o \ |
| 15 | grant-table.o suspend.o platform-pci-unplug.o \ | 15 | grant-table.o suspend.o platform-pci-unplug.o \ |
| 16 | p2m.o apic.o | 16 | p2m.o apic.o pmu.o |
| 17 | 17 | ||
| 18 | obj-$(CONFIG_EVENT_TRACING) += trace.o | 18 | obj-$(CONFIG_EVENT_TRACING) += trace.o |
| 19 | 19 | ||
diff --git a/arch/x86/xen/apic.c b/arch/x86/xen/apic.c index 70e060ad879a..d03ebfa89b9f 100644 --- a/arch/x86/xen/apic.c +++ b/arch/x86/xen/apic.c | |||
| @@ -72,6 +72,9 @@ static u32 xen_apic_read(u32 reg) | |||
| 72 | 72 | ||
| 73 | static void xen_apic_write(u32 reg, u32 val) | 73 | static void xen_apic_write(u32 reg, u32 val) |
| 74 | { | 74 | { |
| 75 | if (reg == APIC_LVTPC) | ||
| 76 | return; | ||
| 77 | |||
| 75 | /* Warn to see if there's any stray references */ | 78 | /* Warn to see if there's any stray references */ |
| 76 | WARN(1,"register: %x, value: %x\n", reg, val); | 79 | WARN(1,"register: %x, value: %x\n", reg, val); |
| 77 | } | 80 | } |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 373dbc9810d1..19072f91a8e2 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
| @@ -84,6 +84,7 @@ | |||
| 84 | #include "mmu.h" | 84 | #include "mmu.h" |
| 85 | #include "smp.h" | 85 | #include "smp.h" |
| 86 | #include "multicalls.h" | 86 | #include "multicalls.h" |
| 87 | #include "pmu.h" | ||
| 87 | 88 | ||
| 88 | EXPORT_SYMBOL_GPL(hypercall_page); | 89 | EXPORT_SYMBOL_GPL(hypercall_page); |
| 89 | 90 | ||
| @@ -1082,6 +1083,11 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) | |||
| 1082 | return ret; | 1083 | return ret; |
| 1083 | } | 1084 | } |
| 1084 | 1085 | ||
| 1086 | unsigned long long xen_read_pmc(int counter) | ||
| 1087 | { | ||
| 1088 | return 0; | ||
| 1089 | } | ||
| 1090 | |||
| 1085 | void xen_setup_shared_info(void) | 1091 | void xen_setup_shared_info(void) |
| 1086 | { | 1092 | { |
| 1087 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | 1093 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { |
| @@ -1216,7 +1222,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = { | |||
| 1216 | .write_msr = xen_write_msr_safe, | 1222 | .write_msr = xen_write_msr_safe, |
| 1217 | 1223 | ||
| 1218 | .read_tsc = native_read_tsc, | 1224 | .read_tsc = native_read_tsc, |
| 1219 | .read_pmc = native_read_pmc, | 1225 | .read_pmc = xen_read_pmc, |
| 1220 | 1226 | ||
| 1221 | .read_tscp = native_read_tscp, | 1227 | .read_tscp = native_read_tscp, |
| 1222 | 1228 | ||
| @@ -1267,6 +1273,10 @@ static const struct pv_apic_ops xen_apic_ops __initconst = { | |||
| 1267 | static void xen_reboot(int reason) | 1273 | static void xen_reboot(int reason) |
| 1268 | { | 1274 | { |
| 1269 | struct sched_shutdown r = { .reason = reason }; | ||
