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-rw-r--r--arch/mips/include/asm/mach-malta/kernel-entry-init.h6
-rw-r--r--arch/mips/include/asm/mipsregs.h3
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
index 0cf8622db27f..ab03eb3fadac 100644
--- a/arch/mips/include/asm/mach-malta/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
@@ -56,7 +56,7 @@
56 (0 << MIPS_SEGCFG_PA_SHIFT) | \ 56 (0 << MIPS_SEGCFG_PA_SHIFT) | \
57 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16) 57 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
58 or t0, t2 58 or t0, t2
59 mtc0 t0, $5, 2 59 mtc0 t0, CP0_SEGCTL0
60 60
61 /* SegCtl1 */ 61 /* SegCtl1 */
62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 62 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
@@ -67,7 +67,7 @@
67 (0 << MIPS_SEGCFG_PA_SHIFT) | \ 67 (0 << MIPS_SEGCFG_PA_SHIFT) | \
68 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16) 68 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
69 ins t0, t1, 16, 3 69 ins t0, t1, 16, 3
70 mtc0 t0, $5, 3 70 mtc0 t0, CP0_SEGCTL1
71 71
72 /* SegCtl2 */ 72 /* SegCtl2 */
73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \ 73 li t0, ((MIPS_SEGCFG_MUSUK << MIPS_SEGCFG_AM_SHIFT) | \
@@ -77,7 +77,7 @@
77 (4 << MIPS_SEGCFG_PA_SHIFT) | \ 77 (4 << MIPS_SEGCFG_PA_SHIFT) | \
78 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16) 78 (1 << MIPS_SEGCFG_EU_SHIFT)) << 16)
79 or t0, t2 79 or t0, t2
80 mtc0 t0, $5, 4 80 mtc0 t0, CP0_SEGCTL2
81 81
82 jal mips_ihb 82 jal mips_ihb
83 mfc0 t0, $16, 5 83 mfc0 t0, $16, 5
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 25d01577d0b5..8471905f9288 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -48,6 +48,9 @@
48#define CP0_CONF $3 48#define CP0_CONF $3
49#define CP0_CONTEXT $4 49#define CP0_CONTEXT $4
50#define CP0_PAGEMASK $5 50#define CP0_PAGEMASK $5
51#define CP0_SEGCTL0 $5, 2
52#define CP0_SEGCTL1 $5, 3
53#define CP0_SEGCTL2 $5, 4
51#define CP0_WIRED $6 54#define CP0_WIRED $6
52#define CP0_INFO $7 55#define CP0_INFO $7
53#define CP0_HWRENA $7, 0 56#define CP0_HWRENA $7, 0