diff options
-rw-r--r-- | drivers/net/wireless/ath/carl9170/fwcmd.h | 8 | ||||
-rw-r--r-- | drivers/net/wireless/ath/carl9170/fwdesc.h | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath/carl9170/hw.h | 73 | ||||
-rw-r--r-- | drivers/net/wireless/ath/carl9170/version.h | 6 |
4 files changed, 87 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/carl9170/fwcmd.h b/drivers/net/wireless/ath/carl9170/fwcmd.h index 9111d4ffc1b3..ea1d80f9a50e 100644 --- a/drivers/net/wireless/ath/carl9170/fwcmd.h +++ b/drivers/net/wireless/ath/carl9170/fwcmd.h | |||
@@ -56,6 +56,7 @@ enum carl9170_cmd_oids { | |||
56 | CARL9170_CMD_RX_FILTER = 0x07, | 56 | CARL9170_CMD_RX_FILTER = 0x07, |
57 | CARL9170_CMD_WOL = 0x08, | 57 | CARL9170_CMD_WOL = 0x08, |
58 | CARL9170_CMD_TALLY = 0x09, | 58 | CARL9170_CMD_TALLY = 0x09, |
59 | CARL9170_CMD_WREGB = 0x0a, | ||
59 | 60 | ||
60 | /* CAM */ | 61 | /* CAM */ |
61 | CARL9170_CMD_EKEY = 0x10, | 62 | CARL9170_CMD_EKEY = 0x10, |
@@ -123,6 +124,12 @@ struct carl9170_write_reg { | |||
123 | } regs[0] __packed; | 124 | } regs[0] __packed; |
124 | } __packed; | 125 | } __packed; |
125 | 126 | ||
127 | struct carl9170_write_reg_byte { | ||
128 | __le32 addr; | ||
129 | __le32 count; | ||
130 | u8 val[0]; | ||
131 | } __packed; | ||
132 | |||
126 | #define CARL9170FW_PHY_HT_ENABLE 0x4 | 133 | #define CARL9170FW_PHY_HT_ENABLE 0x4 |
127 | #define CARL9170FW_PHY_HT_DYN2040 0x8 | 134 | #define CARL9170FW_PHY_HT_DYN2040 0x8 |
128 | #define CARL9170FW_PHY_HT_EXT_CHAN_OFF 0x3 | 135 | #define CARL9170FW_PHY_HT_EXT_CHAN_OFF 0x3 |
@@ -226,6 +233,7 @@ struct carl9170_cmd { | |||
226 | struct carl9170_u32_list echo; | 233 | struct carl9170_u32_list echo; |
227 | struct carl9170_reg_list rreg; | 234 | struct carl9170_reg_list rreg; |
228 | struct carl9170_write_reg wreg; | 235 | struct carl9170_write_reg wreg; |
236 | struct carl9170_write_reg_byte wregb; | ||
229 | struct carl9170_rf_init rf_init; | 237 | struct carl9170_rf_init rf_init; |
230 | struct carl9170_psm psm; | 238 | struct carl9170_psm psm; |
231 | struct carl9170_wol_cmd wol; | 239 | struct carl9170_wol_cmd wol; |
diff --git a/drivers/net/wireless/ath/carl9170/fwdesc.h b/drivers/net/wireless/ath/carl9170/fwdesc.h index 66848d47c88e..0533f79cb998 100644 --- a/drivers/net/wireless/ath/carl9170/fwdesc.h +++ b/drivers/net/wireless/ath/carl9170/fwdesc.h | |||
@@ -81,6 +81,12 @@ enum carl9170fw_feature_list { | |||
81 | /* Firmware will pass BA when BARs are queued */ | 81 | /* Firmware will pass BA when BARs are queued */ |
82 | CARL9170FW_RX_BA_FILTER, | 82 | CARL9170FW_RX_BA_FILTER, |
83 | 83 | ||
84 | /* Firmware has support to write a byte at a time */ | ||
85 | CARL9170FW_HAS_WREGB_CMD, | ||
86 | |||
87 | /* Pattern generator */ | ||
88 | CARL9170FW_PATTERN_GENERATOR, | ||
89 | |||
84 | /* KEEP LAST */ | 90 | /* KEEP LAST */ |
85 | __CARL9170FW_FEATURE_NUM | 91 | __CARL9170FW_FEATURE_NUM |
86 | }; | 92 | }; |
diff --git a/drivers/net/wireless/ath/carl9170/hw.h b/drivers/net/wireless/ath/carl9170/hw.h index 0db874abde50..08e0ae9c5836 100644 --- a/drivers/net/wireless/ath/carl9170/hw.h +++ b/drivers/net/wireless/ath/carl9170/hw.h | |||
@@ -453,9 +453,74 @@ | |||
453 | #define AR9170_MC_REG_BASE 0x1d1000 | 453 | #define AR9170_MC_REG_BASE 0x1d1000 |
454 | 454 | ||
455 | #define AR9170_MC_REG_FLASH_WAIT_STATE (AR9170_MC_REG_BASE + 0x000) | 455 | #define AR9170_MC_REG_FLASH_WAIT_STATE (AR9170_MC_REG_BASE + 0x000) |
456 | #define AR9170_MC_REG_SEEPROM_WP0 (AR9170_MC_REG_BASE + 0x400) | 456 | |
457 | #define AR9170_MC_REG_SEEPROM_WP1 (AR9170_MC_REG_BASE + 0x404) | 457 | #define AR9170_SPI_REG_BASE (AR9170_MC_REG_BASE + 0x200) |
458 | #define AR9170_MC_REG_SEEPROM_WP2 (AR9170_MC_REG_BASE + 0x408) | 458 | #define AR9170_SPI_REG_CONTROL0 (AR9170_SPI_REG_BASE + 0x000) |
459 | #define AR9170_SPI_CONTROL0_BUSY BIT(0) | ||
460 | #define AR9170_SPI_CONTROL0_CMD_GO BIT(1) | ||
461 | #define AR9170_SPI_CONTROL0_PAGE_WR BIT(2) | ||
462 | #define AR9170_SPI_CONTROL0_SEQ_RD BIT(3) | ||
463 | #define AR9170_SPI_CONTROL0_CMD_ABORT BIT(4) | ||
464 | #define AR9170_SPI_CONTROL0_CMD_LEN_S 8 | ||
465 | #define AR9170_SPI_CONTROL0_CMD_LEN 0x00000f00 | ||
466 | #define AR9170_SPI_CONTROL0_RD_LEN_S 12 | ||
467 | #define AR9170_SPI_CONTROL0_RD_LEN 0x00007000 | ||
468 | |||
469 | #define AR9170_SPI_REG_CONTROL1 (AR9170_SPI_REG_BASE + 0x004) | ||
470 | #define AR9170_SPI_CONTROL1_SCK_RATE BIT(0) | ||
471 | #define AR9170_SPI_CONTROL1_DRIVE_SDO BIT(1) | ||
472 | #define AR9170_SPI_CONTROL1_MODE_SEL_S 2 | ||
473 | #define AR9170_SPI_CONTROL1_MODE_SEL 0x000000c0 | ||
474 | #define AR9170_SPI_CONTROL1_WRITE_PROTECT BIT(4) | ||
475 | |||
476 | #define AR9170_SPI_REG_COMMAND_PORT0 (AR9170_SPI_REG_BASE + 0x008) | ||
477 | #define AR9170_SPI_COMMAND_PORT0_CMD0_S 0 | ||
478 | #define AR9170_SPI_COMMAND_PORT0_CMD0 0x000000ff | ||
479 | #define AR9170_SPI_COMMAND_PORT0_CMD1_S 8 | ||
480 | #define AR9170_SPI_COMMAND_PORT0_CMD1 0x0000ff00 | ||
481 | #define AR9170_SPI_COMMAND_PORT0_CMD2_S 16 | ||
482 | #define AR9170_SPI_COMMAND_PORT0_CMD2 0x00ff0000 | ||
483 | #define AR9170_SPI_COMMAND_PORT0_CMD3_S 24 | ||
484 | #define AR9170_SPI_COMMAND_PORT0_CMD3 0xff000000 | ||
485 | |||
486 | #define AR9170_SPI_REG_COMMAND_PORT1 (AR9170_SPI_REG_BASE + 0x00C) | ||
487 | #define AR9170_SPI_COMMAND_PORT1_CMD4_S 0 | ||
488 | #define AR9170_SPI_COMMAND_PORT1_CMD4 0x000000ff | ||
489 | #define AR9170_SPI_COMMAND_PORT1_CMD5_S 8 | ||
490 | #define AR9170_SPI_COMMAND_PORT1_CMD5 0x0000ff00 | ||
491 | #define AR9170_SPI_COMMAND_PORT1_CMD6_S 16 | ||
492 | #define AR9170_SPI_COMMAND_PORT1_CMD6 0x00ff0000 | ||
493 | #define AR9170_SPI_COMMAND_PORT1_CMD7_S 24 | ||
494 | #define AR9170_SPI_COMMAND_PORT1_CMD7 0xff000000 | ||
495 | |||
496 | #define AR9170_SPI_REG_DATA_PORT (AR9170_SPI_REG_BASE + 0x010) | ||
497 | #define AR9170_SPI_REG_PAGE_WRITE_LEN (AR9170_SPI_REG_BASE + 0x014) | ||
498 | |||
499 | #define AR9170_EEPROM_REG_BASE (AR9170_MC_REG_BASE + 0x400) | ||
500 | #define AR9170_EEPROM_REG_WP_MAGIC1 (AR9170_EEPROM_REG_BASE + 0x000) | ||
501 | #define AR9170_EEPROM_WP_MAGIC1 0x12345678 | ||
502 | |||
503 | #define AR9170_EEPROM_REG_WP_MAGIC2 (AR9170_EEPROM_REG_BASE + 0x004) | ||
504 | #define AR9170_EEPROM_WP_MAGIC2 0x55aa00ff | ||
505 | |||
506 | #define AR9170_EEPROM_REG_WP_MAGIC3 (AR9170_EEPROM_REG_BASE + 0x008) | ||
507 | #define AR9170_EEPROM_WP_MAGIC3 0x13579ace | ||
508 | |||
509 | #define AR9170_EEPROM_REG_CLOCK_DIV (AR9170_EEPROM_REG_BASE + 0x00C) | ||
510 | #define AR9170_EEPROM_CLOCK_DIV_FAC_S 0 | ||
511 | #define AR9170_EEPROM_CLOCK_DIV_FAC 0x000001ff | ||
512 | #define AR9170_EEPROM_CLOCK_DIV_FAC_39KHZ 0xff | ||
513 | #define AR9170_EEPROM_CLOCK_DIV_FAC_78KHZ 0x7f | ||
514 | #define AR9170_EEPROM_CLOCK_DIV_FAC_312KHZ 0x1f | ||
515 | #define AR9170_EEPROM_CLOCK_DIV_FAC_10MHZ 0x0 | ||
516 | #define AR9170_EEPROM_CLOCK_DIV_SOFT_RST BIT(9) | ||
517 | |||
518 | #define AR9170_EEPROM_REG_MODE (AR9170_EEPROM_REG_BASE + 0x010) | ||
519 | #define AR9170_EEPROM_MODE_EEPROM_SIZE_16K_PLUS BIT(31) | ||
520 | |||
521 | #define AR9170_EEPROM_REG_WRITE_PROTECT (AR9170_EEPROM_REG_BASE + 0x014) | ||
522 | #define AR9170_EEPROM_WRITE_PROTECT_WP_STATUS BIT(0) | ||
523 | #define AR9170_EEPROM_WRITE_PROTECT_WP_SET BIT(8) | ||
459 | 524 | ||
460 | /* Interrupt Controller */ | 525 | /* Interrupt Controller */ |
461 | #define AR9170_MAX_INT_SRC 9 | 526 | #define AR9170_MAX_INT_SRC 9 |
@@ -589,11 +654,13 @@ | |||
589 | #define AR9170_USB_REG_EP10_MAP (AR9170_USB_REG_BASE + 0x039) | 654 | #define AR9170_USB_REG_EP10_MAP (AR9170_USB_REG_BASE + 0x039) |
590 | 655 | ||
591 | #define AR9170_USB_REG_EP_IN_MAX_SIZE_HIGH (AR9170_USB_REG_BASE + 0x03f) | 656 | #define AR9170_USB_REG_EP_IN_MAX_SIZE_HIGH (AR9170_USB_REG_BASE + 0x03f) |
657 | #define AR9170_USB_EP_IN_STALL 0x8 | ||
592 | #define AR9170_USB_EP_IN_TOGGLE 0x10 | 658 | #define AR9170_USB_EP_IN_TOGGLE 0x10 |
593 | 659 | ||
594 | #define AR9170_USB_REG_EP_IN_MAX_SIZE_LOW (AR9170_USB_REG_BASE + 0x03e) | 660 | #define AR9170_USB_REG_EP_IN_MAX_SIZE_LOW (AR9170_USB_REG_BASE + 0x03e) |
595 | 661 | ||
596 | #define AR9170_USB_REG_EP_OUT_MAX_SIZE_HIGH (AR9170_USB_REG_BASE + 0x05f) | 662 | #define AR9170_USB_REG_EP_OUT_MAX_SIZE_HIGH (AR9170_USB_REG_BASE + 0x05f) |
663 | #define AR9170_USB_EP_OUT_STALL 0x8 | ||
597 | #define AR9170_USB_EP_OUT_TOGGLE 0x10 | 664 | #define AR9170_USB_EP_OUT_TOGGLE 0x10 |
598 | 665 | ||
599 | #define AR9170_USB_REG_EP_OUT_MAX_SIZE_LOW (AR9170_USB_REG_BASE + 0x05e) | 666 | #define AR9170_USB_REG_EP_OUT_MAX_SIZE_LOW (AR9170_USB_REG_BASE + 0x05e) |
diff --git a/drivers/net/wireless/ath/carl9170/version.h b/drivers/net/wireless/ath/carl9170/version.h index 2282847d4bb8..a0410fe8c03a 100644 --- a/drivers/net/wireless/ath/carl9170/version.h +++ b/drivers/net/wireless/ath/carl9170/version.h | |||
@@ -1,7 +1,7 @@ | |||
1 | #ifndef __CARL9170_SHARED_VERSION_H | 1 | #ifndef __CARL9170_SHARED_VERSION_H |
2 | #define __CARL9170_SHARED_VERSION_H | 2 | #define __CARL9170_SHARED_VERSION_H |
3 | #define CARL9170FW_VERSION_YEAR 12 | 3 | #define CARL9170FW_VERSION_YEAR 16 |
4 | #define CARL9170FW_VERSION_MONTH 12 | 4 | #define CARL9170FW_VERSION_MONTH 2 |
5 | #define CARL9170FW_VERSION_DAY 15 | 5 | #define CARL9170FW_VERSION_DAY 15 |
6 | #define CARL9170FW_VERSION_GIT "1.9.7" | 6 | #define CARL9170FW_VERSION_GIT "1.9.9" |
7 | #endif /* __CARL9170_SHARED_VERSION_H */ | 7 | #endif /* __CARL9170_SHARED_VERSION_H */ |