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authorStephen Warren <swarren@nvidia.com>2012-04-06 13:18:16 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-04-06 13:25:16 -0400
commita9005b67b3a2103b2b7e32bf602d3f023076fe06 (patch)
tree983c85dcb8a7769acf3ac2c5fafeb1652d83b343 /sound/soc/tegra
parent17933db2e4758b0cefdf23124087b488bce24b82 (diff)
ASoC: tegra: set a sensible initial clock rate
Initialize the audio clock tree appropriately for some reasonable rate. This makes sure the PLLs etc. are actually programmed to something reasonable when the audio driver is loaded. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/tegra')
-rw-r--r--sound/soc/tegra/tegra_asoc_utils.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c
index f8428e410e05..30424e157f69 100644
--- a/sound/soc/tegra/tegra_asoc_utils.c
+++ b/sound/soc/tegra/tegra_asoc_utils.c
@@ -133,8 +133,14 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
133 goto err_put_pll_a_out0; 133 goto err_put_pll_a_out0;
134 } 134 }
135 135
136 ret = tegra_asoc_utils_set_rate(data, 44100, 256 * 44100);
137 if (ret)
138 goto err_put_cdev1;
139
136 return 0; 140 return 0;
137 141
142err_put_cdev1:
143 clk_put(data->clk_cdev1);
138err_put_pll_a_out0: 144err_put_pll_a_out0:
139 clk_put(data->clk_pll_a_out0); 145 clk_put(data->clk_pll_a_out0);
140err_put_pll_a: 146err_put_pll_a: