NFC: NCI: allow spi driver to choose transfer clock

In some cases low level drivers might want to update the
SPI transfer clock (e.g. during firmware download).

This patch adds this support. Without any modification the
driver will use the default SPI clock (from pdata or device tree).

Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

1 files changed, 6 insertions, 1 deletions

diff --git a/net/nfc/nci/spi.c b/net/nfc/nci/spi.c
index 25153d0e33cf..d904cd2f1442 100644
--- a/net/nfc/nci/spi.c
+++ b/net/nfc/nci/spi.c
@@ -58,6 +58,7 @@ static int __nci_spi_send(struct nci_spi *nspi, struct sk_buff *skb,
         }
         t.cs_change = cs_change;
         t.delay_usecs = nspi->xfer_udelay;
+        t.speed_hz = nspi->xfer_speed_hz;
 
         spi_message_init(&m);
         spi_message_add_tail(&t, &m);
@@ -144,7 +145,8 @@ struct nci_spi *nci_spi_allocate_spi(struct spi_device *spi,
 
         nspi->acknowledge_mode = acknowledge_mode;
         nspi->xfer_udelay = delay;
-
+        /* Use controller max SPI speed by default */
+        nspi->xfer_speed_hz = 0;
         nspi->spi = spi;
         nspi->ndev = ndev;
         init_completion(&nspi->req_completion);
@@ -197,12 +199,14 @@ static struct sk_buff *__nci_spi_read(struct nci_spi *nspi)
         tx.tx_buf = req;
         tx.len = 2;
         tx.cs_change = 0;
+        tx.speed_hz = nspi->xfer_speed_hz;
         spi_message_add_tail(&tx, &m);
 
         memset(&rx, 0, sizeof(struct spi_transfer));
         rx.rx_buf = resp_hdr;
         rx.len = 2;
         rx.cs_change = 1;
+        rx.speed_hz = nspi->xfer_speed_hz;
         spi_message_add_tail(&rx, &m);
 
         ret = spi_sync(nspi->spi, &m);
@@ -226,6 +230,7 @@ static struct sk_buff *__nci_spi_read(struct nci_spi *nspi)
         rx.len = rx_len;
         rx.cs_change = 0;
         rx.delay_usecs = nspi->xfer_udelay;
+        rx.speed_hz = nspi->xfer_speed_hz;
         spi_message_add_tail(&rx, &m);
 
         ret = spi_sync(nspi->spi, &m);