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authorJonathan Yong <jonathan.yong@intel.com>2016-06-11 15:13:38 -0400
committerBjorn Helgaas <bhelgaas@google.com>2016-08-15 14:44:08 -0400
commit9bb04a0c4e261187be904d05c2bcd1da0eebc20c (patch)
tree725a72656a45640205c5d05885dc9c3fd41f01e0 /include/uapi/linux
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
PCI: Add Precision Time Measurement (PTM) support
Add Precision Time Measurement (PTM) support (see PCIe r3.1, sec 6.22). Enable PTM on PTM Root devices and switch ports. This does not enable PTM on endpoints. There currently are no PTM-capable devices on the market, but it is expected to be supported by the Intel Apollo Lake platform. [bhelgaas: complete rework] Signed-off-by: Jonathan Yong <jonathan.yong@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/uapi/linux')
-rw-r--r--include/uapi/linux/pci_regs.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 404095124ae2..926fff41b417 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -671,7 +671,8 @@
671#define PCI_EXT_CAP_ID_PMUX 0x1A /* Protocol Multiplexing */ 671#define PCI_EXT_CAP_ID_PMUX 0x1A /* Protocol Multiplexing */
672#define PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */ 672#define PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */
673#define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */ 673#define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */
674#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DPC 674#define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */
675#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM
675 676
676#define PCI_EXT_CAP_DSN_SIZEOF 12 677#define PCI_EXT_CAP_DSN_SIZEOF 12
677#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40 678#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -964,4 +965,11 @@
964 965
965#define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */ 966#define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */
966 967
968/* Precision Time Measurement */
969#define PCI_PTM_CAP 0x04 /* PTM Capability */
970#define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */
971#define PCI_PTM_CTRL 0x08 /* PTM Control */
972#define PCI_PTM_CTRL_ENABLE 0x00000001 /* PTM enable */
973#define PCI_PTM_CTRL_ROOT 0x00000002 /* Root select */
974
967#endif /* LINUX_PCI_REGS_H */ 975#endif /* LINUX_PCI_REGS_H */