Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes.

  The executive summary:

   - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY.
   - Avoid useless rebuilds for zboot.
   - jz4780: Add NEMC, BCH and NAND device tree nodes
   - Initial support for the MicroChip's DT platform.  As all the device
     drivers are missing this is still of limited use.
   - Some Loongson3 cleanups.
   - The unavoidable whitespace polishing.
   - Reduce clock skew when synchronizing the CPU cycle counters on CPU
     startup.
   - Add MIPS R6 fixes.
   - Lots of cleanups across arch/mips as fallout from KVM.
   - Lots of minor fixes and changes for IEEE 754-2008 support to the
     FPU emulator / fp-assist software.
   - Minor Ralink, BCM47xx and bcm963xx platform support improvments.
   - Support SMP on BCM63168"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits)
  MIPS: zboot: Add support for serial debug using the PROM
  MIPS: zboot: Avoid useless rebuilds
  MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB
  MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function
  MIPS: bcm963xx: Update bcm_tag field image_sequence
  MIPS: bcm963xx: Move extended flash address to bcm_tag header file
  MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure
  MIPS: bcm63xx: nvram: Use nvram structure definition from header file
  MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure
  MAINTAINERS: Add KVM for MIPS entry
  MIPS: KVM: Add missing newline to kvm_err()
  MIPS: Move KVM specific opcodes into asm/inst.h
  MIPS: KVM: Use cacheops.h definitions
  MIPS: Break down cacheops.h definitions
  MIPS: Use EXCCODE_ constants with set_except_vector()
  MIPS: Update trap codes
  MIPS: Move Cause.ExcCode trap codes to mipsregs.h
  MIPS: KVM: Make kvm_mips_{init,exit}() static
  MIPS: KVM: Refactor added offsetof()s
  MIPS: KVM: Convert EXPORT_SYMBOL to _GPL
  ...

3 files changed, 236 insertions, 0 deletions

diff --git a/include/linux/bcm963xx_nvram.h b/include/linux/bcm963xx_nvram.h
new file mode 100644
index 000000000000..290c231b8cf1
--- /dev/null
+++ b/include/linux/bcm963xx_nvram.h
@@ -0,0 +1,112 @@
+#ifndef __LINUX_BCM963XX_NVRAM_H__
+#define __LINUX_BCM963XX_NVRAM_H__
+
+#include <linux/crc32.h>
+#include <linux/if_ether.h>
+#include <linux/sizes.h>
+#include <linux/types.h>
+
+/*
+ * Broadcom BCM963xx SoC board nvram data structure.
+ *
+ * The nvram structure varies in size depending on the SoC board version. Use
+ * the appropriate minimum BCM963XX_NVRAM_*_SIZE define for the information
+ * you need instead of sizeof(struct bcm963xx_nvram) as this may change.
+ */
+
+#define BCM963XX_NVRAM_V4_SIZE          300
+#define BCM963XX_NVRAM_V5_SIZE          (1 * SZ_1K)
+
+#define BCM963XX_DEFAULT_PSI_SIZE       64
+
+enum bcm963xx_nvram_nand_part {
+        BCM963XX_NVRAM_NAND_PART_BOOT = 0,
+        BCM963XX_NVRAM_NAND_PART_ROOTFS_1,
+        BCM963XX_NVRAM_NAND_PART_ROOTFS_2,
+        BCM963XX_NVRAM_NAND_PART_DATA,
+        BCM963XX_NVRAM_NAND_PART_BBT,
+
+        __BCM963XX_NVRAM_NAND_NR_PARTS
+};
+
+struct bcm963xx_nvram {
+        u32     version;
+        char    bootline[256];
+        char    name[16];
+        u32     main_tp_number;
+        u32     psi_size;
+        u32     mac_addr_count;
+        u8      mac_addr_base[ETH_ALEN];
+        u8      __reserved1[2];
+        u32     checksum_v4;
+
+        u8      __reserved2[292];
+        u32     nand_part_offset[__BCM963XX_NVRAM_NAND_NR_PARTS];
+        u32     nand_part_size[__BCM963XX_NVRAM_NAND_NR_PARTS];
+        u8      __reserved3[388];
+        u32     checksum_v5;
+};
+
+#define BCM963XX_NVRAM_NAND_PART_OFFSET(nvram, part) \
+        bcm963xx_nvram_nand_part_offset(nvram, BCM963XX_NVRAM_NAND_PART_ ##part)
+
+static inline u64 __pure bcm963xx_nvram_nand_part_offset(
+        const struct bcm963xx_nvram *nvram,
+        enum bcm963xx_nvram_nand_part part)
+{
+        return nvram->nand_part_offset[part] * SZ_1K;
+}
+
+#define BCM963XX_NVRAM_NAND_PART_SIZE(nvram, part) \
+        bcm963xx_nvram_nand_part_size(nvram, BCM963XX_NVRAM_NAND_PART_ ##part)
+
+static inline u64 __pure bcm963xx_nvram_nand_part_size(
+        const struct bcm963xx_nvram *nvram,
+        enum bcm963xx_nvram_nand_part part)
+{
+        return nvram->nand_part_size[part] * SZ_1K;
+}
+
+/*
+ * bcm963xx_nvram_checksum - Verify nvram checksum
+ *
+ * @nvram: pointer to full size nvram data structure
+ * @expected_out: optional pointer to store expected checksum value
+ * @actual_out: optional pointer to store actual checksum value
+ *
+ * Return: 0 if the checksum is valid, otherwise -EINVAL
+ */
+static int __maybe_unused bcm963xx_nvram_checksum(
+        const struct bcm963xx_nvram *nvram,
+        u32 *expected_out, u32 *actual_out)
+{
+        u32 expected, actual;
+        size_t len;
+
+        if (nvram->version <= 4) {
+                expected = nvram->checksum_v4;
+                len = BCM963XX_NVRAM_V4_SIZE - sizeof(u32);
+        } else {
+                expected = nvram->checksum_v5;
+                len = BCM963XX_NVRAM_V5_SIZE - sizeof(u32);
+        }
+
+        /*
+         * Calculate the CRC32 value for the nvram with a checksum value
+         * of 0 without modifying or copying the nvram by combining:
+         * - The CRC32 of the nvram without the checksum value
+         * - The CRC32 of a zero checksum value (which is also 0)
+         */
+        actual = crc32_le_combine(
+                crc32_le(~0, (u8 *)nvram, len), 0, sizeof(u32));
+
+        if (expected_out)
+                *expected_out = expected;
+
+        if (actual_out)
+                *actual_out = actual;
+
+        return expected == actual ? 0 : -EINVAL;
+};
+
+#endif /* __LINUX_BCM963XX_NVRAM_H__ */
diff --git a/include/linux/bcm963xx_tag.h b/include/linux/bcm963xx_tag.h
new file mode 100644
index 000000000000..161c7b37a77b
--- /dev/null
+++ b/include/linux/bcm963xx_tag.h
@@ -0,0 +1,102 @@
+#ifndef __LINUX_BCM963XX_TAG_H__
+#define __LINUX_BCM963XX_TAG_H__
+
+#include <linux/types.h>
+
+#define TAGVER_LEN              4       /* Length of Tag Version */
+#define TAGLAYOUT_LEN           4       /* Length of FlashLayoutVer */
+#define SIG1_LEN                20      /* Company Signature 1 Length */
+#define SIG2_LEN                14      /* Company Signature 2 Length */
+#define BOARDID_LEN             16      /* Length of BoardId */
+#define ENDIANFLAG_LEN          2       /* Endian Flag Length */
+#define CHIPID_LEN              6       /* Chip Id Length */
+#define IMAGE_LEN               10      /* Length of Length Field */
+#define ADDRESS_LEN             12      /* Length of Address field */
+#define IMAGE_SEQUENCE_LEN      4       /* Image sequence Length */
+#define RSASIG_LEN              20      /* Length of RSA Signature in tag */
+#define TAGINFO1_LEN            30      /* Length of vendor information field1 in tag */
+#define FLASHLAYOUTVER_LEN      4       /* Length of Flash Layout Version String tag */
+#define TAGINFO2_LEN            16      /* Length of vendor information field2 in tag */
+#define ALTTAGINFO_LEN          54      /* Alternate length for vendor information; Pirelli */
+
+#define NUM_PIRELLI             2
+#define IMAGETAG_CRC_START      0xFFFFFFFF
+
+#define PIRELLI_BOARDS { \
+        "AGPF-S0", \
+        "DWV-S0", \
+}
+
+/* Extended flash address, needs to be subtracted
+ * from bcm_tag flash image offsets.
+ */
+#define BCM963XX_EXTENDED_SIZE  0xBFC00000
+
+/*
+ * The broadcom firmware assumes the rootfs starts the image,
+ * therefore uses the rootfs start (flash_image_address)
+ * to determine where to flash the image.  Since we have the kernel first
+ * we have to give it the kernel address, but the crc uses the length
+ * associated with this address (root_length), which is added to the kernel
+ * length (kernel_length) to determine the length of image to flash and thus
+ * needs to be rootfs + deadcode (jffs2 EOF marker)
+*/
+
+struct bcm_tag {
+        /* 0-3: Version of the image tag */
+        char tag_version[TAGVER_LEN];
+        /* 4-23: Company Line 1 */
+        char sig_1[SIG1_LEN];
+        /*  24-37: Company Line 2 */
+        char sig_2[SIG2_LEN];
+        /* 38-43: Chip this image is for */
+        char chip_id[CHIPID_LEN];
+        /* 44-59: Board name */
+        char board_id[BOARDID_LEN];
+        /* 60-61: Map endianness -- 1 BE 0 LE */
+        char big_endian[ENDIANFLAG_LEN];
+        /* 62-71: Total length of image */
+        char total_length[IMAGE_LEN];
+        /* 72-83: Address in memory of CFE */
+        char cfe__address[ADDRESS_LEN];
+        /* 84-93: Size of CFE */
+        char cfe_length[IMAGE_LEN];
+        /* 94-105: Address in memory of image start
+         * (kernel for OpenWRT, rootfs for stock firmware)
+         */
+        char flash_image_start[ADDRESS_LEN];
+        /* 106-115: Size of rootfs */
+        char root_length[IMAGE_LEN];
+        /* 116-127: Address in memory of kernel */
+        char kernel_address[ADDRESS_LEN];
+        /* 128-137: Size of kernel */
+        char kernel_length[IMAGE_LEN];
+        /* 138-141: Image sequence number
+         * (to be incremented when flashed with a new image)
+         */
+        char image_sequence[IMAGE_SEQUENCE_LEN];
+        /* 142-161: RSA Signature (not used; some vendors may use this) */
+        char rsa_signature[RSASIG_LEN];
+        /* 162-191: Compilation and related information (not used in OpenWrt) */
+        char information1[TAGINFO1_LEN];
+        /* 192-195: Version flash layout */
+        char flash_layout_ver[FLASHLAYOUTVER_LEN];