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authorAlex Vesker <valex@mellanox.com>2016-08-04 10:32:02 -0400
committerLeon Romanovsky <leon@kernel.org>2016-08-18 11:49:08 -0400
commit83b502a12e82d0ae97907d415496fbafe044f0ce (patch)
treef71b578650693f0d6fb395e1125925ef4b1c26a1 /include/linux
parent575ddf5888eaf8f271cb3df7b0806cb2db2c333a (diff)
net/mlx5: Modify RQ bitmask from mlx5 ifc
Use mlx5 ifc MODIFY_BITMASK_VSD in mlx5e_modify_rq_vsd and expose counter set capability bit in hca caps structure. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mlx5/driver.h4
-rw-r--r--include/linux/mlx5/mlx5_ifc.h9
2 files changed, 8 insertions, 5 deletions
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index ebe57abf3324..0ea78b5edbb2 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -49,10 +49,6 @@
49#include <linux/mlx5/srq.h> 49#include <linux/mlx5/srq.h>
50 50
51enum { 51enum {
52 MLX5_RQ_BITMASK_VSD = 1 << 1,
53};
54
55enum {
56 MLX5_BOARD_ID_LEN = 64, 52 MLX5_BOARD_ID_LEN = 64,
57 MLX5_MAX_NAME_LEN = 16, 53 MLX5_MAX_NAME_LEN = 16,
58}; 54};
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 3766110e13ea..e1f8e3491867 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -779,7 +779,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
779 u8 out_of_seq_cnt[0x1]; 779 u8 out_of_seq_cnt[0x1];
780 u8 vport_counters[0x1]; 780 u8 vport_counters[0x1];
781 u8 retransmission_q_counters[0x1]; 781 u8 retransmission_q_counters[0x1];
782 u8 reserved_at_183[0x3]; 782 u8 reserved_at_183[0x1];
783 u8 modify_rq_counter_set_id[0x1];
784 u8 reserved_at_185[0x1];
783 u8 max_qp_cnt[0xa]; 785 u8 max_qp_cnt[0xa];
784 u8 pkey_table_size[0x10]; 786 u8 pkey_table_size[0x10];
785 787
@@ -4750,6 +4752,11 @@ struct mlx5_ifc_modify_rq_out_bits {
4750 u8 reserved_at_40[0x40]; 4752 u8 reserved_at_40[0x40];
4751}; 4753};
4752 4754
4755enum {
4756 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
4757 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_MODIFY_RQ_COUNTER_SET_ID = 1ULL << 3,
4758};
4759
4753struct mlx5_ifc_modify_rq_in_bits { 4760struct mlx5_ifc_modify_rq_in_bits {
4754 u8 opcode[0x10]; 4761 u8 opcode[0x10];
4755 u8 reserved_at_10[0x10]; 4762 u8 reserved_at_10[0x10];