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authorMohamad Haj Yahia <mohamad@mellanox.com>2016-05-03 10:13:54 -0400
committerDavid S. Miller <davem@davemloft.net>2016-05-04 14:04:46 -0400
commitefdc810ba39dae0ccce9cb9c1c84ff9b0157ca43 (patch)
tree0f52fbc9ee304e8b367249f5e3752341fbe7916f /include/linux/mlx5
parentfbc4a69b562e38d6946bc8bd7e97d30fe0acd5d0 (diff)
net/mlx5: Flow steering, Add vport ACL support
Update the relevant flow steering device structs and commands to support vport. Update the flow steering core API to receive vport number. Add ingress and egress ACL flow table name spaces. Add ACL flow table support: * ACL (Access Control List) flow table is a table that contains only allow/drop steering rules. * We have two types of ACL flow tables - ingress and egress. * ACLs handle traffic sent from/to E-Switch FDB table, Ingress refers to traffic sent from Vport to E-Switch and Egress refers to traffic sent from E-Switch to vport. * Ingress ACL flow table allow/drop rules is checked against traffic sent from VF. * Egress ACL flow table allow/drop rules is checked against traffic sent to VF. Signed-off-by: Mohamad Haj Yahia <mohamad@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/device.h12
-rw-r--r--include/linux/mlx5/driver.h2
-rw-r--r--include/linux/mlx5/fs.h7
3 files changed, 21 insertions, 0 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 8fecd6d6f814..ee0d5a937f02 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -1349,6 +1349,18 @@ enum mlx5_cap_type {
1349#define MLX5_CAP_ESW_FLOWTABLE_FDB_MAX(mdev, cap) \ 1349#define MLX5_CAP_ESW_FLOWTABLE_FDB_MAX(mdev, cap) \
1350 MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, flow_table_properties_nic_esw_fdb.cap) 1350 MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, flow_table_properties_nic_esw_fdb.cap)
1351 1351
1352#define MLX5_CAP_ESW_EGRESS_ACL(mdev, cap) \
1353 MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_esw_acl_egress.cap)
1354
1355#define MLX5_CAP_ESW_EGRESS_ACL_MAX(mdev, cap) \
1356 MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, flow_table_properties_esw_acl_egress.cap)
1357
1358#define MLX5_CAP_ESW_INGRESS_ACL(mdev, cap) \
1359 MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_esw_acl_ingress.cap)
1360
1361#define MLX5_CAP_ESW_INGRESS_ACL_MAX(mdev, cap) \
1362 MLX5_CAP_ESW_FLOWTABLE_MAX(mdev, flow_table_properties_esw_acl_ingress.cap)
1363
1352#define MLX5_CAP_ESW(mdev, cap) \ 1364#define MLX5_CAP_ESW(mdev, cap) \
1353 MLX5_GET(e_switch_cap, \ 1365 MLX5_GET(e_switch_cap, \
1354 mdev->hca_caps_cur[MLX5_CAP_ESWITCH], cap) 1366 mdev->hca_caps_cur[MLX5_CAP_ESWITCH], cap)
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index d5529449ef47..9613143f0561 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -518,6 +518,8 @@ struct mlx5_priv {
518 unsigned long pci_dev_data; 518 unsigned long pci_dev_data;
519 struct mlx5_flow_root_namespace *root_ns; 519 struct mlx5_flow_root_namespace *root_ns;
520 struct mlx5_flow_root_namespace *fdb_root_ns; 520 struct mlx5_flow_root_namespace *fdb_root_ns;
521 struct mlx5_flow_root_namespace *esw_egress_root_ns;
522 struct mlx5_flow_root_namespace *esw_ingress_root_ns;
521}; 523};
522 524
523enum mlx5_device_state { 525enum mlx5_device_state {
diff --git a/include/linux/mlx5/fs.h b/include/linux/mlx5/fs.h
index 165ff4f9cc6a..6467569ad76e 100644
--- a/include/linux/mlx5/fs.h
+++ b/include/linux/mlx5/fs.h
@@ -58,6 +58,8 @@ enum mlx5_flow_namespace_type {
58 MLX5_FLOW_NAMESPACE_LEFTOVERS, 58 MLX5_FLOW_NAMESPACE_LEFTOVERS,
59 MLX5_FLOW_NAMESPACE_ANCHOR, 59 MLX5_FLOW_NAMESPACE_ANCHOR,
60 MLX5_FLOW_NAMESPACE_FDB, 60 MLX5_FLOW_NAMESPACE_FDB,
61 MLX5_FLOW_NAMESPACE_ESW_EGRESS,
62 MLX5_FLOW_NAMESPACE_ESW_INGRESS,
61}; 63};
62 64
63struct mlx5_flow_table; 65struct mlx5_flow_table;
@@ -90,6 +92,11 @@ mlx5_create_flow_table(struct mlx5_flow_namespace *ns,
90 int prio, 92 int prio,
91 int num_flow_table_entries, 93 int num_flow_table_entries,
92 u32 level); 94 u32 level);
95struct mlx5_flow_table *
96mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns,
97 int prio,
98 int num_flow_table_entries,
99 u32 level, u16 vport);
93int mlx5_destroy_flow_table(struct mlx5_flow_table *ft); 100int mlx5_destroy_flow_table(struct mlx5_flow_table *ft);
94 101
95/* inbox should be set with the following values: 102/* inbox should be set with the following values: