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authorSaeed Mahameed <saeedm@mellanox.com>2016-07-18 18:17:59 -0400
committerLeon Romanovsky <leon@kernel.org>2016-08-17 10:45:57 -0400
commit09a7d9eca1a6cf5eb4f9abfdf8914db9dbd96f08 (patch)
tree9ef5978e16db806d1d23dcd1a3f3ab60d5daa5fe /include/linux/mlx5
parentec22eb53106be1472ba6573dc900943f52f8fd1e (diff)
{net,IB}/mlx5: QP/XRCD commands via mlx5 ifc
Remove old representation of manually created QP/XRCD commands layout amd use mlx5_ifc canonical structures and defines. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/mlx5_ifc.h5
-rw-r--r--include/linux/mlx5/qp.h108
2 files changed, 11 insertions, 102 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 2a39a06dbad4..cb94ac5b8420 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1966,7 +1966,10 @@ struct mlx5_ifc_qpc_bits {
1966 u8 reserved_at_3e0[0x8]; 1966 u8 reserved_at_3e0[0x8];
1967 u8 cqn_snd[0x18]; 1967 u8 cqn_snd[0x18];
1968 1968
1969 u8 reserved_at_400[0x40]; 1969 u8 reserved_at_400[0x8];
1970 u8 deth_sqpn[0x18];
1971
1972 u8 reserved_at_420[0x20];
1970 1973
1971 u8 reserved_at_440[0x8]; 1974 u8 reserved_at_440[0x8];
1972 u8 last_acked_psn[0x18]; 1975 u8 last_acked_psn[0x18];
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index 7879bf411891..16e1efecaf66 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -123,12 +123,13 @@ enum {
123}; 123};
124 124
125enum { 125enum {
126 MLX5_NON_ZERO_RQ = 0 << 24, 126 MLX5_NON_ZERO_RQ = 0x0,
127 MLX5_SRQ_RQ = 1 << 24, 127 MLX5_SRQ_RQ = 0x1,
128 MLX5_CRQ_RQ = 2 << 24, 128 MLX5_CRQ_RQ = 0x2,
129 MLX5_ZERO_LEN_RQ = 3 << 24 129 MLX5_ZERO_LEN_RQ = 0x3
130}; 130};
131 131
132/* TODO REM */
132enum { 133enum {
133 /* params1 */ 134 /* params1 */
134 MLX5_QP_BIT_SRE = 1 << 15, 135 MLX5_QP_BIT_SRE = 1 << 15,
@@ -178,12 +179,6 @@ enum {
178}; 179};
179 180
180enum { 181enum {
181 MLX5_QP_LAT_SENSITIVE = 1 << 28,
182 MLX5_QP_BLOCK_MCAST = 1 << 30,
183 MLX5_QP_ENABLE_SIG = 1 << 31,
184};
185
186enum {
187 MLX5_RCV_DBR = 0, 182 MLX5_RCV_DBR = 0,
188 MLX5_SND_DBR = 1, 183 MLX5_SND_DBR = 1,
189}; 184};
@@ -525,34 +520,6 @@ struct mlx5_qp_context {
525 u8 rsvd1[24]; 520 u8 rsvd1[24];
526}; 521};
527 522
528struct mlx5_create_qp_mbox_in {
529 struct mlx5_inbox_hdr hdr;
530 __be32 input_qpn;
531 u8 rsvd0[4];
532 __be32 opt_param_mask;
533 u8 rsvd1[4];
534 struct mlx5_qp_context ctx;
535 u8 rsvd3[16];
536 __be64 pas[0];
537};
538
539struct mlx5_create_qp_mbox_out {
540 struct mlx5_outbox_hdr hdr;
541 __be32 qpn;
542 u8 rsvd0[4];
543};
544
545struct mlx5_destroy_qp_mbox_in {
546 struct mlx5_inbox_hdr hdr;
547 __be32 qpn;
548 u8 rsvd0[4];
549};
550
551struct mlx5_destroy_qp_mbox_out {
552 struct mlx5_outbox_hdr hdr;
553 u8 rsvd0[8];
554};
555
556struct mlx5_modify_qp_mbox_in { 523struct mlx5_modify_qp_mbox_in {
557 struct mlx5_inbox_hdr hdr; 524 struct mlx5_inbox_hdr hdr;
558 __be32 qpn; 525 __be32 qpn;
@@ -568,56 +535,6 @@ struct mlx5_modify_qp_mbox_out {
568 u8 rsvd0[8]; 535 u8 rsvd0[8];
569}; 536};
570 537
571struct mlx5_query_qp_mbox_in {
572 struct mlx5_inbox_hdr hdr;
573 __be32 qpn;
574 u8 rsvd[4];
575};
576
577struct mlx5_query_qp_mbox_out {
578 struct mlx5_outbox_hdr hdr;
579 u8 rsvd1[8];
580 __be32 optparam;
581 u8 rsvd0[4];
582 struct mlx5_qp_context ctx;
583 u8 rsvd2[16];
584 __be64 pas[0];
585};
586
587struct mlx5_conf_sqp_mbox_in {
588 struct mlx5_inbox_hdr hdr;
589 __be32 qpn;
590 u8 rsvd[3];
591 u8 type;
592};
593
594struct mlx5_conf_sqp_mbox_out {
595 struct mlx5_outbox_hdr hdr;
596 u8 rsvd[8];
597};
598
599struct mlx5_alloc_xrcd_mbox_in {
600 struct mlx5_inbox_hdr hdr;
601 u8 rsvd[8];
602};
603
604struct mlx5_alloc_xrcd_mbox_out {
605 struct mlx5_outbox_hdr hdr;
606 __be32 xrcdn;
607 u8 rsvd[4];
608};
609
610struct mlx5_dealloc_xrcd_mbox_in {
611 struct mlx5_inbox_hdr hdr;
612 __be32 xrcdn;
613 u8 rsvd[4];
614};
615
616struct mlx5_dealloc_xrcd_mbox_out {
617 struct mlx5_outbox_hdr hdr;
618 u8 rsvd[8];
619};
620
621static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn) 538static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn)
622{ 539{
623 return radix_tree_lookup(&dev->priv.qp_table.tree, qpn); 540 return radix_tree_lookup(&dev->priv.qp_table.tree, qpn);
@@ -628,20 +545,9 @@ static inline struct mlx5_core_mkey *__mlx5_mr_lookup(struct mlx5_core_dev *dev,
628 return radix_tree_lookup(&dev->priv.mkey_table.tree, key); 545 return radix_tree_lookup(&dev->priv.mkey_table.tree, key);
629} 546}
630 547
631struct mlx5_page_fault_resume_mbox_in {
632 struct mlx5_inbox_hdr hdr;
633 __be32 flags_qpn;
634 u8 reserved[4];
635};
636
637struct mlx5_page_fault_resume_mbox_out {
638 struct mlx5_outbox_hdr hdr;
639 u8 rsvd[8];
640};
641
642int mlx5_core_create_qp(struct mlx5_core_dev *dev, 548int mlx5_core_create_qp(struct mlx5_core_dev *dev,
643 struct mlx5_core_qp *qp, 549 struct mlx5_core_qp *qp,
644 struct mlx5_create_qp_mbox_in *in, 550 u32 *in,
645 int inlen); 551 int inlen);
646int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 operation, 552int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 operation,
647 struct mlx5_modify_qp_mbox_in *in, int sqd_event, 553 struct mlx5_modify_qp_mbox_in *in, int sqd_event,
@@ -649,7 +555,7 @@ int mlx5_core_qp_modify(struct mlx5_core_dev *dev, u16 operation,
649int mlx5_core_destroy_qp(struct mlx5_core_dev *dev, 555int mlx5_core_destroy_qp(struct mlx5_core_dev *dev,
650 struct mlx5_core_qp *qp); 556 struct mlx5_core_qp *qp);
651int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp, 557int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp,
652 struct mlx5_query_qp_mbox_out *out, int outlen); 558 u32 *out, int outlen);
653 559
654int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn); 560int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn);
655int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn); 561int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn);