diff options
| author | Tero Kristo <t-kristo@ti.com> | 2015-03-03 06:27:48 -0500 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2015-06-02 05:31:14 -0400 |
| commit | 0565fb168d63f89591ce7dcb85438cb19d939a92 (patch) | |
| tree | 304b6823925c4115b5cd46a5d9a5883eb2539462 /include/linux/clk | |
| parent | 192383d87b876ea9879d8b598af593809a25b7d2 (diff) | |
clk: ti: dpll: move omap3 DPLL functionality to clock driver
With the legacy clock support gone, OMAP3 generic DPLL code can now be
moved over to the clock driver also. A few un-unused clkoutx2 functions
are also removed at the same time.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'include/linux/clk')
| -rw-r--r-- | include/linux/clk/ti.h | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 25eea896627a..f8e50271ec97 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h | |||
| @@ -271,41 +271,13 @@ extern const struct clk_ops ti_clk_mux_ops; | |||
| 271 | 271 | ||
| 272 | #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw) | 272 | #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw) |
| 273 | 273 | ||
| 274 | int omap3_noncore_dpll_enable(struct clk_hw *hw); | ||
| 275 | void omap3_noncore_dpll_disable(struct clk_hw *hw); | ||
| 276 | int omap3_noncore_dpll_set_parent(struct clk_hw *hw, u8 index); | ||
| 277 | int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, | ||
| 278 | unsigned long parent_rate); | ||
| 279 | int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw, | ||
| 280 | unsigned long rate, | ||
| 281 | unsigned long parent_rate, | ||
| 282 | u8 index); | ||
| 283 | long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, | ||
| 284 | unsigned long rate, | ||
| 285 | unsigned long min_rate, | ||
| 286 | unsigned long max_rate, | ||
| 287 | unsigned long *best_parent_rate, | ||
| 288 | struct clk_hw **best_parent_clk); | ||
| 289 | unsigned long omap3_dpll_recalc(struct clk_hw *hw, unsigned long parent_rate); | ||
| 290 | long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, | ||
| 291 | unsigned long *parent_rate); | ||
| 292 | void omap2_init_clk_clkdm(struct clk_hw *clk); | 274 | void omap2_init_clk_clkdm(struct clk_hw *clk); |
| 293 | unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw, | ||
| 294 | unsigned long parent_rate); | ||
| 295 | int omap3_clkoutx2_set_rate(struct clk_hw *hw, unsigned long rate, | ||
| 296 | unsigned long parent_rate); | ||
| 297 | long omap3_clkoutx2_round_rate(struct clk_hw *hw, unsigned long rate, | ||
| 298 | unsigned long *prate); | ||
| 299 | int omap2_clkops_enable_clkdm(struct clk_hw *hw); | 275 | int omap2_clkops_enable_clkdm(struct clk_hw *hw); |
| 300 | void omap2_clkops_disable_clkdm(struct clk_hw *hw); | 276 | void omap2_clkops_disable_clkdm(struct clk_hw *hw); |
| 301 | int omap2_clk_disable_autoidle_all(void); | 277 | int omap2_clk_disable_autoidle_all(void); |
| 302 | int omap2_clk_enable_autoidle_all(void); | 278 | int omap2_clk_enable_autoidle_all(void); |
| 303 | int omap2_clk_allow_idle(struct clk *clk); | 279 | int omap2_clk_allow_idle(struct clk *clk); |
| 304 | int omap2_clk_deny_idle(struct clk *clk); | 280 | int omap2_clk_deny_idle(struct clk *clk); |
| 305 | int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate, | ||
| 306 | unsigned long parent_rate); | ||
| 307 | int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, | ||
| 308 | unsigned long parent_rate, u8 index); | ||
| 309 | int omap2_dflt_clk_enable(struct clk_hw *hw); | 281 | int omap2_dflt_clk_enable(struct clk_hw *hw); |
| 310 | void omap2_dflt_clk_disable(struct clk_hw *hw); | 282 | void omap2_dflt_clk_disable(struct clk_hw *hw); |
| 311 | int omap2_dflt_clk_is_enabled(struct clk_hw *hw); | 283 | int omap2_dflt_clk_is_enabled(struct clk_hw *hw); |
| @@ -317,7 +289,6 @@ void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk, | |||
| 317 | void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk, | 289 | void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk, |
| 318 | void __iomem **idlest_reg, | 290 | void __iomem **idlest_reg, |
| 319 | u8 *idlest_bit, u8 *idlest_val); | 291 | u8 *idlest_bit, u8 *idlest_val); |
| 320 | void omap3_clk_lock_dpll5(void); | ||
| 321 | unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, | 292 | unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, |
| 322 | unsigned long parent_rate); | 293 | unsigned long parent_rate); |
| 323 | int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate, | 294 | int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate, |
| @@ -365,7 +336,6 @@ const struct ti_clk_features *ti_clk_get_features(void); | |||
| 365 | 336 | ||
| 366 | extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll; | 337 | extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll; |
| 367 | extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait; | 338 | extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait; |
| 368 | extern const struct clk_hw_omap_ops clkhwops_omap3_dpll; | ||
| 369 | extern const struct clk_hw_omap_ops clkhwops_wait; | 339 | extern const struct clk_hw_omap_ops clkhwops_wait; |
| 370 | extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait; | 340 | extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait; |
| 371 | extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait; | 341 | extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait; |
