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authorMarc Zyngier <marc.zyngier@arm.com>2013-07-12 10:15:23 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2014-07-11 07:57:36 -0400
commitb2fb1c0d378399e1427a91bb991c094f2ca09a2f (patch)
tree4e06317bc81281d27e80932f6c7ab0519bf5f1a6 /include/kvm
parentac3c3747e2db2f326ffc601651de544cdd33a8e9 (diff)
KVM: ARM: vgic: add the GICv3 backend
Introduce the support code for emulating a GICv2 on top of GICv3 hardware. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include/kvm')
-rw-r--r--include/kvm/arm_vgic.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 65f1121a3beb..35b0c121bb65 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -33,6 +33,7 @@
33#define VGIC_MAX_CPUS KVM_MAX_VCPUS 33#define VGIC_MAX_CPUS KVM_MAX_VCPUS
34 34
35#define VGIC_V2_MAX_LRS (1 << 6) 35#define VGIC_V2_MAX_LRS (1 << 6)
36#define VGIC_V3_MAX_LRS 16
36 37
37/* Sanity checks... */ 38/* Sanity checks... */
38#if (VGIC_MAX_CPUS > 8) 39#if (VGIC_MAX_CPUS > 8)
@@ -72,6 +73,7 @@ struct kvm_vcpu;
72 73
73enum vgic_type { 74enum vgic_type {
74 VGIC_V2, /* Good ol' GICv2 */ 75 VGIC_V2, /* Good ol' GICv2 */
76 VGIC_V3, /* New fancy GICv3 */
75}; 77};
76 78
77#define LR_STATE_PENDING (1 << 0) 79#define LR_STATE_PENDING (1 << 0)
@@ -172,6 +174,19 @@ struct vgic_v2_cpu_if {
172 u32 vgic_lr[VGIC_V2_MAX_LRS]; 174 u32 vgic_lr[VGIC_V2_MAX_LRS];
173}; 175};
174 176
177struct vgic_v3_cpu_if {
178#ifdef CONFIG_ARM_GIC_V3
179 u32 vgic_hcr;
180 u32 vgic_vmcr;
181 u32 vgic_misr; /* Saved only */
182 u32 vgic_eisr; /* Saved only */
183 u32 vgic_elrsr; /* Saved only */
184 u32 vgic_ap0r[4];
185 u32 vgic_ap1r[4];
186 u64 vgic_lr[VGIC_V3_MAX_LRS];
187#endif
188};
189
175struct vgic_cpu { 190struct vgic_cpu {
176#ifdef CONFIG_KVM_ARM_VGIC 191#ifdef CONFIG_KVM_ARM_VGIC
177 /* per IRQ to LR mapping */ 192 /* per IRQ to LR mapping */
@@ -190,6 +205,7 @@ struct vgic_cpu {
190 /* CPU vif control registers for world switch */ 205 /* CPU vif control registers for world switch */
191 union { 206 union {
192 struct vgic_v2_cpu_if vgic_v2; 207 struct vgic_v2_cpu_if vgic_v2;
208 struct vgic_v3_cpu_if vgic_v3;
193 }; 209 };
194#endif 210#endif
195}; 211};
@@ -224,6 +240,18 @@ bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
224int vgic_v2_probe(struct device_node *vgic_node, 240int vgic_v2_probe(struct device_node *vgic_node,
225 const struct vgic_ops **ops, 241 const struct vgic_ops **ops,
226 const struct vgic_params **params); 242 const struct vgic_params **params);
243#ifdef CONFIG_ARM_GIC_V3
244int vgic_v3_probe(struct device_node *vgic_node,
245 const struct vgic_ops **ops,
246 const struct vgic_params **params);
247#else
248static inline int vgic_v3_probe(struct device_node *vgic_node,
249 const struct vgic_ops **ops,
250 const struct vgic_params **params)
251{
252 return -ENODEV;
253}
254#endif
227 255
228#else 256#else
229static inline int kvm_vgic_hyp_init(void) 257static inline int kvm_vgic_hyp_init(void)